src/hotspot/cpu/ppc/assembler_ppc.hpp

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*** 395,404 **** --- 395,405 ---- LWA_OPCODE = (58u << OPCODE_SHIFT | 2u << XO_30_31_SHIFT), // DS-FORM LWAX_OPCODE = (31u << OPCODE_SHIFT | 341u << XO_21_30_SHIFT), // X-FORM CNTLZW_OPCODE = (31u << OPCODE_SHIFT | 26u << XO_21_30_SHIFT), // X-FORM + CNTTZW_OPCODE = (31u << OPCODE_SHIFT | 538u << XO_21_30_SHIFT), // X-FORM // 64 bit opcode encodings LD_OPCODE = (58u << OPCODE_SHIFT | 0u << XO_30_31_SHIFT), // DS-FORM LDU_OPCODE = (58u << OPCODE_SHIFT | 1u << XO_30_31_SHIFT), // DS-FORM
*** 426,435 **** --- 427,437 ---- MULHD_OPCODE = (31u << OPCODE_SHIFT | 73u << 1), // XO-FORM MULHDU_OPCODE = (31u << OPCODE_SHIFT | 9u << 1), // XO-FORM DIVD_OPCODE = (31u << OPCODE_SHIFT | 489u << 1), // XO-FORM CNTLZD_OPCODE = (31u << OPCODE_SHIFT | 58u << XO_21_30_SHIFT), // X-FORM + CNTTZD_OPCODE = (31u << OPCODE_SHIFT | 570u << XO_21_30_SHIFT), // X-FORM NAND_OPCODE = (31u << OPCODE_SHIFT | 476u << XO_21_30_SHIFT), // X-FORM NOR_OPCODE = (31u << OPCODE_SHIFT | 124u << XO_21_30_SHIFT), // X-FORM // opcodes only used for floating arithmetic
*** 1498,1507 **** --- 1500,1513 ---- // count instructions inline void cntlzw( Register a, Register s); inline void cntlzw_( Register a, Register s); inline void cntlzd( Register a, Register s); inline void cntlzd_( Register a, Register s); + inline void cnttzw( Register a, Register s); + inline void cnttzw_( Register a, Register s); + inline void cnttzd( Register a, Register s); + inline void cnttzd_( Register a, Register s); // PPC 1, section 3.3.12, Fixed-Point Rotate and Shift Instructions inline void sld( Register a, Register s, Register b); inline void sld_( Register a, Register s, Register b); inline void slw( Register a, Register s, Register b);