310 void add_offset_in_bytes(int add_offset) { set_offset ( ( offset() + add_offset ) ); }
311
312 void verify();
313 void print ();
314
315 // unit test stuff
316 static void test() {}
317
318 private:
319 inline friend NativeMovRegMem* nativeMovRegMem_at (address address);
320 };
321
322 inline NativeMovRegMem* nativeMovRegMem_at (address address) {
323 NativeMovRegMem* test = (NativeMovRegMem*)(address - NativeMovRegMem::instruction_offset);
324 #ifdef ASSERT
325 test->verify();
326 #endif
327 return test;
328 }
329
330 class NativeMovRegMemPatching: public NativeMovRegMem {
331 private:
332 friend NativeMovRegMemPatching* nativeMovRegMemPatching_at (address address) {
333 NativeMovRegMemPatching* test = (NativeMovRegMemPatching*)(address - instruction_offset);
334 #ifdef ASSERT
335 test->verify();
336 #endif
337 return test;
338 }
339 };
340
341
342
343 // An interface for accessing/manipulating native leal instruction of form:
344 // leal reg, [reg + offset]
345
346 class NativeLoadAddress: public NativeMovRegMem {
347 #ifdef AMD64
348 static const bool has_rex = true;
349 static const int rex_size = 1;
350 #else
351 static const bool has_rex = false;
352 static const int rex_size = 0;
353 #endif // AMD64
354 public:
355 enum Intel_specific_constants {
356 instruction_prefix_wide = Assembler::REX_W,
357 instruction_prefix_wide_extended = Assembler::REX_WB,
358 lea_instruction_code = 0x8D,
359 mov64_instruction_code = 0xB8
360 };
361
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310 void add_offset_in_bytes(int add_offset) { set_offset ( ( offset() + add_offset ) ); }
311
312 void verify();
313 void print ();
314
315 // unit test stuff
316 static void test() {}
317
318 private:
319 inline friend NativeMovRegMem* nativeMovRegMem_at (address address);
320 };
321
322 inline NativeMovRegMem* nativeMovRegMem_at (address address) {
323 NativeMovRegMem* test = (NativeMovRegMem*)(address - NativeMovRegMem::instruction_offset);
324 #ifdef ASSERT
325 test->verify();
326 #endif
327 return test;
328 }
329
330
331 // An interface for accessing/manipulating native leal instruction of form:
332 // leal reg, [reg + offset]
333
334 class NativeLoadAddress: public NativeMovRegMem {
335 #ifdef AMD64
336 static const bool has_rex = true;
337 static const int rex_size = 1;
338 #else
339 static const bool has_rex = false;
340 static const int rex_size = 0;
341 #endif // AMD64
342 public:
343 enum Intel_specific_constants {
344 instruction_prefix_wide = Assembler::REX_W,
345 instruction_prefix_wide_extended = Assembler::REX_WB,
346 lea_instruction_code = 0x8D,
347 mov64_instruction_code = 0xB8
348 };
349
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