src/cpu/x86/vm/macroAssembler_x86.cpp
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hotspot Cdiff src/cpu/x86/vm/macroAssembler_x86.cpp
src/cpu/x86/vm/macroAssembler_x86.cpp
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rev 10354 : imported patch vextrinscleanup2
rev 10357 : [mq]: vextrinscleanup5
*** 3443,3461 ****
LP64_ONLY(movq(dst, src)) NOT_LP64(movl(dst, src));
}
void MacroAssembler::movdqu(Address dst, XMMRegister src) {
if (UseAVX > 2 && !VM_Version::supports_avx512vl() && (src->encoding() > 15)) {
! Assembler::vextractf32x4h(dst, src, 0);
} else {
Assembler::movdqu(dst, src);
}
}
void MacroAssembler::movdqu(XMMRegister dst, Address src) {
if (UseAVX > 2 && !VM_Version::supports_avx512vl() && (dst->encoding() > 15)) {
! Assembler::vinsertf32x4h(dst, src, 0);
} else {
Assembler::movdqu(dst, src);
}
}
--- 3443,3461 ----
LP64_ONLY(movq(dst, src)) NOT_LP64(movl(dst, src));
}
void MacroAssembler::movdqu(Address dst, XMMRegister src) {
if (UseAVX > 2 && !VM_Version::supports_avx512vl() && (src->encoding() > 15)) {
! Assembler::vextractf32x4(dst, src, 0);
} else {
Assembler::movdqu(dst, src);
}
}
void MacroAssembler::movdqu(XMMRegister dst, Address src) {
if (UseAVX > 2 && !VM_Version::supports_avx512vl() && (dst->encoding() > 15)) {
! Assembler::vinsertf32x4(dst, dst, src, 0);
} else {
Assembler::movdqu(dst, src);
}
}
*** 3476,3494 ****
}
}
void MacroAssembler::vmovdqu(Address dst, XMMRegister src) {
if (UseAVX > 2 && !VM_Version::supports_avx512vl() && (src->encoding() > 15)) {
! Assembler::vextractf64x4h(dst, src, 0);
} else {
Assembler::vmovdqu(dst, src);
}
}
void MacroAssembler::vmovdqu(XMMRegister dst, Address src) {
if (UseAVX > 2 && !VM_Version::supports_avx512vl() && (dst->encoding() > 15)) {
! Assembler::vinsertf64x4h(dst, src, 0);
} else {
Assembler::vmovdqu(dst, src);
}
}
--- 3476,3494 ----
}
}
void MacroAssembler::vmovdqu(Address dst, XMMRegister src) {
if (UseAVX > 2 && !VM_Version::supports_avx512vl() && (src->encoding() > 15)) {
! vextractf64x4_low(dst, src);
} else {
Assembler::vmovdqu(dst, src);
}
}
void MacroAssembler::vmovdqu(XMMRegister dst, Address src) {
if (UseAVX > 2 && !VM_Version::supports_avx512vl() && (dst->encoding() > 15)) {
! vinsertf64x4_low(dst, src);
} else {
Assembler::vmovdqu(dst, src);
}
}
*** 5647,5673 ****
if (MaxVectorSize > 16) {
if(UseAVX > 2) {
// Save upper half of ZMM registers
subptr(rsp, 32*num_xmm_regs);
for (int n = 0; n < num_xmm_regs; n++) {
! vextractf64x4h(Address(rsp, n*32), as_XMMRegister(n), 1);
}
}
assert(UseAVX > 0, "256 bit vectors are supported only with AVX");
// Save upper half of YMM registers
subptr(rsp, 16*num_xmm_regs);
for (int n = 0; n < num_xmm_regs; n++) {
! vextractf128h(Address(rsp, n*16), as_XMMRegister(n));
}
}
#endif
// Save whole 128bit (16 bytes) XMM registers
subptr(rsp, 16*num_xmm_regs);
#ifdef _LP64
if (VM_Version::supports_evex()) {
for (int n = 0; n < num_xmm_regs; n++) {
! vextractf32x4h(Address(rsp, n*16), as_XMMRegister(n), 0);
}
} else {
for (int n = 0; n < num_xmm_regs; n++) {
movdqu(Address(rsp, n*16), as_XMMRegister(n));
}
--- 5647,5673 ----
if (MaxVectorSize > 16) {
if(UseAVX > 2) {
// Save upper half of ZMM registers
subptr(rsp, 32*num_xmm_regs);
for (int n = 0; n < num_xmm_regs; n++) {
! vextractf64x4_high(Address(rsp, n*32), as_XMMRegister(n));
}
}
assert(UseAVX > 0, "256 bit vectors are supported only with AVX");
// Save upper half of YMM registers
subptr(rsp, 16*num_xmm_regs);
for (int n = 0; n < num_xmm_regs; n++) {
! vextractf128_high(Address(rsp, n*16), as_XMMRegister(n));
}
}
#endif
// Save whole 128bit (16 bytes) XMM registers
subptr(rsp, 16*num_xmm_regs);
#ifdef _LP64
if (VM_Version::supports_evex()) {
for (int n = 0; n < num_xmm_regs; n++) {
! vextractf32x4(Address(rsp, n*16), as_XMMRegister(n), 0);
}
} else {
for (int n = 0; n < num_xmm_regs; n++) {
movdqu(Address(rsp, n*16), as_XMMRegister(n));
}
*** 5751,5761 ****
} else if (UseSSE >= 2) {
// Restore whole 128bit (16 bytes) XMM registers
#ifdef _LP64
if (VM_Version::supports_evex()) {
for (int n = 0; n < num_xmm_regs; n++) {
! vinsertf32x4h(as_XMMRegister(n), Address(rsp, n*16), 0);
}
} else {
for (int n = 0; n < num_xmm_regs; n++) {
movdqu(as_XMMRegister(n), Address(rsp, n*16));
}
--- 5751,5761 ----
} else if (UseSSE >= 2) {
// Restore whole 128bit (16 bytes) XMM registers
#ifdef _LP64
if (VM_Version::supports_evex()) {
for (int n = 0; n < num_xmm_regs; n++) {
! vinsertf32x4(as_XMMRegister(n), as_XMMRegister(n), Address(rsp, n*16), 0);
}
} else {
for (int n = 0; n < num_xmm_regs; n++) {
movdqu(as_XMMRegister(n), Address(rsp, n*16));
}
*** 5769,5784 ****
#ifdef COMPILER2
if (MaxVectorSize > 16) {
// Restore upper half of YMM registers.
for (int n = 0; n < num_xmm_regs; n++) {
! vinsertf128h(as_XMMRegister(n), Address(rsp, n*16));
}
addptr(rsp, 16*num_xmm_regs);
if(UseAVX > 2) {
for (int n = 0; n < num_xmm_regs; n++) {
! vinsertf64x4h(as_XMMRegister(n), Address(rsp, n*32), 1);
}
addptr(rsp, 32*num_xmm_regs);
}
}
#endif
--- 5769,5784 ----
#ifdef COMPILER2
if (MaxVectorSize > 16) {
// Restore upper half of YMM registers.
for (int n = 0; n < num_xmm_regs; n++) {
! vinsertf128_high(as_XMMRegister(n), Address(rsp, n*16));
}
addptr(rsp, 16*num_xmm_regs);
if(UseAVX > 2) {
for (int n = 0; n < num_xmm_regs; n++) {
! vinsertf64x4_high(as_XMMRegister(n), Address(rsp, n*32));
}
addptr(rsp, 32*num_xmm_regs);
}
}
#endif
src/cpu/x86/vm/macroAssembler_x86.cpp
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