--- old/src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp 2018-09-13 14:21:34.644929529 -0700 +++ new/src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp 2018-09-13 14:21:34.392929538 -0700 @@ -1569,7 +1569,6 @@ } Register newval = as_reg(op->new_value()); Register cmpval = as_reg(op->cmp_value()); - Label succeed, fail, around; if (op->code() == lir_cas_obj) { if (UseCompressedOops) { --- old/src/hotspot/cpu/aarch64/c1_MacroAssembler_aarch64.cpp 2018-09-13 14:21:35.592929496 -0700 +++ new/src/hotspot/cpu/aarch64/c1_MacroAssembler_aarch64.cpp 2018-09-13 14:21:35.344929505 -0700 @@ -64,7 +64,7 @@ const int aligned_mask = BytesPerWord -1; const int hdr_offset = oopDesc::mark_offset_in_bytes(); assert(hdr != obj && hdr != disp_hdr && obj != disp_hdr, "registers must be different"); - Label done, fail; + Label done; int null_check_offset = -1; verify_oop(obj); --- old/src/hotspot/cpu/aarch64/c1_Runtime1_aarch64.cpp 2018-09-13 14:21:36.488929465 -0700 +++ new/src/hotspot/cpu/aarch64/c1_Runtime1_aarch64.cpp 2018-09-13 14:21:36.232929474 -0700 @@ -615,7 +615,7 @@ // Runtime will return true if the nmethod has been deoptimized during // the patching process. In that case we must do a deopt reexecute instead. - Label reexecuteEntry, cont; + Label cont; __ cbz(r0, cont); // have we deoptimized? --- old/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp 2018-09-13 14:21:37.356929435 -0700 +++ new/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp 2018-09-13 14:21:37.144929442 -0700 @@ -5431,7 +5431,7 @@ BLOCK_COMMENT("zero_words {"); cmp(cnt, (u1)zero_words_block_size); - Label around, done, done16; + Label around; br(LO, around); { RuntimeAddress zero_blocks = RuntimeAddress(StubRoutines::aarch64::zero_blocks()); --- old/src/hotspot/cpu/aarch64/stubGenerator_aarch64.cpp 2018-09-13 14:21:38.240929404 -0700 +++ new/src/hotspot/cpu/aarch64/stubGenerator_aarch64.cpp 2018-09-13 14:21:38.036929411 -0700 @@ -634,7 +634,7 @@ // r11 < MacroAssembler::zero_words_block_size. address generate_zero_blocks() { - Label store_pair, loop_store_pair, done; + Label done; Label base_aligned; Register base = r10, cnt = r11; @@ -1039,7 +1039,7 @@ int direction = is_backwards ? -1 : 1; int unit = wordSize * direction; - Label Lpair, Lword, Lint, Lshort, Lbyte; + Label Lword, Lint, Lshort, Lbyte; assert(granularity && granularity <= sizeof (jlong), "Impossible granularity in copy_memory_small"); @@ -1096,7 +1096,7 @@ // <= 96 bytes do inline. Direction doesn't matter because we always // load all the data before writing anything - Label copy4, copy8, copy16, copy32, copy80, copy128, copy_big, finish; + Label copy4, copy8, copy16, copy32, copy80, copy_big, finish; const Register t2 = r5, t3 = r6, t4 = r7, t5 = r8; const Register t6 = r9, t7 = r10, t8 = r11, t9 = r12; const Register send = r17, dend = r18; @@ -1966,7 +1966,7 @@ address int_copy_entry, address oop_copy_entry, address long_copy_entry, address checkcast_copy_entry) { - Label L_failed, L_failed_0, L_objArray; + Label L_failed, L_objArray; Label L_copy_bytes, L_copy_shorts, L_copy_ints, L_copy_longs; // Input registers @@ -4366,7 +4366,7 @@ Register ch1 = rscratch1, ch2 = rscratch2, first = tmp3; __ push(spilled_regs, sp); - Label L_LOOP, L_LOOP_PROCEED, L_SMALL, L_HAS_ZERO, L_SMALL_MATCH_LOOP, + Label L_LOOP, L_LOOP_PROCEED, L_SMALL, L_HAS_ZERO, L_HAS_ZERO_LOOP, L_CMP_LOOP, L_CMP_LOOP_NOMATCH, L_SMALL_PROCEED, L_SMALL_HAS_ZERO_LOOP, L_SMALL_CMP_LOOP_NOMATCH, L_SMALL_CMP_LOOP, L_POST_LOOP, L_CMP_LOOP_LAST_CMP, L_HAS_ZERO_LOOP_NOMATCH, --- old/src/hotspot/cpu/aarch64/templateInterpreterGenerator_aarch64.cpp 2018-09-13 14:21:39.236929369 -0700 +++ new/src/hotspot/cpu/aarch64/templateInterpreterGenerator_aarch64.cpp 2018-09-13 14:21:38.972929378 -0700 @@ -1450,7 +1450,7 @@ // and result handler will pick it up { - Label no_oop, not_weak, store_result; + Label no_oop; __ adr(t, ExternalAddress(AbstractInterpreter::result_handler(T_OBJECT))); __ cmp(t, result_handler); __ br(Assembler::NE, no_oop); --- old/src/hotspot/cpu/arm/arm.ad 2018-09-13 14:21:40.220929335 -0700 +++ new/src/hotspot/cpu/arm/arm.ad 2018-09-13 14:21:39.964929344 -0700 @@ -1639,7 +1639,7 @@ %} enc_class enc_String_Equals(R0RegP str1, R1RegP str2, R2RegI cnt, iRegI result, iRegI tmp1, iRegI tmp2) %{ - Label Lword_loop, Lpost_word, Lchar, Lchar_loop, Ldone, Lequal; + Label Lchar, Lchar_loop, Ldone, Lequal; MacroAssembler _masm(&cbuf); Register str1_reg = $str1$$Register; @@ -1701,7 +1701,7 @@ %} enc_class enc_Array_Equals(R0RegP ary1, R1RegP ary2, iRegI tmp1, iRegI tmp2, iRegI tmp3, iRegI result) %{ - Label Lvector, Ldone, Lloop, Lequal; + Label Ldone, Lloop, Lequal; MacroAssembler _masm(&cbuf); Register ary1_reg = $ary1$$Register; --- old/src/hotspot/cpu/arm/c1_MacroAssembler_arm.cpp 2018-09-13 14:21:41.284929298 -0700 +++ new/src/hotspot/cpu/arm/c1_MacroAssembler_arm.cpp 2018-09-13 14:21:41.028929307 -0700 @@ -370,7 +370,6 @@ } assert(oopDesc::mark_offset_in_bytes() == 0, "Required by atomic instructions"); - Label retry; // Load displaced header and object from the lock ldr(hdr, Address(disp_hdr, mark_offset)); --- old/src/hotspot/cpu/arm/macroAssembler_arm.cpp 2018-09-13 14:21:42.196929266 -0700 +++ new/src/hotspot/cpu/arm/macroAssembler_arm.cpp 2018-09-13 14:21:41.936929275 -0700 @@ -260,7 +260,7 @@ add(count_temp, count_temp, 1); - Label L_loop, L_setnz_and_fail, L_fail; + Label L_loop, L_fail; // Top of search loop bind(L_loop); --- old/src/hotspot/cpu/arm/methodHandles_arm.cpp 2018-09-13 14:21:43.152929233 -0700 +++ new/src/hotspot/cpu/arm/methodHandles_arm.cpp 2018-09-13 14:21:42.896929242 -0700 @@ -446,7 +446,6 @@ } // given intf, index, and recv klass, dispatch to the implementation method - Label L_no_such_interface; __ lookup_interface_method(temp1_recv_klass, temp3_intf, // note: next two args must be the same: rbx_index, rbx_method, --- old/src/hotspot/cpu/arm/sharedRuntime_arm.cpp 2018-09-13 14:21:44.096929200 -0700 +++ new/src/hotspot/cpu/arm/sharedRuntime_arm.cpp 2018-09-13 14:21:43.844929209 -0700 @@ -1566,7 +1566,7 @@ const Register disp_hdr = AARCH64_ONLY(R22) NOT_AARCH64(altFP_7_11); const Register tmp = AARCH64_ONLY(R23) NOT_AARCH64(R8); - Label slow_lock, slow_lock_biased, lock_done, fast_lock, leave; + Label slow_lock, slow_lock_biased, lock_done, fast_lock; if (method->is_synchronized()) { // The first argument is a handle to sync object (a class or an instance) __ ldr(sync_obj, Address(R1)); @@ -1686,7 +1686,7 @@ __ b(reguard, eq); __ bind(reguard_done); - Label slow_unlock, unlock_done, retry; + Label slow_unlock, unlock_done; if (method->is_synchronized()) { __ ldr(sync_obj, Address(sync_handle)); --- old/src/hotspot/cpu/ppc/stubGenerator_ppc.cpp 2018-09-13 14:21:45.040929167 -0700 +++ new/src/hotspot/cpu/ppc/stubGenerator_ppc.cpp 2018-09-13 14:21:44.776929176 -0700 @@ -2758,7 +2758,6 @@ Label L_doLast; Label L_do44; Label L_do52; - Label L_do60; Register from = R3_ARG1; // source array address Register to = R4_ARG2; // destination array address @@ -3296,8 +3295,8 @@ const Register cs = R27; // Labels - Label SKIP_LSHIFT, SKIP_DIAGONAL_SUM, SKIP_ADDONE, SKIP_MULADD, SKIP_LOOP_SQUARE; - Label LOOP_LSHIFT, LOOP_DIAGONAL_SUM, LOOP_ADDONE, LOOP_MULADD, LOOP_SQUARE; + Label SKIP_LSHIFT, SKIP_DIAGONAL_SUM, SKIP_ADDONE, SKIP_LOOP_SQUARE; + Label LOOP_LSHIFT, LOOP_DIAGONAL_SUM, LOOP_ADDONE, LOOP_SQUARE; // Save non-volatile regs (frameless). int current_offs = -8; --- old/src/hotspot/cpu/ppc/templateTable_ppc_64.cpp 2018-09-13 14:21:46.040929132 -0700 +++ new/src/hotspot/cpu/ppc/templateTable_ppc_64.cpp 2018-09-13 14:21:45.780929141 -0700 @@ -3880,7 +3880,6 @@ void TemplateTable::arraylength() { transition(atos, itos); - Label LnoException; __ verify_oop(R17_tos); __ null_check_throw(R17_tos, arrayOopDesc::length_offset_in_bytes(), R11_scratch1); __ lwa(R17_tos, arrayOopDesc::length_offset_in_bytes(), R17_tos); @@ -4081,7 +4080,7 @@ found_same_obj = CCR1, reached_limit = CCR6; { - Label Lloop, Lentry; + Label Lloop; Register Rlimit = Rcurrent_monitor; // Set up search loop - start with topmost monitor. --- old/src/hotspot/cpu/s390/macroAssembler_s390.cpp 2018-09-13 14:21:47.048929097 -0700 +++ new/src/hotspot/cpu/s390/macroAssembler_s390.cpp 2018-09-13 14:21:46.784929106 -0700 @@ -3079,7 +3079,7 @@ // Input registers must not overlap. // Also check for R1 which is explicitely used here. assert_different_registers(Z_R1, Rsubklass, Rsuperklass, Rarray_ptr, Rlength); - NearLabel L_fallthrough, L_loop; + NearLabel L_fallthrough; int label_nulls = 0; if (L_success == NULL) { L_success = &L_fallthrough; label_nulls++; } if (L_failure == NULL) { L_failure = &L_fallthrough; label_nulls++; } --- old/src/hotspot/cpu/s390/stubGenerator_s390.cpp 2018-09-13 14:21:48.072929061 -0700 +++ new/src/hotspot/cpu/s390/stubGenerator_s390.cpp 2018-09-13 14:21:47.812929070 -0700 @@ -285,11 +285,6 @@ // Just pop the topmost frame ... // - Label ret_is_object; - Label ret_is_long; - Label ret_is_float; - Label ret_is_double; - // Restore frame pointer. __ z_lg(r_entryframe_fp, _z_abi(callers_sp), Z_SP); // Pop frame. Done here to minimize stalls. --- old/src/hotspot/cpu/s390/templateTable_s390.cpp 2018-09-13 14:21:48.996929029 -0700 +++ new/src/hotspot/cpu/s390/templateTable_s390.cpp 2018-09-13 14:21:48.740929038 -0700 @@ -3785,7 +3785,6 @@ Label slow_case; Label done; Label initialize_header; - Label allocate_shared; BLOCK_COMMENT("TemplateTable::_new {"); __ get_2_byte_integer_at_bcp(offset/*dest*/, 1, InterpreterMacroAssembler::Unsigned); --- old/src/hotspot/cpu/sparc/macroAssembler_sparc.cpp 2018-09-13 14:21:49.932928996 -0700 +++ new/src/hotspot/cpu/sparc/macroAssembler_sparc.cpp 2018-09-13 14:21:49.672929006 -0700 @@ -2648,8 +2648,6 @@ inc_counter((address) counters->total_entry_count_addr(), Rmark, Rscratch); } - Label Egress ; - // Aggressively avoid the Store-before-CAS penalty // Defer the store into box->dhw until after the CAS Label IsInflated, Recursive ; @@ -4171,7 +4169,7 @@ Label L_main_loop_prologue; Label L_fold_512b, L_fold_512b_loop, L_fold_128b; Label L_fold_tail, L_fold_tail_loop; - Label L_8byte_fold_loop, L_8byte_fold_check; + Label L_8byte_fold_check; const Register tmp[CRC32_TMP_REG_NUM] = {L0, L1, L2, L3, L4, L5, L6, G1, I0, I1, I2, I3, I4, I5, I7, O4, O5, G3}; --- old/src/hotspot/cpu/sparc/vtableStubs_sparc.cpp 2018-09-13 14:21:50.940928961 -0700 +++ new/src/hotspot/cpu/sparc/vtableStubs_sparc.cpp 2018-09-13 14:21:50.680928970 -0700 @@ -166,7 +166,6 @@ Register G3_Klass = G3_scratch; Register G5_icholder = G5; // Passed in as an argument Register G4_interface = G4_scratch; - Label search; // Entry arguments: // G5_interface: Interface --- old/src/hotspot/cpu/x86/c1_LIRAssembler_x86.cpp 2018-09-13 14:21:51.880928929 -0700 +++ new/src/hotspot/cpu/x86/c1_LIRAssembler_x86.cpp 2018-09-13 14:21:51.628928937 -0700 @@ -1778,7 +1778,6 @@ __ bind(profile_cast_success); __ mov_metadata(mdo, md->constant_encoding()); __ load_klass(recv, obj); - Label update_done; type_profile_helper(mdo, md, data, recv, success); __ jmp(*success); @@ -1861,7 +1860,6 @@ __ bind(profile_cast_success); __ mov_metadata(mdo, md->constant_encoding()); __ load_klass(recv, value); - Label update_done; type_profile_helper(mdo, md, data, recv, &done); __ jmpb(done); @@ -3048,7 +3046,6 @@ // if we don't know anything, just go through the generic arraycopy if (default_type == NULL) { - Label done; // save outgoing arguments on stack in case call to System.arraycopy is needed // HACK ALERT. This code used to push the parameters in a hardwired fashion // for interpreter calling conventions. Now we have to do it in new style conventions. --- old/src/hotspot/cpu/x86/c1_Runtime1_x86.cpp 2018-09-13 14:21:52.860928894 -0700 +++ new/src/hotspot/cpu/x86/c1_Runtime1_x86.cpp 2018-09-13 14:21:52.600928904 -0700 @@ -957,7 +957,7 @@ // Runtime will return true if the nmethod has been deoptimized during // the patching process. In that case we must do a deopt reexecute instead. - Label reexecuteEntry, cont; + Label cont; __ testptr(rax, rax); // have we deoptimized? __ jcc(Assembler::equal, cont); // no --- old/src/hotspot/cpu/x86/interp_masm_x86.cpp 2018-09-13 14:21:53.840928860 -0700 +++ new/src/hotspot/cpu/x86/interp_masm_x86.cpp 2018-09-13 14:21:53.584928869 -0700 @@ -170,7 +170,7 @@ void InterpreterMacroAssembler::profile_return_type(Register mdp, Register ret, Register tmp) { assert_different_registers(mdp, ret, tmp, _bcp_register); if (ProfileInterpreter && MethodData::profile_return()) { - Label profile_continue, done; + Label profile_continue; test_method_data_pointer(mdp, profile_continue); @@ -204,7 +204,7 @@ void InterpreterMacroAssembler::profile_parameters_type(Register mdp, Register tmp1, Register tmp2) { if (ProfileInterpreter && MethodData::profile_parameters()) { - Label profile_continue, done; + Label profile_continue; test_method_data_pointer(mdp, profile_continue); @@ -1703,12 +1703,12 @@ bind(next_test); if (test_for_null_also) { - Label found_null; // Failed the equality check on item[n]... Test for null. testptr(reg2, reg2); if (start_row == last_row) { // The only thing left to do is handle the null case. if (non_profiled_offset >= 0) { + Label found_null; jccb(Assembler::zero, found_null); // Item did not match any saved item and there is no empty row for it. // Increment total counter to indicate polymorphic case. @@ -1720,6 +1720,7 @@ } break; } + Label found_null; // Since null is rare, make it be the branch-taken case. jcc(Assembler::zero, found_null); --- old/src/hotspot/cpu/x86/macroAssembler_x86.cpp 2018-09-13 14:21:54.768928828 -0700 +++ new/src/hotspot/cpu/x86/macroAssembler_x86.cpp 2018-09-13 14:21:54.508928837 -0700 @@ -7982,7 +7982,7 @@ Register rtmp, XMMRegister xtmp) { ShortBranchVerifier sbv(this); assert_different_registers(to, value, count, rtmp); - Label L_exit, L_skip_align1, L_skip_align2, L_fill_byte; + Label L_exit; Label L_fill_2_bytes, L_fill_4_bytes; int shift = -1; @@ -8017,8 +8017,10 @@ cmpl(count, 2<= 2) { - Label L_chars_8_check, L_copy_8_chars, L_copy_8_chars_exit; + Label L_copy_8_chars, L_copy_8_chars_exit; Label L_chars_16_check, L_copy_16_chars, L_copy_16_chars_exit; if (UseAVX >= 2) { @@ -8812,9 +8815,8 @@ void MacroAssembler::vectorized_mismatch(Register obja, Register objb, Register length, Register log2_array_indxscale, Register result, Register tmp1, Register tmp2, XMMRegister rymm0, XMMRegister rymm1, XMMRegister rymm2){ assert(UseSSE42Intrinsics, "SSE4.2 must be enabled."); - Label VECTOR64_LOOP, VECTOR64_TAIL, VECTOR64_NOT_EQUAL, VECTOR32_TAIL; - Label VECTOR32_LOOP, VECTOR16_LOOP, VECTOR8_LOOP, VECTOR4_LOOP; - Label VECTOR16_TAIL, VECTOR8_TAIL, VECTOR4_TAIL; + Label VECTOR16_LOOP, VECTOR8_LOOP, VECTOR4_LOOP; + Label VECTOR8_TAIL, VECTOR4_TAIL; Label VECTOR32_NOT_EQUAL, VECTOR16_NOT_EQUAL, VECTOR8_NOT_EQUAL, VECTOR4_NOT_EQUAL; Label SAME_TILL_END, DONE; Label BYTES_LOOP, BYTES_TAIL, BYTES_NOT_EQUAL; @@ -8827,6 +8829,8 @@ if ((UseAVX > 2) && VM_Version::supports_avx512vlbw()) { + Label VECTOR64_LOOP, VECTOR64_NOT_EQUAL, VECTOR32_TAIL; + set_vector_masking(); // opening of the stub context for programming mask registers cmpq(length, 64); jcc(Assembler::less, VECTOR32_TAIL); @@ -8848,7 +8852,7 @@ testq(tmp1, tmp1); jcc(Assembler::zero, SAME_TILL_END); - bind(VECTOR64_TAIL); + //bind(VECTOR64_TAIL); // AVX512 code to compare upto 63 byte vectors. // Save k1 kmovql(k3, k1); @@ -8881,6 +8885,7 @@ jcc(Assembler::less, VECTOR4_TAIL); if (UseAVX >= 2) { + Label VECTOR16_TAIL, VECTOR32_LOOP; cmpq(length, 16); jcc(Assembler::equal, VECTOR16_LOOP); @@ -9231,7 +9236,7 @@ */ void MacroAssembler::square_to_len(Register x, Register len, Register z, Register zlen, Register tmp1, Register tmp2, Register tmp3, Register tmp4, Register tmp5, Register rdxReg, Register raxReg) { - Label L_second_loop, L_second_loop_exit, L_third_loop, L_third_loop_exit, fifth_loop, fifth_loop_exit, L_last_x, L_multiply; + Label L_second_loop, L_second_loop_exit, L_third_loop, L_third_loop_exit, L_last_x, L_multiply; push(tmp1); push(tmp2); push(tmp3); --- old/src/hotspot/cpu/x86/macroAssembler_x86_cos.cpp 2018-09-13 14:21:55.828928791 -0700 +++ new/src/hotspot/cpu/x86/macroAssembler_x86_cos.cpp 2018-09-13 14:21:55.572928800 -0700 @@ -185,7 +185,7 @@ Label L_2TAG_PACKET_0_0_1, L_2TAG_PACKET_1_0_1, L_2TAG_PACKET_2_0_1, L_2TAG_PACKET_3_0_1; Label L_2TAG_PACKET_4_0_1, L_2TAG_PACKET_5_0_1, L_2TAG_PACKET_6_0_1, L_2TAG_PACKET_7_0_1; Label L_2TAG_PACKET_8_0_1, L_2TAG_PACKET_9_0_1, L_2TAG_PACKET_10_0_1, L_2TAG_PACKET_11_0_1; - Label L_2TAG_PACKET_12_0_1, L_2TAG_PACKET_13_0_1, B1_2, B1_3, B1_4, B1_5, start; + Label L_2TAG_PACKET_12_0_1, L_2TAG_PACKET_13_0_1, B1_2, B1_4, start; assert_different_registers(r8, r9, r10, r11, eax, ecx, edx); @@ -756,9 +756,7 @@ void MacroAssembler::fast_cos(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3, XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, Register eax, Register ecx, Register edx, Register tmp) { Label L_2TAG_PACKET_0_0_2, L_2TAG_PACKET_1_0_2, L_2TAG_PACKET_2_0_2, L_2TAG_PACKET_3_0_2; - Label L_2TAG_PACKET_4_0_2, L_2TAG_PACKET_5_0_2, L_2TAG_PACKET_6_0_2, L_2TAG_PACKET_7_0_2; - Label L_2TAG_PACKET_8_0_2, L_2TAG_PACKET_9_0_2, L_2TAG_PACKET_10_0_2, L_2TAG_PACKET_11_0_2; - Label L_2TAG_PACKET_12_0_2, L_2TAG_PACKET_13_0_2, B1_3, B1_5, start; + Label start; assert_different_registers(tmp, eax, ecx, edx); --- old/src/hotspot/cpu/x86/macroAssembler_x86_exp.cpp 2018-09-13 14:21:56.788928758 -0700 +++ new/src/hotspot/cpu/x86/macroAssembler_x86_exp.cpp 2018-09-13 14:21:56.536928766 -0700 @@ -483,7 +483,7 @@ Label L_2TAG_PACKET_0_0_2, L_2TAG_PACKET_1_0_2, L_2TAG_PACKET_2_0_2, L_2TAG_PACKET_3_0_2; Label L_2TAG_PACKET_4_0_2, L_2TAG_PACKET_5_0_2, L_2TAG_PACKET_6_0_2, L_2TAG_PACKET_7_0_2; Label L_2TAG_PACKET_8_0_2, L_2TAG_PACKET_9_0_2, L_2TAG_PACKET_10_0_2, L_2TAG_PACKET_11_0_2; - Label L_2TAG_PACKET_12_0_2, L_2TAG_PACKET_13_0_2, B1_3, B1_5, start; + Label L_2TAG_PACKET_12_0_2, start; assert_different_registers(tmp, eax, ecx, edx); jmp(start); --- old/src/hotspot/cpu/x86/macroAssembler_x86_log.cpp 2018-09-13 14:21:57.684928726 -0700 +++ new/src/hotspot/cpu/x86/macroAssembler_x86_log.cpp 2018-09-13 14:21:57.428928735 -0700 @@ -186,7 +186,7 @@ Label L_2TAG_PACKET_0_0_2, L_2TAG_PACKET_1_0_2, L_2TAG_PACKET_2_0_2, L_2TAG_PACKET_3_0_2; Label L_2TAG_PACKET_4_0_2, L_2TAG_PACKET_5_0_2, L_2TAG_PACKET_6_0_2, L_2TAG_PACKET_7_0_2; Label L_2TAG_PACKET_8_0_2; - Label L_2TAG_PACKET_12_0_2, L_2TAG_PACKET_13_0_2, B1_3, B1_5, start; + Label B1_3, B1_5, start; assert_different_registers(tmp1, tmp2, eax, ecx, edx); jmp(start); --- old/src/hotspot/cpu/x86/macroAssembler_x86_log10.cpp 2018-09-13 14:21:58.536928697 -0700 +++ new/src/hotspot/cpu/x86/macroAssembler_x86_log10.cpp 2018-09-13 14:21:58.332928704 -0700 @@ -198,7 +198,7 @@ void MacroAssembler::fast_log10(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3, XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, Register eax, Register ecx, Register edx, Register r11) { Label L_2TAG_PACKET_0_0_2, L_2TAG_PACKET_1_0_2, L_2TAG_PACKET_2_0_2, L_2TAG_PACKET_3_0_2; Label L_2TAG_PACKET_4_0_2, L_2TAG_PACKET_5_0_2, L_2TAG_PACKET_6_0_2, L_2TAG_PACKET_7_0_2; - Label L_2TAG_PACKET_8_0_2, L_2TAG_PACKET_9_0_2, B1_2, B1_3, B1_4, B1_5, start; + Label L_2TAG_PACKET_8_0_2, L_2TAG_PACKET_9_0_2, B1_2, B1_3, B1_5, start; assert_different_registers(r11, eax, ecx, edx); --- old/src/hotspot/cpu/x86/macroAssembler_x86_sin.cpp 2018-09-13 14:21:59.436928665 -0700 +++ new/src/hotspot/cpu/x86/macroAssembler_x86_sin.cpp 2018-09-13 14:21:59.176928674 -0700 @@ -383,7 +383,7 @@ Label L_2TAG_PACKET_4_0_1, L_2TAG_PACKET_5_0_1, L_2TAG_PACKET_6_0_1, L_2TAG_PACKET_7_0_1; Label L_2TAG_PACKET_8_0_1, L_2TAG_PACKET_9_0_1, L_2TAG_PACKET_10_0_1, L_2TAG_PACKET_11_0_1; Label L_2TAG_PACKET_13_0_1, L_2TAG_PACKET_14_0_1; - Label L_2TAG_PACKET_12_0_1, B1_1, B1_2, B1_4, start; + Label L_2TAG_PACKET_12_0_1, B1_4, start; assert_different_registers(tmp1, tmp2, tmp3, tmp4, eax, ebx, ecx, edx); address ONEHALF = StubRoutines::x86::_ONEHALF_addr(); @@ -1673,7 +1673,7 @@ Label B1_1, B1_2, B1_3, B1_4, B1_5, B1_6, B1_7, B1_8, B1_9, B1_10, B1_11, B1_12; Label B1_13, B1_14, B1_15, B1_16, B1_17, B1_18, B1_19, B1_20, B1_21, B1_22, B1_23; Label B1_24, B1_25, B1_26, B1_27, B1_28, B1_29, B1_30, B1_31, B1_32, B1_33, B1_34; - Label B1_35, B1_36, B1_37, B1_38, B1_39, B1_40, B1_41, B1_42, B1_43, B1_44, B1_45, B1_46; + Label B1_35, B1_36, B1_37, B1_38, B1_39, B1_40, B1_41, B1_42, B1_43, B1_46; assert_different_registers(ebx, eax, ecx, edx, esi, edi, ebp, esp); --- old/src/hotspot/cpu/x86/macroAssembler_x86_tan.cpp 2018-09-13 14:22:00.364928633 -0700 +++ new/src/hotspot/cpu/x86/macroAssembler_x86_tan.cpp 2018-09-13 14:22:00.104928642 -0700 @@ -501,7 +501,7 @@ Label L_2TAG_PACKET_0_0_1, L_2TAG_PACKET_1_0_1, L_2TAG_PACKET_2_0_1, L_2TAG_PACKET_3_0_1; Label L_2TAG_PACKET_4_0_1, L_2TAG_PACKET_5_0_1, L_2TAG_PACKET_6_0_1, L_2TAG_PACKET_7_0_1; Label L_2TAG_PACKET_8_0_1, L_2TAG_PACKET_9_0_1, L_2TAG_PACKET_10_0_1, L_2TAG_PACKET_11_0_1; - Label L_2TAG_PACKET_12_0_1, L_2TAG_PACKET_13_0_1, L_2TAG_PACKET_14_0_1, B1_2, B1_3, B1_4, B1_5, start; + Label L_2TAG_PACKET_12_0_1, L_2TAG_PACKET_13_0_1, L_2TAG_PACKET_14_0_1, B1_2, B1_4, start; address ONEHALF = (address)_ONEHALF_tan; address MUL16 = (address)_MUL16; @@ -1089,7 +1089,7 @@ Label B1_1, B1_2, B1_3, B1_4, B1_5, B1_6, B1_7, B1_8, B1_9, B1_10, B1_11, B1_12; Label B1_13, B1_14, B1_15, B1_16, B1_17, B1_18, B1_19, B1_20, B1_21, B1_22, B1_23; Label B1_24, B1_25, B1_26, B1_27, B1_28, B1_29, B1_30, B1_31, B1_32, B1_33, B1_34; - Label B1_35, B1_36, B1_37, B1_38, B1_39, B1_40, B1_41, B1_42, B1_43, B1_44, B1_45, B1_46; + Label B1_35, B1_36, B1_37, B1_38, B1_39, B1_40, B1_43; assert_different_registers(ebx, eax, ecx, edx, esi, edi, ebp, esp); @@ -1966,9 +1966,8 @@ void MacroAssembler::fast_tan(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3, XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, Register eax, Register ecx, Register edx, Register tmp) { Label L_2TAG_PACKET_0_0_2, L_2TAG_PACKET_1_0_2, L_2TAG_PACKET_2_0_2, L_2TAG_PACKET_3_0_2; - Label L_2TAG_PACKET_4_0_2, L_2TAG_PACKET_5_0_2, L_2TAG_PACKET_6_0_2, L_2TAG_PACKET_7_0_2; - Label L_2TAG_PACKET_8_0_2, L_2TAG_PACKET_9_0_2, L_2TAG_PACKET_10_0_2, L_2TAG_PACKET_11_0_2; - Label L_2TAG_PACKET_12_0_2, L_2TAG_PACKET_13_0_2, B1_3, B1_5, start; + Label L_2TAG_PACKET_4_0_2; + Label start; assert_different_registers(tmp, eax, ecx, edx); --- old/src/hotspot/cpu/x86/sharedRuntime_x86_64.cpp 2018-09-13 14:22:01.316928600 -0700 +++ new/src/hotspot/cpu/x86/sharedRuntime_x86_64.cpp 2018-09-13 14:22:01.056928609 -0700 @@ -3492,8 +3492,13 @@ // No exception case __ bind(noException); - Label no_adjust, bail, no_prefix, not_special; + Label no_adjust; +#ifdef ASSERT + Label bail; +#endif if (SafepointMechanism::uses_thread_local_poll() && !cause_return) { + Label no_prefix, not_special; + // If our stashed return pc was modified by the runtime we avoid touching it __ cmpptr(rbx, Address(rbp, wordSize)); __ jccb(Assembler::notEqual, no_adjust); --- old/src/hotspot/cpu/x86/stubGenerator_x86_64.cpp 2018-09-13 14:22:02.280928566 -0700 +++ new/src/hotspot/cpu/x86/stubGenerator_x86_64.cpp 2018-09-13 14:22:02.016928576 -0700 @@ -1906,7 +1906,7 @@ StubCodeMark mark(this, "StubRoutines", name); address start = __ pc(); - Label L_copy_bytes, L_copy_8_bytes, L_copy_2_bytes, L_exit; + Label L_copy_bytes, L_copy_8_bytes, L_exit; const Register from = rdi; // source array address const Register to = rsi; // destination array address const Register count = rdx; // elements count @@ -3848,7 +3848,7 @@ Label L__incCounter[3][6]; //for 6 blocks Label L__incCounter_single[3]; //for single block, key128, key192, key256 Label L_processTail_insr[3], L_processTail_4_insr[3], L_processTail_2_insr[3], L_processTail_1_insr[3], L_processTail_exit_insr[3]; - Label L_processTail_extr[3], L_processTail_4_extr[3], L_processTail_2_extr[3], L_processTail_1_extr[3], L_processTail_exit_extr[3]; + Label L_processTail_4_extr[3], L_processTail_2_extr[3], L_processTail_1_extr[3], L_processTail_exit_extr[3]; Label L_exit; --- old/src/hotspot/cpu/x86/templateInterpreterGenerator_x86.cpp 2018-09-13 14:22:03.288928531 -0700 +++ new/src/hotspot/cpu/x86/templateInterpreterGenerator_x86.cpp 2018-09-13 14:22:03.028928540 -0700 @@ -1171,7 +1171,7 @@ // and result handler will pick it up { - Label no_oop, not_weak, store_result; + Label no_oop; __ lea(t, ExternalAddress(AbstractInterpreter::result_handler(T_OBJECT))); __ cmpptr(t, Address(rbp, frame::interpreter_frame_result_handler_offset*wordSize)); __ jcc(Assembler::notEqual, no_oop); --- old/src/hotspot/cpu/x86/templateTable_x86.cpp 2018-09-13 14:22:04.272928497 -0700 +++ new/src/hotspot/cpu/x86/templateTable_x86.cpp 2018-09-13 14:22:04.016928506 -0700 @@ -2875,7 +2875,7 @@ const Address field(obj, off, Address::times_1, 0*wordSize); - Label Done, notByte, notBool, notInt, notShort, notChar, notLong, notFloat, notObj, notDouble; + Label Done, notByte, notBool, notInt, notShort, notChar, notLong, notFloat, notObj; __ shrl(flags, ConstantPoolCacheEntry::tos_state_shift); // Make sure we don't need to mask edx after the above shift @@ -2981,6 +2981,7 @@ __ bind(notFloat); #ifdef ASSERT + Label notDouble; __ cmpl(flags, dtos); __ jcc(Assembler::notEqual, notDouble); #endif @@ -3132,7 +3133,7 @@ NOT_LP64( const Address hi(obj, off, Address::times_1, 1*wordSize);) Label notByte, notBool, notInt, notShort, notChar, - notLong, notFloat, notObj, notDouble; + notLong, notFloat, notObj; __ shrl(flags, ConstantPoolCacheEntry::tos_state_shift); @@ -3286,6 +3287,7 @@ __ bind(notFloat); #ifdef ASSERT + Label notDouble; __ cmpl(flags, dtos); __ jcc(Assembler::notEqual, notDouble); #endif