1 /*
   2  * Copyright (c) 2009, 2019, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  */
  23 package jdk.vm.ci.code;
  24 
  25 import java.nio.ByteOrder;
  26 
  27 import jdk.vm.ci.code.Register.RegisterCategory;
  28 import jdk.vm.ci.meta.JavaKind;
  29 import jdk.vm.ci.meta.PlatformKind;
  30 
  31 /**
  32  * Represents a CPU architecture, including information such as its endianness, CPU registers, word
  33  * width, etc.
  34  */
  35 public abstract class Architecture {
  36 
  37     /**
  38      * The architecture specific type of a native word.
  39      */
  40     private final PlatformKind wordKind;
  41 
  42     /**
  43      * The name of this architecture (e.g. "AMD64", "SPARCv9").
  44      */
  45     private final String name;
  46 
  47     /**
  48      * List of all available registers on this architecture. The index of each register in this list
  49      * is equal to its {@linkplain Register#number number}.
  50      */
  51     private final RegisterArray registers;
  52 
  53     /**
  54      * The byte ordering can be either little or big endian.
  55      */
  56     private final ByteOrder byteOrder;
  57 
  58     /**
  59      * Whether the architecture supports unaligned memory accesses.
  60      */
  61     private final boolean unalignedMemoryAccess;
  62 
  63     /**

   1 /*
   2  * Copyright (c) 2009, 2020, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  */
  23 package jdk.vm.ci.code;
  24 
  25 import java.nio.ByteOrder;
  26 
  27 import jdk.vm.ci.code.Register.RegisterCategory;
  28 import jdk.vm.ci.meta.JavaKind;
  29 import jdk.vm.ci.meta.PlatformKind;
  30 
  31 /**
  32  * Represents a CPU architecture, including information such as its endianness, CPU registers, word
  33  * width, etc.
  34  */
  35 public abstract class Architecture {
  36 
  37     /**
  38      * The architecture specific type of a native word.
  39      */
  40     private final PlatformKind wordKind;
  41 
  42     /**
  43      * The name of this architecture (e.g. "AMD64").
  44      */
  45     private final String name;
  46 
  47     /**
  48      * List of all available registers on this architecture. The index of each register in this list
  49      * is equal to its {@linkplain Register#number number}.
  50      */
  51     private final RegisterArray registers;
  52 
  53     /**
  54      * The byte ordering can be either little or big endian.
  55      */
  56     private final ByteOrder byteOrder;
  57 
  58     /**
  59      * Whether the architecture supports unaligned memory accesses.
  60      */
  61     private final boolean unalignedMemoryAccess;
  62 
  63     /**