src/cpu/sparc/vm/nativeInst_sparc.cpp

Print this page

        

*** 160,170 **** assert(NativeCall::instruction_size == 8, "wrong instruction size; must be 8"); int i0 = ((int*)code_buffer)[0]; int i1 = ((int*)code_buffer)[1]; int* contention_addr = (int*) n_call->addr_at(1*BytesPerInstWord); assert(inv_op(*contention_addr) == Assembler::arith_op || ! *contention_addr == nop_instruction() || !VM_Version::v9_instructions_work(), "must not interfere with original call"); // The set_long_at calls do the ICacheInvalidate so we just need to do them in reverse order n_call->set_long_at(1*BytesPerInstWord, i1); n_call->set_long_at(0*BytesPerInstWord, i0); // NOTE: It is possible that another thread T will execute --- 160,170 ---- assert(NativeCall::instruction_size == 8, "wrong instruction size; must be 8"); int i0 = ((int*)code_buffer)[0]; int i1 = ((int*)code_buffer)[1]; int* contention_addr = (int*) n_call->addr_at(1*BytesPerInstWord); assert(inv_op(*contention_addr) == Assembler::arith_op || ! *contention_addr == nop_instruction(), "must not interfere with original call"); // The set_long_at calls do the ICacheInvalidate so we just need to do them in reverse order n_call->set_long_at(1*BytesPerInstWord, i1); n_call->set_long_at(0*BytesPerInstWord, i0); // NOTE: It is possible that another thread T will execute
*** 179,189 **** // This is OK, because the patching stub ignores the value of %r. // Make sure the first-patched instruction, which may co-exist // briefly with the call, will do something harmless. assert(inv_op(*contention_addr) == Assembler::arith_op || ! *contention_addr == nop_instruction() || !VM_Version::v9_instructions_work(), "must not interfere with original call"); } // Similar to replace_mt_safe, but just changes the destination. The // important thing is that free-running threads are able to execute this --- 179,189 ---- // This is OK, because the patching stub ignores the value of %r. // Make sure the first-patched instruction, which may co-exist // briefly with the call, will do something harmless. assert(inv_op(*contention_addr) == Assembler::arith_op || ! *contention_addr == nop_instruction(), "must not interfere with original call"); } // Similar to replace_mt_safe, but just changes the destination. The // important thing is that free-running threads are able to execute this
*** 931,945 **** // %%%%% For now, do something MT-stupid: ResourceMark rm; int code_size = 1 * BytesPerInstWord; CodeBuffer cb(verified_entry, code_size + 1); MacroAssembler* a = new MacroAssembler(&cb); - if (VM_Version::v9_instructions_work()) { a->ldsw(G0, 0, O7); // "ld" must agree with code in the signal handler - } else { - a->lduw(G0, 0, O7); // "ld" must agree with code in the signal handler - } ICache::invalidate_range(verified_entry, code_size); } void NativeIllegalInstruction::insert(address code_pos) { --- 931,941 ----
*** 1022,1032 **** assert(NativeGeneralJump::instruction_size == 8, "wrong instruction size; must be 8"); int i0 = ((int*)code_buffer)[0]; int i1 = ((int*)code_buffer)[1]; int* contention_addr = (int*) h_jump->addr_at(1*BytesPerInstWord); assert(inv_op(*contention_addr) == Assembler::arith_op || ! *contention_addr == nop_instruction() || !VM_Version::v9_instructions_work(), "must not interfere with original call"); // The set_long_at calls do the ICacheInvalidate so we just need to do them in reverse order h_jump->set_long_at(1*BytesPerInstWord, i1); h_jump->set_long_at(0*BytesPerInstWord, i0); // NOTE: It is possible that another thread T will execute --- 1018,1028 ---- assert(NativeGeneralJump::instruction_size == 8, "wrong instruction size; must be 8"); int i0 = ((int*)code_buffer)[0]; int i1 = ((int*)code_buffer)[1]; int* contention_addr = (int*) h_jump->addr_at(1*BytesPerInstWord); assert(inv_op(*contention_addr) == Assembler::arith_op || ! *contention_addr == nop_instruction(), "must not interfere with original call"); // The set_long_at calls do the ICacheInvalidate so we just need to do them in reverse order h_jump->set_long_at(1*BytesPerInstWord, i1); h_jump->set_long_at(0*BytesPerInstWord, i0); // NOTE: It is possible that another thread T will execute
*** 1041,1048 **** // This is OK, because the patching stub ignores the value of %r. // Make sure the first-patched instruction, which may co-exist // briefly with the call, will do something harmless. assert(inv_op(*contention_addr) == Assembler::arith_op || ! *contention_addr == nop_instruction() || !VM_Version::v9_instructions_work(), "must not interfere with original call"); } --- 1037,1044 ---- // This is OK, because the patching stub ignores the value of %r. // Make sure the first-patched instruction, which may co-exist // briefly with the call, will do something harmless. assert(inv_op(*contention_addr) == Assembler::arith_op || ! *contention_addr == nop_instruction(), "must not interfere with original call"); }