src/cpu/sparc/vm/templateTable_sparc.cpp
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@@ -1336,18 +1336,17 @@
}
void TemplateTable::fneg() {
transition(ftos, ftos);
- __ fneg(FloatRegisterImpl::S, Ftos_f);
+ __ fneg(FloatRegisterImpl::S, Ftos_f, Ftos_f);
}
void TemplateTable::dneg() {
transition(dtos, dtos);
- // v8 has fnegd if source and dest are the same
- __ fneg(FloatRegisterImpl::D, Ftos_f);
+ __ fneg(FloatRegisterImpl::D, Ftos_f, Ftos_f);
}
void TemplateTable::iinc() {
transition(vtos, vtos);
@@ -1468,35 +1467,21 @@
case Bytecodes::_l2f:
case Bytecodes::_l2d:
__ st_long(Otos_l, __ d_tmp);
__ ldf(FloatRegisterImpl::D, __ d_tmp, Ftos_d);
- if (VM_Version::v9_instructions_work()) {
if (bytecode() == Bytecodes::_l2f) {
__ fxtof(FloatRegisterImpl::S, Ftos_d, Ftos_f);
} else {
__ fxtof(FloatRegisterImpl::D, Ftos_d, Ftos_d);
}
- } else {
- __ call_VM_leaf(
- Lscratch,
- bytecode() == Bytecodes::_l2f
- ? CAST_FROM_FN_PTR(address, SharedRuntime::l2f)
- : CAST_FROM_FN_PTR(address, SharedRuntime::l2d)
- );
- }
break;
case Bytecodes::_f2i: {
Label isNaN;
// result must be 0 if value is NaN; test by comparing value to itself
__ fcmp(FloatRegisterImpl::S, Assembler::fcc0, Ftos_f, Ftos_f);
- // According to the v8 manual, you have to have a non-fp instruction
- // between fcmp and fb.
- if (!VM_Version::v9_instructions_work()) {
- __ nop();
- }
__ fb(Assembler::f_unordered, true, Assembler::pn, isNaN);
__ delayed()->clr(Otos_i); // NaN
__ ftoi(FloatRegisterImpl::S, Ftos_f, F30);
__ stf(FloatRegisterImpl::S, F30, __ d_tmp);
__ ld(__ d_tmp, Otos_i);
@@ -1535,20 +1520,11 @@
? CAST_FROM_FN_PTR(address, SharedRuntime::d2i)
: CAST_FROM_FN_PTR(address, SharedRuntime::d2l));
break;
case Bytecodes::_d2f:
- if (VM_Version::v9_instructions_work()) {
__ ftof( FloatRegisterImpl::D, FloatRegisterImpl::S, Ftos_d, Ftos_f);
- }
- else {
- // must uncache tos
- __ push_d();
- __ pop_i(O0);
- __ pop_i(O1);
- __ call_VM_leaf(Lscratch, CAST_FROM_FN_PTR(address, SharedRuntime::d2f));
- }
break;
default: ShouldNotReachHere();
}
__ bind(done);
@@ -1954,21 +1930,12 @@
// }
__ sll( Rh, log_entry_size, Rscratch );
__ ld( Rarray, Rscratch, Rscratch );
// (Rscratch is already in the native byte-ordering.)
__ cmp( Rkey, Rscratch );
- if ( VM_Version::v9_instructions_work() ) {
__ movcc( Assembler::less, false, Assembler::icc, Rh, Rj ); // j = h if (key < array[h].fast_match())
__ movcc( Assembler::greaterEqual, false, Assembler::icc, Rh, Ri ); // i = h if (key >= array[h].fast_match())
- }
- else {
- Label end_of_if;
- __ br( Assembler::less, true, Assembler::pt, end_of_if );
- __ delayed()->mov( Rh, Rj ); // if (<) Rj = Rh
- __ mov( Rh, Ri ); // else i = h
- __ bind(end_of_if); // }
- }
// while (i+1 < j)
__ bind( entry );
__ add( Ri, 1, Rscratch );
__ cmp(Rscratch, Rj);
@@ -3416,13 +3383,11 @@
// RnewTopValue contains the top address after the new object
// has been allocated.
__ cmp_and_brx_short(RnewTopValue, RendValue, Assembler::greaterUnsigned, Assembler::pn, slow_case);
- __ casx_under_lock(RtopAddr, RoldTopValue, RnewTopValue,
- VM_Version::v9_instructions_work() ? NULL :
- (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr());
+ __ cas_ptr(RtopAddr, RoldTopValue, RnewTopValue);
// if someone beat us on the allocation, try again, otherwise continue
__ cmp_and_brx_short(RoldTopValue, RnewTopValue, Assembler::notEqual, Assembler::pn, retry);
// bump total bytes allocated by this thread
@@ -3699,18 +3664,11 @@
__ bind( loop );
__ verify_oop(O4); // verify each monitor's oop
__ tst(O4); // is this entry unused?
- if (VM_Version::v9_instructions_work())
__ movcc( Assembler::zero, false, Assembler::ptr_cc, O3, O1);
- else {
- Label L;
- __ br( Assembler::zero, true, Assembler::pn, L );
- __ delayed()->mov(O3, O1); // rememeber this one if match
- __ bind(L);
- }
__ cmp(O4, O0); // check if current entry is for same object
__ brx( Assembler::equal, false, Assembler::pn, exit );
__ delayed()->inc( O3, frame::interpreter_frame_monitor_size() * wordSize ); // check next one