1371 break;
1372 default:
1373 ShouldNotReachHere();
1374 }
1375 return size;
1376 }
1377
1378 // Limits on vector size (number of elements) loaded into vector.
1379 const int Matcher::max_vector_size(const BasicType bt) {
1380 return vector_width_in_bytes(bt)/type2aelembytes(bt);
1381 }
1382 const int Matcher::min_vector_size(const BasicType bt) {
1383 int max_size = max_vector_size(bt);
1384 // Min size which can be loaded into vector is 4 bytes.
1385 int size = (type2aelembytes(bt) == 1) ? 4 : 2;
1386 return MIN2(size,max_size);
1387 }
1388
1389 // Vector ideal reg corresponding to specidied size in bytes
1390 const uint Matcher::vector_ideal_reg(int size) {
1391 assert(MaxVectorSize >= size, "");
1392 switch(size) {
1393 case 4: return Op_VecS;
1394 case 8: return Op_VecD;
1395 case 16: return Op_VecX;
1396 case 32: return Op_VecY;
1397 case 64: return Op_VecZ;
1398 }
1399 ShouldNotReachHere();
1400 return 0;
1401 }
1402
1403 // Only lowest bits of xmm reg are used for vector shift count.
1404 const uint Matcher::vector_shift_count_ideal_reg(int size) {
1405 return Op_VecS;
1406 }
1407
1408 // x86 supports misaligned vectors store/load.
1409 const bool Matcher::misaligned_vectors_ok() {
1410 return !AlignVector; // can be changed by flag
1411 }
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1371 break;
1372 default:
1373 ShouldNotReachHere();
1374 }
1375 return size;
1376 }
1377
1378 // Limits on vector size (number of elements) loaded into vector.
1379 const int Matcher::max_vector_size(const BasicType bt) {
1380 return vector_width_in_bytes(bt)/type2aelembytes(bt);
1381 }
1382 const int Matcher::min_vector_size(const BasicType bt) {
1383 int max_size = max_vector_size(bt);
1384 // Min size which can be loaded into vector is 4 bytes.
1385 int size = (type2aelembytes(bt) == 1) ? 4 : 2;
1386 return MIN2(size,max_size);
1387 }
1388
1389 // Vector ideal reg corresponding to specidied size in bytes
1390 const uint Matcher::vector_ideal_reg(int size) {
1391 switch(size) {
1392 case 4: return Op_VecS;
1393 case 8: return Op_VecD;
1394 case 16: return Op_VecX;
1395 case 32: return Op_VecY;
1396 case 64: return Op_VecZ;
1397 }
1398 ShouldNotReachHere();
1399 return 0;
1400 }
1401
1402 // Only lowest bits of xmm reg are used for vector shift count.
1403 const uint Matcher::vector_shift_count_ideal_reg(int size) {
1404 return Op_VecS;
1405 }
1406
1407 // x86 supports misaligned vectors store/load.
1408 const bool Matcher::misaligned_vectors_ok() {
1409 return !AlignVector; // can be changed by flag
1410 }
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