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src/cpu/sparc/vm/macroAssembler_sparc.inline.hpp

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*** 183,193 **** inline void MacroAssembler::br( Condition c, bool a, Predict p, address d, relocInfo::relocType rt ) { Assembler::bp(c, a, icc, p, d, rt); } inline void MacroAssembler::br( Condition c, bool a, Predict p, Label& L ) { ! insert_nop_after_cbcond(); br(c, a, p, target(L)); } // Branch that tests either xcc or icc depending on the --- 183,194 ---- inline void MacroAssembler::br( Condition c, bool a, Predict p, address d, relocInfo::relocType rt ) { Assembler::bp(c, a, icc, p, d, rt); } inline void MacroAssembler::br( Condition c, bool a, Predict p, Label& L ) { ! // See note[+] on 'avoid_pipeline_stalls()', in "assembler_sparc.inline.hpp". ! avoid_pipeline_stall(); br(c, a, p, target(L)); } // Branch that tests either xcc or icc depending on the
*** 195,205 **** inline void MacroAssembler::brx( Condition c, bool a, Predict p, address d, relocInfo::relocType rt ) { Assembler::bp(c, a, xcc, p, d, rt); } inline void MacroAssembler::brx( Condition c, bool a, Predict p, Label& L ) { ! insert_nop_after_cbcond(); brx(c, a, p, target(L)); } inline void MacroAssembler::ba( Label& L ) { br(always, false, pt, L); --- 196,206 ---- inline void MacroAssembler::brx( Condition c, bool a, Predict p, address d, relocInfo::relocType rt ) { Assembler::bp(c, a, xcc, p, d, rt); } inline void MacroAssembler::brx( Condition c, bool a, Predict p, Label& L ) { ! avoid_pipeline_stall(); brx(c, a, p, target(L)); } inline void MacroAssembler::ba( Label& L ) { br(always, false, pt, L);
*** 217,227 **** inline void MacroAssembler::fb( Condition c, bool a, Predict p, address d, relocInfo::relocType rt ) { fbp(c, a, fcc0, p, d, rt); } inline void MacroAssembler::fb( Condition c, bool a, Predict p, Label& L ) { ! insert_nop_after_cbcond(); fb(c, a, p, target(L)); } inline void MacroAssembler::fbp( Condition c, bool a, CC cc, Predict p, address d, relocInfo::relocType rt ) { Assembler::fbp(c, a, cc, p, d, rt); --- 218,228 ---- inline void MacroAssembler::fb( Condition c, bool a, Predict p, address d, relocInfo::relocType rt ) { fbp(c, a, fcc0, p, d, rt); } inline void MacroAssembler::fb( Condition c, bool a, Predict p, Label& L ) { ! avoid_pipeline_stall(); fb(c, a, p, target(L)); } inline void MacroAssembler::fbp( Condition c, bool a, CC cc, Predict p, address d, relocInfo::relocType rt ) { Assembler::fbp(c, a, cc, p, d, rt);
*** 267,282 **** Assembler::call(d, rspec); } } inline void MacroAssembler::call( Label& L, relocInfo::relocType rt ) { ! insert_nop_after_cbcond(); ! MacroAssembler::call( target(L), rt); } - inline void MacroAssembler::callr( Register s1, Register s2 ) { jmpl( s1, s2, O7 ); } inline void MacroAssembler::callr( Register s1, int simm13a, RelocationHolder const& rspec ) { jmpl( s1, simm13a, O7, rspec); } // prefetch instruction inline void MacroAssembler::iprefetch( address d, relocInfo::relocType rt ) { --- 268,282 ---- Assembler::call(d, rspec); } } inline void MacroAssembler::call( Label& L, relocInfo::relocType rt ) { ! avoid_pipeline_stall(); ! MacroAssembler::call(target(L), rt); } inline void MacroAssembler::callr( Register s1, Register s2 ) { jmpl( s1, s2, O7 ); } inline void MacroAssembler::callr( Register s1, int simm13a, RelocationHolder const& rspec ) { jmpl( s1, simm13a, O7, rspec); } // prefetch instruction inline void MacroAssembler::iprefetch( address d, relocInfo::relocType rt ) {
*** 302,318 **** } else { jmpl( O7, 2 * BytesPerInstWord, G0 ); } } - // clobbers o7 on V8!! - // returns delta from gotten pc to addr after - inline int MacroAssembler::get_pc( Register d ) { - int x = offset(); - rdpc(d); - return offset() - x; - } inline void MacroAssembler::cmp( Register s1, Register s2 ) { subcc( s1, s2, G0 ); } inline void MacroAssembler::cmp( Register s1, int simm13a ) { subcc( s1, simm13a, G0 ); } // Note: All MacroAssembler::set_foo functions are defined out-of-line. --- 302,311 ----
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