< prev index next >

src/cpu/sparc/vm/assembler_sparc.cpp

Print this page

        

*** 24,31 **** --- 24,61 ---- #include "precompiled.hpp" #include "asm/assembler.hpp" #include "asm/assembler.inline.hpp" + #include "assembler_sparc.hpp" + int AbstractAssembler::code_fill_byte() { return 0x00; // illegal instruction 0x00000000 } + + #ifdef VALIDATE_PIPELINE + /* Walk over the current code section and verify that there are no obvious + * pipeline hazards exposed in the code generated. + */ + void Assembler::validate_no_pipeline_hazards() { + const CodeSection* csect = code_section(); + + address addr0 = csect->start(); + address addrN = csect->end(); + uint32_t prev = 0; + + assert((addrN - addr0) % BytesPerInstWord == 0, "must be"); + + for (address pc = addr0; pc != addrN; pc += BytesPerInstWord) { + uint32_t insn = *reinterpret_cast<uint32_t*>(pc); + + // 1. General case: No CTI immediately after other CTI + assert(!(is_cti(prev) && is_cti(insn)), "CTI-CTI not allowed."); + + // 2. Special case: No CTI immediately after/before RDPC + assert(!(is_cti(prev) && is_rdpc(insn)), "CTI-RDPC not allowed."); + assert(!(is_rdpc(prev) && is_cti(insn)), "RDPC-CTI not allowed."); + + prev = insn; + } + } + #endif
< prev index next >