src/os_cpu/solaris_sparc/vm/vm_version_solaris_sparc.cpp

*** 378,388 ****
    if (av & AV_SPARC_PAUSE)        features |= ISA_pause_msk;
    if (av & AV_SPARC_CBCOND)       features |= ISA_cbcond_msk;
    if (av & AV_SPARC_CRC32C)       features |= ISA_crc32c_msk;
  
  #ifndef AV2_SPARC_FJATHPLUS
! #define AV2_SPARC_FJATHPLUS  0x00000001 // Fujitsu Athena+
  #endif
  #ifndef AV2_SPARC_VIS3B
  #define AV2_SPARC_VIS3B      0x00000002 // VIS3 present on multiple chips
  #endif
  #ifndef AV2_SPARC_ADI
--- 378,388 ----
    if (av & AV_SPARC_PAUSE)        features |= ISA_pause_msk;
    if (av & AV_SPARC_CBCOND)       features |= ISA_cbcond_msk;
    if (av & AV_SPARC_CRC32C)       features |= ISA_crc32c_msk;
  
  #ifndef AV2_SPARC_FJATHPLUS
! #define AV2_SPARC_FJATHPLUS  0x00000001 // Fujitsu Athena+ insns
  #endif
  #ifndef AV2_SPARC_VIS3B
  #define AV2_SPARC_VIS3B      0x00000002 // VIS3 present on multiple chips
  #endif
  #ifndef AV2_SPARC_ADI
*** 405,414 ****
--- 405,442 ----
  #endif
  #ifndef AV2_SPARC_VAMASK
  #define AV2_SPARC_VAMASK     0x00000100 // Virtual Address masking
  #endif
  
+ #ifndef AV2_SPARC_SPARC6
+ #define AV2_SPARC_SPARC6     0x00000200 // REVB*, FPSLL*, RDENTROPY, LDM* and STM*
+ #endif
+ #ifndef AV2_SPARC_DICTUNP
+ #define AV2_SPARC_DICTUNP    0x00002000 // Dictionary unpack instruction
+ #endif
+ #ifndef AV2_SPARC_FPCMPSHL
+ #define AV2_SPARC_FPCMPSHL   0x00004000 // Partition compare with shifted result
+ #endif
+ #ifndef AV2_SPARC_RLE
+ #define AV2_SPARC_RLE        0x00008000 // Run-length encoded burst and length
+ #endif
+ #ifndef AV2_SPARC_SHA3
+ #define AV2_SPARC_SHA3       0x00010000 // SHA3 instructions
+ #endif
+ #ifndef AV2_SPARC_FJATHPLUS2
+ #define AV2_SPARC_FJATHPLUS2 0x00020000 // Fujitsu Athena++ insns
+ #endif
+ #ifndef AV2_SPARC_VIS3C
+ #define AV2_SPARC_VIS3C      0x00040000 // Subset of VIS3 insns provided by Athena++
+ #endif
+ #ifndef AV2_SPARC_SPARC5B
+ #define AV2_SPARC_SPARC5B    0x00080000 // subset of SPARC5 insns (fpadd8, fpsub8)
+ #endif
+ #ifndef AV2_SPARC_MME
+ #define AV2_SPARC_MME        0x00100000 // Misaligned Mitigation Enable
+ #endif
+ 
    if (avn > 1) {
      uint32_t av2 = avs[AV_HW2_IDX];
  
      if (av2 & AV2_SPARC_FJATHPLUS)  features |= ISA_fjathplus_msk;
      if (av2 & AV2_SPARC_VIS3B)      features |= ISA_vis3b_msk;
*** 417,439 ****
      if (av2 & AV2_SPARC_MWAIT)      features |= ISA_mwait_msk;
      if (av2 & AV2_SPARC_XMPMUL)     features |= ISA_xmpmul_msk;
      if (av2 & AV2_SPARC_XMONT)      features |= ISA_xmont_msk;
      if (av2 & AV2_SPARC_PAUSE_NSEC) features |= ISA_pause_nsec_msk;
      if (av2 & AV2_SPARC_VAMASK)     features |= ISA_vamask_msk;
    }
  
    _features = features;     // ISA feature set completed, update state.
  
    Sysinfo machine(SI_MACHINE);
  
!   bool is_sun4v = machine.match("sun4v");   // All Oracle SPARC + Fujitsu Athena+
    bool is_sun4u = machine.match("sun4u");   // All other Fujitsu
  
!   // Handle Athena+ conservatively (simply because we are lacking info.).
  
!   bool do_sun4v = is_sun4v && !has_athena_plus();
!   bool do_sun4u = is_sun4u ||  has_athena_plus();
  
    uint64_t synthetic = 0;
  
    if (do_sun4v) {
      // Indirect and direct branches are equally fast.
--- 445,478 ----
      if (av2 & AV2_SPARC_MWAIT)      features |= ISA_mwait_msk;
      if (av2 & AV2_SPARC_XMPMUL)     features |= ISA_xmpmul_msk;
      if (av2 & AV2_SPARC_XMONT)      features |= ISA_xmont_msk;
      if (av2 & AV2_SPARC_PAUSE_NSEC) features |= ISA_pause_nsec_msk;
      if (av2 & AV2_SPARC_VAMASK)     features |= ISA_vamask_msk;
+ 
+     if (av2 & AV2_SPARC_SPARC6)     features |= ISA_sparc6_msk;
+     if (av2 & AV2_SPARC_DICTUNP)    features |= ISA_dictunp_msk;
+     if (av2 & AV2_SPARC_FPCMPSHL)   features |= ISA_fpcmpshl_msk;
+     if (av2 & AV2_SPARC_RLE)        features |= ISA_rle_msk;
+     if (av2 & AV2_SPARC_SHA3)       features |= ISA_sha3_msk;
+     if (av2 & AV2_SPARC_FJATHPLUS2) features |= ISA_fjathplus2_msk;
+     if (av2 & AV2_SPARC_VIS3C)      features |= ISA_vis3c_msk;
+     if (av2 & AV2_SPARC_SPARC5B)    features |= ISA_sparc5b_msk;
+     if (av2 & AV2_SPARC_MME)        features |= ISA_mme_msk;
    }
  
    _features = features;     // ISA feature set completed, update state.
  
    Sysinfo machine(SI_MACHINE);
  
!   bool is_sun4v = machine.match("sun4v");   // All Oracle SPARC + Fujitsu Athena+/++
    bool is_sun4u = machine.match("sun4u");   // All other Fujitsu
  
!   // Handle Athena+/++ conservatively (simply because we are lacking info.).
  
!   bool an_athena = has_athena_plus() || has_athena_plus2();
!   bool do_sun4v  = is_sun4v && !an_athena;
!   bool do_sun4u  = is_sun4u ||  an_athena;
  
    uint64_t synthetic = 0;
  
    if (do_sun4v) {
      // Indirect and direct branches are equally fast.