1 /* 2 * Copyright 2005-2009 Sun Microsystems, Inc. All Rights Reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, 20 * CA 95054 USA or visit www.sun.com if you need additional information or 21 * have any questions. 22 * 23 */ 24 25 # include "incls/_precompiled.incl" 26 # include "incls/_c1_LIRGenerator_sparc.cpp.incl" 27 28 #ifdef ASSERT 29 #define __ gen()->lir(__FILE__, __LINE__)-> 30 #else 31 #define __ gen()->lir()-> 32 #endif 33 34 void LIRItem::load_byte_item() { 35 // byte loads use same registers as other loads 36 load_item(); 37 } 38 39 40 void LIRItem::load_nonconstant() { 41 LIR_Opr r = value()->operand(); 42 if (_gen->can_inline_as_constant(value())) { 43 if (!r->is_constant()) { 44 r = LIR_OprFact::value_type(value()->type()); 45 } 46 _result = r; 47 } else { 48 load_item(); 49 } 50 } 51 52 53 //-------------------------------------------------------------- 54 // LIRGenerator 55 //-------------------------------------------------------------- 56 57 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::Oexception_opr; } 58 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::Oissuing_pc_opr; } 59 LIR_Opr LIRGenerator::syncTempOpr() { return new_register(T_OBJECT); } 60 LIR_Opr LIRGenerator::getThreadTemp() { return rlock_callee_saved(T_INT); } 61 62 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) { 63 LIR_Opr opr; 64 switch (type->tag()) { 65 case intTag: opr = callee ? FrameMap::I0_opr : FrameMap::O0_opr; break; 66 case objectTag: opr = callee ? FrameMap::I0_oop_opr : FrameMap::O0_oop_opr; break; 67 case longTag: opr = callee ? FrameMap::in_long_opr : FrameMap::out_long_opr; break; 68 case floatTag: opr = FrameMap::F0_opr; break; 69 case doubleTag: opr = FrameMap::F0_double_opr; break; 70 71 case addressTag: 72 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr; 73 } 74 75 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch"); 76 return opr; 77 } 78 79 LIR_Opr LIRGenerator::rlock_callee_saved(BasicType type) { 80 LIR_Opr reg = new_register(type); 81 set_vreg_flag(reg, callee_saved); 82 return reg; 83 } 84 85 86 LIR_Opr LIRGenerator::rlock_byte(BasicType type) { 87 return new_register(T_INT); 88 } 89 90 91 92 93 94 //--------- loading items into registers -------------------------------- 95 96 // SPARC cannot inline all constants 97 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const { 98 if (v->type()->as_IntConstant() != NULL) { 99 return v->type()->as_IntConstant()->value() == 0; 100 } else if (v->type()->as_LongConstant() != NULL) { 101 return v->type()->as_LongConstant()->value() == 0L; 102 } else if (v->type()->as_ObjectConstant() != NULL) { 103 return v->type()->as_ObjectConstant()->value()->is_null_object(); 104 } else { 105 return false; 106 } 107 } 108 109 110 // only simm13 constants can be inlined 111 bool LIRGenerator:: can_inline_as_constant(Value i) const { 112 if (i->type()->as_IntConstant() != NULL) { 113 return Assembler::is_simm13(i->type()->as_IntConstant()->value()); 114 } else { 115 return can_store_as_constant(i, as_BasicType(i->type())); 116 } 117 } 118 119 120 bool LIRGenerator:: can_inline_as_constant(LIR_Const* c) const { 121 if (c->type() == T_INT) { 122 return Assembler::is_simm13(c->as_jint()); 123 } 124 return false; 125 } 126 127 128 LIR_Opr LIRGenerator::safepoint_poll_register() { 129 return new_register(T_INT); 130 } 131 132 133 134 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index, 135 int shift, int disp, BasicType type) { 136 assert(base->is_register(), "must be"); 137 138 // accumulate fixed displacements 139 if (index->is_constant()) { 140 disp += index->as_constant_ptr()->as_jint() << shift; 141 index = LIR_OprFact::illegalOpr; 142 } 143 144 if (index->is_register()) { 145 // apply the shift and accumulate the displacement 146 if (shift > 0) { 147 LIR_Opr tmp = new_register(T_INT); 148 __ shift_left(index, shift, tmp); 149 index = tmp; 150 } 151 if (disp != 0) { 152 LIR_Opr tmp = new_register(T_INT); 153 if (Assembler::is_simm13(disp)) { 154 __ add(tmp, LIR_OprFact::intConst(disp), tmp); 155 index = tmp; 156 } else { 157 __ move(LIR_OprFact::intConst(disp), tmp); 158 __ add(tmp, index, tmp); 159 index = tmp; 160 } 161 disp = 0; 162 } 163 } else if (disp != 0 && !Assembler::is_simm13(disp)) { 164 // index is illegal so replace it with the displacement loaded into a register 165 index = new_register(T_INT); 166 __ move(LIR_OprFact::intConst(disp), index); 167 disp = 0; 168 } 169 170 // at this point we either have base + index or base + displacement 171 if (disp == 0) { 172 return new LIR_Address(base, index, type); 173 } else { 174 assert(Assembler::is_simm13(disp), "must be"); 175 return new LIR_Address(base, disp, type); 176 } 177 } 178 179 180 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr, 181 BasicType type, bool needs_card_mark) { 182 int elem_size = type2aelembytes(type); 183 int shift = exact_log2(elem_size); 184 185 LIR_Opr base_opr; 186 int offset = arrayOopDesc::base_offset_in_bytes(type); 187 188 if (index_opr->is_constant()) { 189 int i = index_opr->as_constant_ptr()->as_jint(); 190 int array_offset = i * elem_size; 191 if (Assembler::is_simm13(array_offset + offset)) { 192 base_opr = array_opr; 193 offset = array_offset + offset; 194 } else { 195 base_opr = new_pointer_register(); 196 if (Assembler::is_simm13(array_offset)) { 197 __ add(array_opr, LIR_OprFact::intptrConst(array_offset), base_opr); 198 } else { 199 __ move(LIR_OprFact::intptrConst(array_offset), base_opr); 200 __ add(base_opr, array_opr, base_opr); 201 } 202 } 203 } else { 204 #ifdef _LP64 205 if (index_opr->type() == T_INT) { 206 LIR_Opr tmp = new_register(T_LONG); 207 __ convert(Bytecodes::_i2l, index_opr, tmp); 208 index_opr = tmp; 209 } 210 #endif 211 212 base_opr = new_pointer_register(); 213 assert (index_opr->is_register(), "Must be register"); 214 if (shift > 0) { 215 __ shift_left(index_opr, shift, base_opr); 216 __ add(base_opr, array_opr, base_opr); 217 } else { 218 __ add(index_opr, array_opr, base_opr); 219 } 220 } 221 if (needs_card_mark) { 222 LIR_Opr ptr = new_pointer_register(); 223 __ add(base_opr, LIR_OprFact::intptrConst(offset), ptr); 224 return new LIR_Address(ptr, 0, type); 225 } else { 226 return new LIR_Address(base_opr, offset, type); 227 } 228 } 229 230 231 void LIRGenerator::increment_counter(address counter, int step) { 232 LIR_Opr pointer = new_pointer_register(); 233 __ move(LIR_OprFact::intptrConst(counter), pointer); 234 LIR_Address* addr = new LIR_Address(pointer, 0, T_INT); 235 increment_counter(addr, step); 236 } 237 238 void LIRGenerator::increment_counter(LIR_Address* addr, int step) { 239 LIR_Opr temp = new_register(T_INT); 240 __ move(addr, temp); 241 LIR_Opr c = LIR_OprFact::intConst(step); 242 if (Assembler::is_simm13(step)) { 243 __ add(temp, c, temp); 244 } else { 245 LIR_Opr temp2 = new_register(T_INT); 246 __ move(c, temp2); 247 __ add(temp, temp2, temp); 248 } 249 __ move(temp, addr); 250 } 251 252 253 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { 254 LIR_Opr o7opr = FrameMap::O7_opr; 255 __ load(new LIR_Address(base, disp, T_INT), o7opr, info); 256 __ cmp(condition, o7opr, c); 257 } 258 259 260 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) { 261 LIR_Opr o7opr = FrameMap::O7_opr; 262 __ load(new LIR_Address(base, disp, type), o7opr, info); 263 __ cmp(condition, reg, o7opr); 264 } 265 266 267 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) { 268 LIR_Opr o7opr = FrameMap::O7_opr; 269 __ load(new LIR_Address(base, disp, type), o7opr, info); 270 __ cmp(condition, reg, o7opr); 271 } 272 273 274 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) { 275 assert(left != result, "should be different registers"); 276 if (is_power_of_2(c + 1)) { 277 __ shift_left(left, log2_intptr(c + 1), result); 278 __ sub(result, left, result); 279 return true; 280 } else if (is_power_of_2(c - 1)) { 281 __ shift_left(left, log2_intptr(c - 1), result); 282 __ add(result, left, result); 283 return true; 284 } 285 return false; 286 } 287 288 289 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) { 290 BasicType t = item->type(); 291 LIR_Opr sp_opr = FrameMap::SP_opr; 292 if ((t == T_LONG || t == T_DOUBLE) && 293 ((in_bytes(offset_from_sp) - STACK_BIAS) % 8 != 0)) { 294 __ unaligned_move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t)); 295 } else { 296 __ move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t)); 297 } 298 } 299 300 //---------------------------------------------------------------------- 301 // visitor functions 302 //---------------------------------------------------------------------- 303 304 305 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) { 306 assert(x->is_root(),""); 307 bool needs_range_check = true; 308 bool use_length = x->length() != NULL; 309 bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT; 310 bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL || 311 !get_jobject_constant(x->value())->is_null_object()); 312 313 LIRItem array(x->array(), this); 314 LIRItem index(x->index(), this); 315 LIRItem value(x->value(), this); 316 LIRItem length(this); 317 318 array.load_item(); 319 index.load_nonconstant(); 320 321 if (use_length) { 322 needs_range_check = x->compute_needs_range_check(); 323 if (needs_range_check) { 324 length.set_instruction(x->length()); 325 length.load_item(); 326 } 327 } 328 if (needs_store_check) { 329 value.load_item(); 330 } else { 331 value.load_for_store(x->elt_type()); 332 } 333 334 set_no_result(x); 335 336 // the CodeEmitInfo must be duplicated for each different 337 // LIR-instruction because spilling can occur anywhere between two 338 // instructions and so the debug information must be different 339 CodeEmitInfo* range_check_info = state_for(x); 340 CodeEmitInfo* null_check_info = NULL; 341 if (x->needs_null_check()) { 342 null_check_info = new CodeEmitInfo(range_check_info); 343 } 344 345 // emit array address setup early so it schedules better 346 LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store); 347 348 if (GenerateRangeChecks && needs_range_check) { 349 if (use_length) { 350 __ cmp(lir_cond_belowEqual, length.result(), index.result()); 351 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result())); 352 } else { 353 array_range_check(array.result(), index.result(), null_check_info, range_check_info); 354 // range_check also does the null check 355 null_check_info = NULL; 356 } 357 } 358 359 if (GenerateArrayStoreCheck && needs_store_check) { 360 LIR_Opr tmp1 = FrameMap::G1_opr; 361 LIR_Opr tmp2 = FrameMap::G3_opr; 362 LIR_Opr tmp3 = FrameMap::G5_opr; 363 364 CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info); 365 __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info); 366 } 367 368 if (obj_store) { 369 // Needs GC write barriers. 370 pre_barrier(LIR_OprFact::address(array_addr), false, NULL); 371 } 372 __ move(value.result(), array_addr, null_check_info); 373 if (obj_store) { 374 // Precise card mark 375 post_barrier(LIR_OprFact::address(array_addr), value.result()); 376 } 377 } 378 379 380 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) { 381 assert(x->is_root(),""); 382 LIRItem obj(x->obj(), this); 383 obj.load_item(); 384 385 set_no_result(x); 386 387 LIR_Opr lock = FrameMap::G1_opr; 388 LIR_Opr scratch = FrameMap::G3_opr; 389 LIR_Opr hdr = FrameMap::G4_opr; 390 391 CodeEmitInfo* info_for_exception = NULL; 392 if (x->needs_null_check()) { 393 info_for_exception = state_for(x, x->lock_stack_before()); 394 } 395 396 // this CodeEmitInfo must not have the xhandlers because here the 397 // object is already locked (xhandlers expects object to be unlocked) 398 CodeEmitInfo* info = state_for(x, x->state(), true); 399 monitor_enter(obj.result(), lock, hdr, scratch, x->monitor_no(), info_for_exception, info); 400 } 401 402 403 void LIRGenerator::do_MonitorExit(MonitorExit* x) { 404 assert(x->is_root(),""); 405 LIRItem obj(x->obj(), this); 406 obj.dont_load_item(); 407 408 set_no_result(x); 409 LIR_Opr lock = FrameMap::G1_opr; 410 LIR_Opr hdr = FrameMap::G3_opr; 411 LIR_Opr obj_temp = FrameMap::G4_opr; 412 monitor_exit(obj_temp, lock, hdr, x->monitor_no()); 413 } 414 415 416 // _ineg, _lneg, _fneg, _dneg 417 void LIRGenerator::do_NegateOp(NegateOp* x) { 418 LIRItem value(x->x(), this); 419 value.load_item(); 420 LIR_Opr reg = rlock_result(x); 421 __ negate(value.result(), reg); 422 } 423 424 425 426 // for _fadd, _fmul, _fsub, _fdiv, _frem 427 // _dadd, _dmul, _dsub, _ddiv, _drem 428 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) { 429 switch (x->op()) { 430 case Bytecodes::_fadd: 431 case Bytecodes::_fmul: 432 case Bytecodes::_fsub: 433 case Bytecodes::_fdiv: 434 case Bytecodes::_dadd: 435 case Bytecodes::_dmul: 436 case Bytecodes::_dsub: 437 case Bytecodes::_ddiv: { 438 LIRItem left(x->x(), this); 439 LIRItem right(x->y(), this); 440 left.load_item(); 441 right.load_item(); 442 rlock_result(x); 443 arithmetic_op_fpu(x->op(), x->operand(), left.result(), right.result(), x->is_strictfp()); 444 } 445 break; 446 447 case Bytecodes::_frem: 448 case Bytecodes::_drem: { 449 address entry; 450 switch (x->op()) { 451 case Bytecodes::_frem: 452 entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem); 453 break; 454 case Bytecodes::_drem: 455 entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem); 456 break; 457 default: 458 ShouldNotReachHere(); 459 } 460 LIR_Opr result = call_runtime(x->x(), x->y(), entry, x->type(), NULL); 461 set_result(x, result); 462 } 463 break; 464 465 default: ShouldNotReachHere(); 466 } 467 } 468 469 470 // for _ladd, _lmul, _lsub, _ldiv, _lrem 471 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) { 472 switch (x->op()) { 473 case Bytecodes::_lrem: 474 case Bytecodes::_lmul: 475 case Bytecodes::_ldiv: { 476 477 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem) { 478 LIRItem right(x->y(), this); 479 right.load_item(); 480 481 CodeEmitInfo* info = state_for(x); 482 LIR_Opr item = right.result(); 483 assert(item->is_register(), "must be"); 484 __ cmp(lir_cond_equal, item, LIR_OprFact::longConst(0)); 485 __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info)); 486 } 487 488 address entry; 489 switch (x->op()) { 490 case Bytecodes::_lrem: 491 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem); 492 break; // check if dividend is 0 is done elsewhere 493 case Bytecodes::_ldiv: 494 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv); 495 break; // check if dividend is 0 is done elsewhere 496 case Bytecodes::_lmul: 497 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul); 498 break; 499 default: 500 ShouldNotReachHere(); 501 } 502 503 // order of arguments to runtime call is reversed. 504 LIR_Opr result = call_runtime(x->y(), x->x(), entry, x->type(), NULL); 505 set_result(x, result); 506 break; 507 } 508 case Bytecodes::_ladd: 509 case Bytecodes::_lsub: { 510 LIRItem left(x->x(), this); 511 LIRItem right(x->y(), this); 512 left.load_item(); 513 right.load_item(); 514 rlock_result(x); 515 516 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL); 517 break; 518 } 519 default: ShouldNotReachHere(); 520 } 521 } 522 523 524 // Returns if item is an int constant that can be represented by a simm13 525 static bool is_simm13(LIR_Opr item) { 526 if (item->is_constant() && item->type() == T_INT) { 527 return Assembler::is_simm13(item->as_constant_ptr()->as_jint()); 528 } else { 529 return false; 530 } 531 } 532 533 534 // for: _iadd, _imul, _isub, _idiv, _irem 535 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) { 536 bool is_div_rem = x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem; 537 LIRItem left(x->x(), this); 538 LIRItem right(x->y(), this); 539 // missing test if instr is commutative and if we should swap 540 right.load_nonconstant(); 541 assert(right.is_constant() || right.is_register(), "wrong state of right"); 542 left.load_item(); 543 rlock_result(x); 544 if (is_div_rem) { 545 CodeEmitInfo* info = state_for(x); 546 LIR_Opr tmp = FrameMap::G1_opr; 547 if (x->op() == Bytecodes::_irem) { 548 __ irem(left.result(), right.result(), x->operand(), tmp, info); 549 } else if (x->op() == Bytecodes::_idiv) { 550 __ idiv(left.result(), right.result(), x->operand(), tmp, info); 551 } 552 } else { 553 arithmetic_op_int(x->op(), x->operand(), left.result(), right.result(), FrameMap::G1_opr); 554 } 555 } 556 557 558 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) { 559 ValueTag tag = x->type()->tag(); 560 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters"); 561 switch (tag) { 562 case floatTag: 563 case doubleTag: do_ArithmeticOp_FPU(x); return; 564 case longTag: do_ArithmeticOp_Long(x); return; 565 case intTag: do_ArithmeticOp_Int(x); return; 566 } 567 ShouldNotReachHere(); 568 } 569 570 571 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr 572 void LIRGenerator::do_ShiftOp(ShiftOp* x) { 573 LIRItem value(x->x(), this); 574 LIRItem count(x->y(), this); 575 // Long shift destroys count register 576 if (value.type()->is_long()) { 577 count.set_destroys_register(); 578 } 579 value.load_item(); 580 // the old backend doesn't support this 581 if (count.is_constant() && count.type()->as_IntConstant() != NULL && value.type()->is_int()) { 582 jint c = count.get_jint_constant() & 0x1f; 583 assert(c >= 0 && c < 32, "should be small"); 584 count.dont_load_item(); 585 } else { 586 count.load_item(); 587 } 588 LIR_Opr reg = rlock_result(x); 589 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr); 590 } 591 592 593 // _iand, _land, _ior, _lor, _ixor, _lxor 594 void LIRGenerator::do_LogicOp(LogicOp* x) { 595 LIRItem left(x->x(), this); 596 LIRItem right(x->y(), this); 597 598 left.load_item(); 599 right.load_nonconstant(); 600 LIR_Opr reg = rlock_result(x); 601 602 logic_op(x->op(), reg, left.result(), right.result()); 603 } 604 605 606 607 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg 608 void LIRGenerator::do_CompareOp(CompareOp* x) { 609 LIRItem left(x->x(), this); 610 LIRItem right(x->y(), this); 611 left.load_item(); 612 right.load_item(); 613 LIR_Opr reg = rlock_result(x); 614 615 if (x->x()->type()->is_float_kind()) { 616 Bytecodes::Code code = x->op(); 617 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl)); 618 } else if (x->x()->type()->tag() == longTag) { 619 __ lcmp2int(left.result(), right.result(), reg); 620 } else { 621 Unimplemented(); 622 } 623 } 624 625 626 void LIRGenerator::do_AttemptUpdate(Intrinsic* x) { 627 assert(x->number_of_arguments() == 3, "wrong type"); 628 LIRItem obj (x->argument_at(0), this); // AtomicLong object 629 LIRItem cmp_value (x->argument_at(1), this); // value to compare with field 630 LIRItem new_value (x->argument_at(2), this); // replace field with new_value if it matches cmp_value 631 632 obj.load_item(); 633 cmp_value.load_item(); 634 new_value.load_item(); 635 636 // generate compare-and-swap and produce zero condition if swap occurs 637 int value_offset = sun_misc_AtomicLongCSImpl::value_offset(); 638 LIR_Opr addr = FrameMap::O7_opr; 639 __ add(obj.result(), LIR_OprFact::intConst(value_offset), addr); 640 LIR_Opr t1 = FrameMap::G1_opr; // temp for 64-bit value 641 LIR_Opr t2 = FrameMap::G3_opr; // temp for 64-bit value 642 __ cas_long(addr, cmp_value.result(), new_value.result(), t1, t2); 643 644 // generate conditional move of boolean result 645 LIR_Opr result = rlock_result(x); 646 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result); 647 } 648 649 650 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) { 651 assert(x->number_of_arguments() == 4, "wrong type"); 652 LIRItem obj (x->argument_at(0), this); // object 653 LIRItem offset(x->argument_at(1), this); // offset of field 654 LIRItem cmp (x->argument_at(2), this); // value to compare with field 655 LIRItem val (x->argument_at(3), this); // replace field with val if matches cmp 656 657 // Use temps to avoid kills 658 LIR_Opr t1 = FrameMap::G1_opr; 659 LIR_Opr t2 = FrameMap::G3_opr; 660 LIR_Opr addr = new_pointer_register(); 661 662 // get address of field 663 obj.load_item(); 664 offset.load_item(); 665 cmp.load_item(); 666 val.load_item(); 667 668 __ add(obj.result(), offset.result(), addr); 669 670 if (type == objectType) { // Write-barrier needed for Object fields. 671 pre_barrier(obj.result(), false, NULL); 672 } 673 674 if (type == objectType) 675 __ cas_obj(addr, cmp.result(), val.result(), t1, t2); 676 else if (type == intType) 677 __ cas_int(addr, cmp.result(), val.result(), t1, t2); 678 else if (type == longType) 679 __ cas_long(addr, cmp.result(), val.result(), t1, t2); 680 else { 681 ShouldNotReachHere(); 682 } 683 684 // generate conditional move of boolean result 685 LIR_Opr result = rlock_result(x); 686 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result); 687 if (type == objectType) { // Write-barrier needed for Object fields. 688 // Precise card mark since could either be object or array 689 post_barrier(addr, val.result()); 690 } 691 } 692 693 694 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) { 695 switch (x->id()) { 696 case vmIntrinsics::_dabs: 697 case vmIntrinsics::_dsqrt: { 698 assert(x->number_of_arguments() == 1, "wrong type"); 699 LIRItem value(x->argument_at(0), this); 700 value.load_item(); 701 LIR_Opr dst = rlock_result(x); 702 703 switch (x->id()) { 704 case vmIntrinsics::_dsqrt: { 705 __ sqrt(value.result(), dst, LIR_OprFact::illegalOpr); 706 break; 707 } 708 case vmIntrinsics::_dabs: { 709 __ abs(value.result(), dst, LIR_OprFact::illegalOpr); 710 break; 711 } 712 } 713 break; 714 } 715 case vmIntrinsics::_dlog10: // fall through 716 case vmIntrinsics::_dlog: // fall through 717 case vmIntrinsics::_dsin: // fall through 718 case vmIntrinsics::_dtan: // fall through 719 case vmIntrinsics::_dcos: { 720 assert(x->number_of_arguments() == 1, "wrong type"); 721 722 address runtime_entry = NULL; 723 switch (x->id()) { 724 case vmIntrinsics::_dsin: 725 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dsin); 726 break; 727 case vmIntrinsics::_dcos: 728 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dcos); 729 break; 730 case vmIntrinsics::_dtan: 731 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dtan); 732 break; 733 case vmIntrinsics::_dlog: 734 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog); 735 break; 736 case vmIntrinsics::_dlog10: 737 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog10); 738 break; 739 default: 740 ShouldNotReachHere(); 741 } 742 743 LIR_Opr result = call_runtime(x->argument_at(0), runtime_entry, x->type(), NULL); 744 set_result(x, result); 745 } 746 } 747 } 748 749 750 void LIRGenerator::do_ArrayCopy(Intrinsic* x) { 751 assert(x->number_of_arguments() == 5, "wrong type"); 752 // Note: spill caller save before setting the item 753 LIRItem src (x->argument_at(0), this); 754 LIRItem src_pos (x->argument_at(1), this); 755 LIRItem dst (x->argument_at(2), this); 756 LIRItem dst_pos (x->argument_at(3), this); 757 LIRItem length (x->argument_at(4), this); 758 // load all values in callee_save_registers, as this makes the 759 // parameter passing to the fast case simpler 760 src.load_item_force (rlock_callee_saved(T_OBJECT)); 761 src_pos.load_item_force (rlock_callee_saved(T_INT)); 762 dst.load_item_force (rlock_callee_saved(T_OBJECT)); 763 dst_pos.load_item_force (rlock_callee_saved(T_INT)); 764 length.load_item_force (rlock_callee_saved(T_INT)); 765 766 int flags; 767 ciArrayKlass* expected_type; 768 arraycopy_helper(x, &flags, &expected_type); 769 770 CodeEmitInfo* info = state_for(x, x->state()); 771 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), 772 length.result(), rlock_callee_saved(T_INT), 773 expected_type, flags, info); 774 set_no_result(x); 775 } 776 777 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f 778 // _i2b, _i2c, _i2s 779 void LIRGenerator::do_Convert(Convert* x) { 780 781 switch (x->op()) { 782 case Bytecodes::_f2l: 783 case Bytecodes::_d2l: 784 case Bytecodes::_d2i: 785 case Bytecodes::_l2f: 786 case Bytecodes::_l2d: { 787 788 address entry; 789 switch (x->op()) { 790 case Bytecodes::_l2f: 791 entry = CAST_FROM_FN_PTR(address, SharedRuntime::l2f); 792 break; 793 case Bytecodes::_l2d: 794 entry = CAST_FROM_FN_PTR(address, SharedRuntime::l2d); 795 break; 796 case Bytecodes::_f2l: 797 entry = CAST_FROM_FN_PTR(address, SharedRuntime::f2l); 798 break; 799 case Bytecodes::_d2l: 800 entry = CAST_FROM_FN_PTR(address, SharedRuntime::d2l); 801 break; 802 case Bytecodes::_d2i: 803 entry = CAST_FROM_FN_PTR(address, SharedRuntime::d2i); 804 break; 805 default: 806 ShouldNotReachHere(); 807 } 808 LIR_Opr result = call_runtime(x->value(), entry, x->type(), NULL); 809 set_result(x, result); 810 break; 811 } 812 813 case Bytecodes::_i2f: 814 case Bytecodes::_i2d: { 815 LIRItem value(x->value(), this); 816 817 LIR_Opr reg = rlock_result(x); 818 // To convert an int to double, we need to load the 32-bit int 819 // from memory into a single precision floating point register 820 // (even numbered). Then the sparc fitod instruction takes care 821 // of the conversion. This is a bit ugly, but is the best way to 822 // get the int value in a single precision floating point register 823 value.load_item(); 824 LIR_Opr tmp = force_to_spill(value.result(), T_FLOAT); 825 __ convert(x->op(), tmp, reg); 826 break; 827 } 828 break; 829 830 case Bytecodes::_i2l: 831 case Bytecodes::_i2b: 832 case Bytecodes::_i2c: 833 case Bytecodes::_i2s: 834 case Bytecodes::_l2i: 835 case Bytecodes::_f2d: 836 case Bytecodes::_d2f: { // inline code 837 LIRItem value(x->value(), this); 838 839 value.load_item(); 840 LIR_Opr reg = rlock_result(x); 841 __ convert(x->op(), value.result(), reg, false); 842 } 843 break; 844 845 case Bytecodes::_f2i: { 846 LIRItem value (x->value(), this); 847 value.set_destroys_register(); 848 value.load_item(); 849 LIR_Opr reg = rlock_result(x); 850 set_vreg_flag(reg, must_start_in_memory); 851 __ convert(x->op(), value.result(), reg, false); 852 } 853 break; 854 855 default: ShouldNotReachHere(); 856 } 857 } 858 859 860 void LIRGenerator::do_NewInstance(NewInstance* x) { 861 // This instruction can be deoptimized in the slow path : use 862 // O0 as result register. 863 const LIR_Opr reg = result_register_for(x->type()); 864 865 if (PrintNotLoaded && !x->klass()->is_loaded()) { 866 tty->print_cr(" ###class not loaded at new bci %d", x->bci()); 867 } 868 CodeEmitInfo* info = state_for(x, x->state()); 869 LIR_Opr tmp1 = FrameMap::G1_oop_opr; 870 LIR_Opr tmp2 = FrameMap::G3_oop_opr; 871 LIR_Opr tmp3 = FrameMap::G4_oop_opr; 872 LIR_Opr tmp4 = FrameMap::O1_oop_opr; 873 LIR_Opr klass_reg = FrameMap::G5_oop_opr; 874 new_instance(reg, x->klass(), tmp1, tmp2, tmp3, tmp4, klass_reg, info); 875 LIR_Opr result = rlock_result(x); 876 __ move(reg, result); 877 } 878 879 880 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) { 881 LIRItem length(x->length(), this); 882 length.load_item(); 883 884 LIR_Opr reg = result_register_for(x->type()); 885 LIR_Opr tmp1 = FrameMap::G1_oop_opr; 886 LIR_Opr tmp2 = FrameMap::G3_oop_opr; 887 LIR_Opr tmp3 = FrameMap::G4_oop_opr; 888 LIR_Opr tmp4 = FrameMap::O1_oop_opr; 889 LIR_Opr klass_reg = FrameMap::G5_oop_opr; 890 LIR_Opr len = length.result(); 891 BasicType elem_type = x->elt_type(); 892 893 __ oop2reg(ciTypeArrayKlass::make(elem_type)->encoding(), klass_reg); 894 895 CodeEmitInfo* info = state_for(x, x->state()); 896 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info); 897 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path); 898 899 LIR_Opr result = rlock_result(x); 900 __ move(reg, result); 901 } 902 903 904 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) { 905 LIRItem length(x->length(), this); 906 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction 907 // and therefore provide the state before the parameters have been consumed 908 CodeEmitInfo* patching_info = NULL; 909 if (!x->klass()->is_loaded() || PatchALot) { 910 patching_info = state_for(x, x->state_before()); 911 } 912 913 length.load_item(); 914 915 const LIR_Opr reg = result_register_for(x->type()); 916 LIR_Opr tmp1 = FrameMap::G1_oop_opr; 917 LIR_Opr tmp2 = FrameMap::G3_oop_opr; 918 LIR_Opr tmp3 = FrameMap::G4_oop_opr; 919 LIR_Opr tmp4 = FrameMap::O1_oop_opr; 920 LIR_Opr klass_reg = FrameMap::G5_oop_opr; 921 LIR_Opr len = length.result(); 922 CodeEmitInfo* info = state_for(x, x->state()); 923 924 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info); 925 ciObject* obj = (ciObject*) ciObjArrayKlass::make(x->klass()); 926 if (obj == ciEnv::unloaded_ciobjarrayklass()) { 927 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error"); 928 } 929 jobject2reg_with_patching(klass_reg, obj, patching_info); 930 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path); 931 932 LIR_Opr result = rlock_result(x); 933 __ move(reg, result); 934 } 935 936 937 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) { 938 Values* dims = x->dims(); 939 int i = dims->length(); 940 LIRItemList* items = new LIRItemList(dims->length(), NULL); 941 while (i-- > 0) { 942 LIRItem* size = new LIRItem(dims->at(i), this); 943 items->at_put(i, size); 944 } 945 946 // need to get the info before, as the items may become invalid through item_free 947 CodeEmitInfo* patching_info = NULL; 948 if (!x->klass()->is_loaded() || PatchALot) { 949 patching_info = state_for(x, x->state_before()); 950 951 // cannot re-use same xhandlers for multiple CodeEmitInfos, so 952 // clone all handlers 953 x->set_exception_handlers(new XHandlers(x->exception_handlers())); 954 } 955 956 i = dims->length(); 957 while (i-- > 0) { 958 LIRItem* size = items->at(i); 959 // if a patching_info was generated above then debug information for the state before 960 // the call is going to be emitted. The LIRGenerator calls above may have left some values 961 // in registers and that's been recorded in the CodeEmitInfo. In that case the items 962 // for those values can't simply be freed if they are registers because the values 963 // might be destroyed by store_stack_parameter. So in the case of patching, delay the 964 // freeing of the items that already were in registers 965 size->load_item(); 966 store_stack_parameter (size->result(), 967 in_ByteSize(STACK_BIAS + 968 frame::memory_parameter_word_sp_offset * wordSize + 969 i * sizeof(jint))); 970 } 971 972 // This instruction can be deoptimized in the slow path : use 973 // O0 as result register. 974 const LIR_Opr reg = result_register_for(x->type()); 975 CodeEmitInfo* info = state_for(x, x->state()); 976 977 jobject2reg_with_patching(reg, x->klass(), patching_info); 978 LIR_Opr rank = FrameMap::O1_opr; 979 __ move(LIR_OprFact::intConst(x->rank()), rank); 980 LIR_Opr varargs = FrameMap::as_pointer_opr(O2); 981 int offset_from_sp = (frame::memory_parameter_word_sp_offset * wordSize) + STACK_BIAS; 982 __ add(FrameMap::SP_opr, 983 LIR_OprFact::intptrConst(offset_from_sp), 984 varargs); 985 LIR_OprList* args = new LIR_OprList(3); 986 args->append(reg); 987 args->append(rank); 988 args->append(varargs); 989 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id), 990 LIR_OprFact::illegalOpr, 991 reg, args, info); 992 993 LIR_Opr result = rlock_result(x); 994 __ move(reg, result); 995 } 996 997 998 void LIRGenerator::do_BlockBegin(BlockBegin* x) { 999 } 1000 1001 1002 void LIRGenerator::do_CheckCast(CheckCast* x) { 1003 LIRItem obj(x->obj(), this); 1004 CodeEmitInfo* patching_info = NULL; 1005 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) { 1006 // must do this before locking the destination register as an oop register, 1007 // and before the obj is loaded (so x->obj()->item() is valid for creating a debug info location) 1008 patching_info = state_for(x, x->state_before()); 1009 } 1010 obj.load_item(); 1011 LIR_Opr out_reg = rlock_result(x); 1012 CodeStub* stub; 1013 CodeEmitInfo* info_for_exception = state_for(x, x->state()->copy_locks()); 1014 1015 if (x->is_incompatible_class_change_check()) { 1016 assert(patching_info == NULL, "can't patch this"); 1017 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception); 1018 } else { 1019 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception); 1020 } 1021 LIR_Opr tmp1 = FrameMap::G1_oop_opr; 1022 LIR_Opr tmp2 = FrameMap::G3_oop_opr; 1023 LIR_Opr tmp3 = FrameMap::G4_oop_opr; 1024 __ checkcast(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3, 1025 x->direct_compare(), info_for_exception, patching_info, stub, 1026 x->profiled_method(), x->profiled_bci()); 1027 } 1028 1029 1030 void LIRGenerator::do_InstanceOf(InstanceOf* x) { 1031 LIRItem obj(x->obj(), this); 1032 CodeEmitInfo* patching_info = NULL; 1033 if (!x->klass()->is_loaded() || PatchALot) { 1034 patching_info = state_for(x, x->state_before()); 1035 } 1036 // ensure the result register is not the input register because the result is initialized before the patching safepoint 1037 obj.load_item(); 1038 LIR_Opr out_reg = rlock_result(x); 1039 LIR_Opr tmp1 = FrameMap::G1_oop_opr; 1040 LIR_Opr tmp2 = FrameMap::G3_oop_opr; 1041 LIR_Opr tmp3 = FrameMap::G4_oop_opr; 1042 __ instanceof(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3, x->direct_compare(), patching_info); 1043 } 1044 1045 1046 void LIRGenerator::do_If(If* x) { 1047 assert(x->number_of_sux() == 2, "inconsistency"); 1048 ValueTag tag = x->x()->type()->tag(); 1049 LIRItem xitem(x->x(), this); 1050 LIRItem yitem(x->y(), this); 1051 LIRItem* xin = &xitem; 1052 LIRItem* yin = &yitem; 1053 If::Condition cond = x->cond(); 1054 1055 if (tag == longTag) { 1056 // for longs, only conditions "eql", "neq", "lss", "geq" are valid; 1057 // mirror for other conditions 1058 if (cond == If::gtr || cond == If::leq) { 1059 // swap inputs 1060 cond = Instruction::mirror(cond); 1061 xin = &yitem; 1062 yin = &xitem; 1063 } 1064 xin->set_destroys_register(); 1065 } 1066 1067 LIR_Opr left = LIR_OprFact::illegalOpr; 1068 LIR_Opr right = LIR_OprFact::illegalOpr; 1069 1070 xin->load_item(); 1071 left = xin->result(); 1072 1073 if (is_simm13(yin->result())) { 1074 // inline int constants which are small enough to be immediate operands 1075 right = LIR_OprFact::value_type(yin->value()->type()); 1076 } else if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && 1077 (cond == If::eql || cond == If::neq)) { 1078 // inline long zero 1079 right = LIR_OprFact::value_type(yin->value()->type()); 1080 } else if (tag == objectTag && yin->is_constant() && (yin->get_jobject_constant()->is_null_object())) { 1081 right = LIR_OprFact::value_type(yin->value()->type()); 1082 } else { 1083 yin->load_item(); 1084 right = yin->result(); 1085 } 1086 set_no_result(x); 1087 1088 // add safepoint before generating condition code so it can be recomputed 1089 if (x->is_safepoint()) { 1090 // increment backedge counter if needed 1091 increment_backedge_counter(state_for(x, x->state_before())); 1092 1093 __ safepoint(new_register(T_INT), state_for(x, x->state_before())); 1094 } 1095 1096 __ cmp(lir_cond(cond), left, right); 1097 profile_branch(x, cond); 1098 move_to_phi(x->state()); 1099 if (x->x()->type()->is_float_kind()) { 1100 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux()); 1101 } else { 1102 __ branch(lir_cond(cond), right->type(), x->tsux()); 1103 } 1104 assert(x->default_sux() == x->fsux(), "wrong destination above"); 1105 __ jump(x->default_sux()); 1106 } 1107 1108 1109 LIR_Opr LIRGenerator::getThreadPointer() { 1110 return FrameMap::as_pointer_opr(G2); 1111 } 1112 1113 1114 void LIRGenerator::trace_block_entry(BlockBegin* block) { 1115 __ move(LIR_OprFact::intConst(block->block_id()), FrameMap::O0_opr); 1116 LIR_OprList* args = new LIR_OprList(1); 1117 args->append(FrameMap::O0_opr); 1118 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry); 1119 __ call_runtime_leaf(func, rlock_callee_saved(T_INT), LIR_OprFact::illegalOpr, args); 1120 } 1121 1122 1123 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address, 1124 CodeEmitInfo* info) { 1125 #ifdef _LP64 1126 __ store(value, address, info); 1127 #else 1128 __ volatile_store_mem_reg(value, address, info); 1129 #endif 1130 } 1131 1132 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result, 1133 CodeEmitInfo* info) { 1134 #ifdef _LP64 1135 __ load(address, result, info); 1136 #else 1137 __ volatile_load_mem_reg(address, result, info); 1138 #endif 1139 } 1140 1141 1142 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data, 1143 BasicType type, bool is_volatile) { 1144 LIR_Opr base_op = src; 1145 LIR_Opr index_op = offset; 1146 1147 bool is_obj = (type == T_ARRAY || type == T_OBJECT); 1148 #ifndef _LP64 1149 if (is_volatile && type == T_LONG) { 1150 __ volatile_store_unsafe_reg(data, src, offset, type, NULL, lir_patch_none); 1151 } else 1152 #endif 1153 { 1154 if (type == T_BOOLEAN) { 1155 type = T_BYTE; 1156 } 1157 LIR_Address* addr; 1158 if (type == T_ARRAY || type == T_OBJECT) { 1159 LIR_Opr tmp = new_pointer_register(); 1160 __ add(base_op, index_op, tmp); 1161 addr = new LIR_Address(tmp, 0, type); 1162 } else { 1163 addr = new LIR_Address(base_op, index_op, type); 1164 } 1165 1166 if (is_obj) { 1167 pre_barrier(LIR_OprFact::address(addr), false, NULL); 1168 // _bs->c1_write_barrier_pre(this, LIR_OprFact::address(addr)); 1169 } 1170 __ move(data, addr); 1171 if (is_obj) { 1172 // This address is precise 1173 post_barrier(LIR_OprFact::address(addr), data); 1174 } 1175 } 1176 } 1177 1178 1179 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset, 1180 BasicType type, bool is_volatile) { 1181 #ifndef _LP64 1182 if (is_volatile && type == T_LONG) { 1183 __ volatile_load_unsafe_reg(src, offset, dst, type, NULL, lir_patch_none); 1184 } else 1185 #endif 1186 { 1187 LIR_Address* addr = new LIR_Address(src, offset, type); 1188 __ load(addr, dst); 1189 } 1190 }