--- old/src/share/vm/c1/c1_LIR.cpp	Wed Sep 22 14:30:25 2010
+++ new/src/share/vm/c1/c1_LIR.cpp	Wed Sep 22 14:30:25 2010
@@ -211,6 +211,7 @@
     case T_BYTE:
     case T_SHORT:
     case T_INT:
+    case T_ADDRESS:
     case T_OBJECT:
     case T_ARRAY:
       assert((kind_field() == cpu_register || kind_field() == stack_value) &&
--- old/src/share/vm/c1/c1_LIR.hpp	Wed Sep 22 14:30:25 2010
+++ new/src/share/vm/c1/c1_LIR.hpp	Wed Sep 22 14:30:25 2010
@@ -280,7 +280,7 @@
     , int_type      = 1 << type_shift
     , long_type     = 2 << type_shift
     , object_type   = 3 << type_shift
-    , pointer_type  = 4 << type_shift
+    , address_type  = 4 << type_shift
     , float_type    = 5 << type_shift
     , double_type   = 6 << type_shift
   };
@@ -303,6 +303,7 @@
       case T_BYTE:
       case T_SHORT:
       case T_INT:
+      case T_ADDRESS:
       case T_OBJECT:
       case T_ARRAY:
         return single_size;
@@ -456,6 +457,7 @@
   case T_DOUBLE:   return LIR_OprDesc::double_type;
   case T_OBJECT:
   case T_ARRAY:    return LIR_OprDesc::object_type;
+  case T_ADDRESS:  return LIR_OprDesc::address_type;
   case T_ILLEGAL:  // fall through
   default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type;
   }
@@ -468,6 +470,7 @@
   case LIR_OprDesc::float_type:   return T_FLOAT;
   case LIR_OprDesc::double_type:  return T_DOUBLE;
   case LIR_OprDesc::object_type:  return T_OBJECT;
+  case LIR_OprDesc::address_type: return T_ADDRESS;
   case LIR_OprDesc::unknown_type: // fall through
   default: ShouldNotReachHere();  return T_ILLEGAL;
   }
@@ -550,8 +553,24 @@
 
   static LIR_Opr illegalOpr;
 
-  static LIR_Opr single_cpu(int reg)            { return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |                                     LIR_OprDesc::int_type    | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); }
-  static LIR_Opr single_cpu_oop(int reg)        { return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |                                     LIR_OprDesc::object_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); }
+  static LIR_Opr single_cpu(int reg) {
+    return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) | 
+                               LIR_OprDesc::int_type             |
+                               LIR_OprDesc::cpu_register         |
+                               LIR_OprDesc::single_size);
+  }
+  static LIR_Opr single_cpu_oop(int reg) {
+    return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
+                               LIR_OprDesc::object_type          |
+                               LIR_OprDesc::cpu_register         |
+                               LIR_OprDesc::single_size);
+  }
+  static LIR_Opr single_cpu_address(int reg) {
+    return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
+                               LIR_OprDesc::address_type         |
+                               LIR_OprDesc::cpu_register         |
+                               LIR_OprDesc::single_size);
+  }
   static LIR_Opr double_cpu(int reg1, int reg2) {
     LP64_ONLY(assert(reg1 == reg2, "must be identical"));
     return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
@@ -633,6 +652,14 @@
                                   LIR_OprDesc::virtual_mask);
         break;
 
+      case T_ADDRESS:
+        res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
+                                  LIR_OprDesc::address_type          |
+                                  LIR_OprDesc::cpu_register          |
+                                  LIR_OprDesc::single_size           |
+                                  LIR_OprDesc::virtual_mask);
+        break;
+
       case T_LONG:
         res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
                                   LIR_OprDesc::long_type             |
@@ -719,6 +746,13 @@
                                   LIR_OprDesc::int_type              |
                                   LIR_OprDesc::stack_value           |
                                   LIR_OprDesc::single_size);
+        break;
+
+      case T_ADDRESS:
+        res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
+                                  LIR_OprDesc::address_type          |
+                                  LIR_OprDesc::stack_value           |
+                                  LIR_OprDesc::single_size);
         break;
 
       case T_LONG:
--- old/src/share/vm/c1/c1_LIRGenerator.cpp	Wed Sep 22 14:30:26 2010
+++ new/src/share/vm/c1/c1_LIRGenerator.cpp	Wed Sep 22 14:30:26 2010
@@ -939,7 +939,6 @@
     }
   }
   _virtual_register_number += 1;
-  if (type == T_ADDRESS) type = T_INT;
   return LIR_OprFact::virtual_register(vreg, type);
 }
 
--- old/src/share/vm/c1/c1_LinearScan.cpp	Wed Sep 22 14:30:26 2010
+++ new/src/share/vm/c1/c1_LinearScan.cpp	Wed Sep 22 14:30:26 2010
@@ -2018,6 +2018,12 @@
         return LIR_OprFact::single_cpu_oop(assigned_reg);
       }
 
+      case T_ADDRESS: {
+        assert(assigned_reg >= pd_first_cpu_reg && assigned_reg <= pd_last_cpu_reg, "no cpu register");
+        assert(interval->assigned_regHi() == any_reg, "must not have hi register");
+        return LIR_OprFact::single_cpu_address(assigned_reg);
+      }
+
 #ifdef __SOFTFP__
       case T_FLOAT:  // fall through
 #endif // __SOFTFP__