src/cpu/sparc/vm/nativeInst_sparc.cpp

*** 50,59 ****
--- 50,75 ----
    // Generate a the new sequence
    _masm->patchable_sethi(x, destreg);
    ICache::invalidate_range(instaddr, 7 * BytesPerInstWord);
  }
  
+ void NativeInstruction::verify_data64_sethi(address instaddr, intptr_t x) {
+   ResourceMark rm;
+   unsigned char buffer[10 * BytesPerInstWord];
+   CodeBuffer buf(buffer, 10 * BytesPerInstWord);
+   MacroAssembler masm(&buf);
+ 
+   Register destreg = inv_rd(*(unsigned int *)instaddr);
+   // Generate the proper sequence into a temporary buffer and compare
+   // it with the original sequence.
+   masm.patchable_sethi(x, destreg);
+   int len = buffer - masm.pc();
+   for (int i = 0; i < len; i++) {
+     assert(instaddr[i] == buffer[i], "instructions must match");
+   }
+ }
+ 
  void NativeInstruction::verify() {
    // make sure code pattern is actually an instruction address
    address addr = addr_at(0);
    if (addr == 0 || ((intptr_t)addr & 3) != 0) {
      fatal("not an instruction address");