src/cpu/sparc/vm/relocInfo_sparc.cpp
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src/cpu/sparc/vm/relocInfo_sparc.cpp

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*** 28,38 **** #include "code/relocInfo.hpp" #include "nativeInst_sparc.hpp" #include "oops/oop.inline.hpp" #include "runtime/safepoint.hpp" ! void Relocation::pd_set_data_value(address x, intptr_t o) { NativeInstruction* ip = nativeInstruction_at(addr()); jint inst = ip->long_at(0); assert(inst != NativeInstruction::illegal_instruction(), "no breakpoint"); switch (Assembler::inv_op(inst)) { --- 28,38 ---- #include "code/relocInfo.hpp" #include "nativeInst_sparc.hpp" #include "oops/oop.inline.hpp" #include "runtime/safepoint.hpp" ! void Relocation::pd_set_data_value(address x, intptr_t o, bool verify_only) { NativeInstruction* ip = nativeInstruction_at(addr()); jint inst = ip->long_at(0); assert(inst != NativeInstruction::illegal_instruction(), "no breakpoint"); switch (Assembler::inv_op(inst)) {
*** 81,92 **** --- 81,96 ---- guarantee(Assembler::inv_immed(inst), "must have a simm13 field"); int simm13 = Assembler::low10((intptr_t)x) + o; guarantee(Assembler::is_simm13(simm13), "offset can't overflow simm13"); inst &= ~Assembler::simm( -1, 13); inst |= Assembler::simm(simm13, 13); + if (verify_only) { + assert(ip->long_at(0) == inst, "instructions must match"); + } else { ip->set_long_at(0, inst); } + } break; case Assembler::branch_op: { #ifdef _LP64
*** 95,117 **** if (format() != 0) { assert(type() == relocInfo::oop_type, "only narrow oops case"); jint np = oopDesc::encode_heap_oop((oop)x); inst &= ~Assembler::hi22(-1); inst |= Assembler::hi22((intptr_t)np); ip->set_long_at(0, inst); inst2 = ip->long_at( NativeInstruction::nop_instruction_size ); guarantee(Assembler::inv_op(inst2)==Assembler::arith_op, "arith op"); ! ip->set_long_at(NativeInstruction::nop_instruction_size, ip->set_data32_simm13( inst2, (intptr_t)np)); break; } ip->set_data64_sethi( ip->addr_at(0), (intptr_t)x ); #else guarantee(Assembler::inv_op2(inst)==Assembler::sethi_op2, "must be sethi"); inst &= ~Assembler::hi22( -1); inst |= Assembler::hi22((intptr_t)x); // (ignore offset; it doesn't play into the sethi) ip->set_long_at(0, inst); #endif } break; default: --- 99,138 ---- if (format() != 0) { assert(type() == relocInfo::oop_type, "only narrow oops case"); jint np = oopDesc::encode_heap_oop((oop)x); inst &= ~Assembler::hi22(-1); inst |= Assembler::hi22((intptr_t)np); + if (verify_only) { + assert(ip->long_at(0) == inst, "instructions must match"); + } else { ip->set_long_at(0, inst); + } inst2 = ip->long_at( NativeInstruction::nop_instruction_size ); guarantee(Assembler::inv_op(inst2)==Assembler::arith_op, "arith op"); ! if (verify_only) { ! assert(ip->long_at(NativeInstruction::nop_instruction_size) == NativeInstruction::set_data32_simm13( inst2, (intptr_t)np), ! "instructions must match"); ! } else { ! ip->set_long_at(NativeInstruction::nop_instruction_size, NativeInstruction::set_data32_simm13( inst2, (intptr_t)np)); ! } break; } + if (verify_only) { + ip->verify_data64_sethi( ip->addr_at(0), (intptr_t)x ); + } else { ip->set_data64_sethi( ip->addr_at(0), (intptr_t)x ); + } #else guarantee(Assembler::inv_op2(inst)==Assembler::sethi_op2, "must be sethi"); inst &= ~Assembler::hi22( -1); inst |= Assembler::hi22((intptr_t)x); // (ignore offset; it doesn't play into the sethi) + if (verify_only) { + assert(ip->long_at(0) == inst, "instructions must match"); + } else { ip->set_long_at(0, inst); + } #endif } break; default:
src/cpu/sparc/vm/relocInfo_sparc.cpp
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