src/cpu/x86/vm/sharedRuntime_x86_64.cpp

*** 1195,1213 ****
        }
      }
      if (in_regs[i].first()->is_Register() &&
          (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_ARRAY)) {
        int offset = slot * VMRegImpl::stack_slot_size;
-       slot += VMRegImpl::slots_per_word;
        if (map != NULL) {
          __ movq(Address(rsp, offset), in_regs[i].first()->as_Register());
          if (in_sig_bt[i] == T_ARRAY) {
            map->set_oop(VMRegImpl::stack2reg(slot));;
          }
        } else {
          __ movq(in_regs[i].first()->as_Register(), Address(rsp, offset));
        }
      }
    }
    // Save or restore single word registers
    for ( int i = 0; i < total_in_args; i++) {
      if (in_regs[i].first()->is_Register()) {
--- 1195,1213 ----
        }
      }
      if (in_regs[i].first()->is_Register() &&
          (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_ARRAY)) {
        int offset = slot * VMRegImpl::stack_slot_size;
        if (map != NULL) {
          __ movq(Address(rsp, offset), in_regs[i].first()->as_Register());
          if (in_sig_bt[i] == T_ARRAY) {
            map->set_oop(VMRegImpl::stack2reg(slot));;
          }
        } else {
          __ movq(in_regs[i].first()->as_Register(), Address(rsp, offset));
        }
+       slot += VMRegImpl::slots_per_word;
      }
    }
    // Save or restore single word registers
    for ( int i = 0; i < total_in_args; i++) {
      if (in_regs[i].first()->is_Register()) {