src/cpu/aarch64/vm/aarch64_ad.m4

rev 13535 : 8187022: AArch64: UBFX instructions have wrong format string
Reviewed-by: duke
Contributed-by: daniel.stewart@linaro.org

@@ -181,11 +181,11 @@
 `instruct $3$1(iReg$1NoSp dst, iReg$1`'ORL2I($1) src, immI rshift, imm$1_bitmask mask)
 %{
   match(Set dst (And$1 ($2$1 src rshift) mask));
 
   ins_cost(INSN_COST);
-  format %{ "$3 $dst, $src, $mask" %}
+  format %{ "$3 $dst, $src, $rshift, $mask" %}
   ins_encode %{
     int rshift = $rshift$$constant;
     long mask = $mask$$constant;
     int width = exact_log2(mask+1);
     __ $3(as_Register($dst$$reg),

@@ -201,11 +201,11 @@
 instruct ubfxIConvI2L(iRegLNoSp dst, iRegIorL2I src, immI rshift, immI_bitmask mask)
 %{
   match(Set dst (ConvI2L (AndI (URShiftI src rshift) mask)));
 
   ins_cost(INSN_COST * 2);
-  format %{ "ubfx $dst, $src, $mask" %}
+  format %{ "ubfx $dst, $src, $rshift, $mask" %}
   ins_encode %{
     int rshift = $rshift$$constant;
     long mask = $mask$$constant;
     int width = exact_log2(mask+1);
     __ ubfx(as_Register($dst$$reg),