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src/cpu/ppc/vm/assembler_ppc.hpp

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*** 2098,2107 **** --- 2098,2108 ---- inline void lvsr( VectorRegister d, Register s2); // Endianess specific concatenation of 2 loaded vectors. inline void load_perm(VectorRegister perm, Register addr); inline void vec_perm(VectorRegister first_dest, VectorRegister second, VectorRegister perm); + inline void vec_perm(VectorRegister dest, VectorRegister first, VectorRegister second, VectorRegister perm); // RegisterOrConstant versions. // These emitters choose between the versions using two registers and // those with register and immediate, depending on the content of roc. // If the constant is not encodable as immediate, instructions to
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