< prev index next >

src/hotspot/cpu/sparc/assembler_sparc.hpp

Print this page

        

*** 643,653 **** // FMAf instructions supported only on certain processors static void fmaf_only() { assert(VM_Version::has_fmaf(), "This instruction only works on SPARC with FMAf"); } // MPMUL instruction supported only on certain processors ! static void mpmul_only() { assert( VM_Version::has_mpmul(), "This instruction only works on SPARC with MPMUL"); } // instruction only in VIS1 static void vis1_only() { assert(VM_Version::has_vis1(), "This instruction only works on SPARC with VIS1"); } // instruction only in VIS2 --- 643,653 ---- // FMAf instructions supported only on certain processors static void fmaf_only() { assert(VM_Version::has_fmaf(), "This instruction only works on SPARC with FMAf"); } // MPMUL instruction supported only on certain processors ! static void mpmul_only() { assert(VM_Version::has_mpmul(), "This instruction only works on SPARC with MPMUL"); } // instruction only in VIS1 static void vis1_only() { assert(VM_Version::has_vis1(), "This instruction only works on SPARC with VIS1"); } // instruction only in VIS2
*** 944,954 **** --- 944,958 ---- inline void fsqrt(FloatRegisterImpl::Width w, FloatRegister s, FloatRegister d); // fmaf instructions. inline void fmadd(FloatRegisterImpl::Width w, FloatRegister s1, FloatRegister s2, FloatRegister s3, FloatRegister d); + inline void fmsub(FloatRegisterImpl::Width w, FloatRegister s1, FloatRegister s2, FloatRegister s3, FloatRegister d); + inline void fnmadd(FloatRegisterImpl::Width w, FloatRegister s1, FloatRegister s2, FloatRegister s3, FloatRegister d); + inline void fnmsub(FloatRegisterImpl::Width w, FloatRegister s1, FloatRegister s2, FloatRegister s3, FloatRegister d); + // pp 165 inline void flush(Register s1, Register s2); inline void flush(Register s1, int simm13a);
< prev index next >