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src/hotspot/cpu/sparc/assembler_sparc.hpp

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 628   // create a low12 __value__ (not a field) for a given a 32-bit constant
 629   static int low12(int x) {
 630     return x & ((1 << 12) - 1);
 631   }
 632 
 633   // AES crypto instructions supported only on certain processors
 634   static void aes_only() { assert(VM_Version::has_aes(), "This instruction only works on SPARC with AES instructions support"); }
 635 
 636   // SHA crypto instructions supported only on certain processors
 637   static void sha1_only()   { assert(VM_Version::has_sha1(),   "This instruction only works on SPARC with SHA1"); }
 638   static void sha256_only() { assert(VM_Version::has_sha256(), "This instruction only works on SPARC with SHA256"); }
 639   static void sha512_only() { assert(VM_Version::has_sha512(), "This instruction only works on SPARC with SHA512"); }
 640 
 641   // CRC32C instruction supported only on certain processors
 642   static void crc32c_only() { assert(VM_Version::has_crc32c(), "This instruction only works on SPARC with CRC32C"); }
 643 
 644   // FMAf instructions supported only on certain processors
 645   static void fmaf_only() { assert(VM_Version::has_fmaf(), "This instruction only works on SPARC with FMAf"); }
 646 
 647   // MPMUL instruction supported only on certain processors
 648   static void mpmul_only() { assert( VM_Version::has_mpmul(), "This instruction only works on SPARC with MPMUL"); }
 649 
 650   // instruction only in VIS1
 651   static void vis1_only() { assert(VM_Version::has_vis1(), "This instruction only works on SPARC with VIS1"); }
 652 
 653   // instruction only in VIS2
 654   static void vis2_only() { assert(VM_Version::has_vis2(), "This instruction only works on SPARC with VIS2"); }
 655 
 656   // instruction only in VIS3
 657   static void vis3_only() { assert(VM_Version::has_vis3(), "This instruction only works on SPARC with VIS3"); }
 658 
 659   // instruction deprecated in v9
 660   static void v9_dep() { } // do nothing for now
 661 
 662  protected:
 663 #ifdef ASSERT
 664 #define VALIDATE_PIPELINE
 665 #endif
 666 
 667 #ifdef VALIDATE_PIPELINE
 668   // A simple delay-slot scheme:


 929 
 930   inline void fabs(FloatRegisterImpl::Width w, FloatRegister s, FloatRegister d);
 931 
 932   // pp 163
 933 
 934   inline void fmul(FloatRegisterImpl::Width w, FloatRegister s1, FloatRegister s2, FloatRegister d);
 935   inline void fmul(FloatRegisterImpl::Width sw, FloatRegisterImpl::Width dw, FloatRegister s1, FloatRegister s2, FloatRegister d);
 936   inline void fdiv(FloatRegisterImpl::Width w, FloatRegister s1, FloatRegister s2, FloatRegister d);
 937 
 938   // FXORs/FXORd instructions
 939 
 940   inline void fxor(FloatRegisterImpl::Width w, FloatRegister s1, FloatRegister s2, FloatRegister d);
 941 
 942   // pp 164
 943 
 944   inline void fsqrt(FloatRegisterImpl::Width w, FloatRegister s, FloatRegister d);
 945 
 946   // fmaf instructions.
 947 
 948   inline void fmadd(FloatRegisterImpl::Width w, FloatRegister s1, FloatRegister s2, FloatRegister s3, FloatRegister d);

 949 



 950   // pp 165
 951 
 952   inline void flush(Register s1, Register s2);
 953   inline void flush(Register s1, int simm13a);
 954 
 955   // pp 167
 956 
 957   void flushw();
 958 
 959   // pp 168
 960 
 961   void illtrap(int const22a);
 962 
 963   // pp 169
 964 
 965   void impdep1(int id1, int const19a);
 966   void impdep2(int id1, int const19a);
 967 
 968   // pp 170
 969 




 628   // create a low12 __value__ (not a field) for a given a 32-bit constant
 629   static int low12(int x) {
 630     return x & ((1 << 12) - 1);
 631   }
 632 
 633   // AES crypto instructions supported only on certain processors
 634   static void aes_only() { assert(VM_Version::has_aes(), "This instruction only works on SPARC with AES instructions support"); }
 635 
 636   // SHA crypto instructions supported only on certain processors
 637   static void sha1_only()   { assert(VM_Version::has_sha1(),   "This instruction only works on SPARC with SHA1"); }
 638   static void sha256_only() { assert(VM_Version::has_sha256(), "This instruction only works on SPARC with SHA256"); }
 639   static void sha512_only() { assert(VM_Version::has_sha512(), "This instruction only works on SPARC with SHA512"); }
 640 
 641   // CRC32C instruction supported only on certain processors
 642   static void crc32c_only() { assert(VM_Version::has_crc32c(), "This instruction only works on SPARC with CRC32C"); }
 643 
 644   // FMAf instructions supported only on certain processors
 645   static void fmaf_only() { assert(VM_Version::has_fmaf(), "This instruction only works on SPARC with FMAf"); }
 646 
 647   // MPMUL instruction supported only on certain processors
 648   static void mpmul_only() { assert(VM_Version::has_mpmul(), "This instruction only works on SPARC with MPMUL"); }
 649 
 650   // instruction only in VIS1
 651   static void vis1_only() { assert(VM_Version::has_vis1(), "This instruction only works on SPARC with VIS1"); }
 652 
 653   // instruction only in VIS2
 654   static void vis2_only() { assert(VM_Version::has_vis2(), "This instruction only works on SPARC with VIS2"); }
 655 
 656   // instruction only in VIS3
 657   static void vis3_only() { assert(VM_Version::has_vis3(), "This instruction only works on SPARC with VIS3"); }
 658 
 659   // instruction deprecated in v9
 660   static void v9_dep() { } // do nothing for now
 661 
 662  protected:
 663 #ifdef ASSERT
 664 #define VALIDATE_PIPELINE
 665 #endif
 666 
 667 #ifdef VALIDATE_PIPELINE
 668   // A simple delay-slot scheme:


 929 
 930   inline void fabs(FloatRegisterImpl::Width w, FloatRegister s, FloatRegister d);
 931 
 932   // pp 163
 933 
 934   inline void fmul(FloatRegisterImpl::Width w, FloatRegister s1, FloatRegister s2, FloatRegister d);
 935   inline void fmul(FloatRegisterImpl::Width sw, FloatRegisterImpl::Width dw, FloatRegister s1, FloatRegister s2, FloatRegister d);
 936   inline void fdiv(FloatRegisterImpl::Width w, FloatRegister s1, FloatRegister s2, FloatRegister d);
 937 
 938   // FXORs/FXORd instructions
 939 
 940   inline void fxor(FloatRegisterImpl::Width w, FloatRegister s1, FloatRegister s2, FloatRegister d);
 941 
 942   // pp 164
 943 
 944   inline void fsqrt(FloatRegisterImpl::Width w, FloatRegister s, FloatRegister d);
 945 
 946   // fmaf instructions.
 947 
 948   inline void fmadd(FloatRegisterImpl::Width w, FloatRegister s1, FloatRegister s2, FloatRegister s3, FloatRegister d);
 949   inline void fmsub(FloatRegisterImpl::Width w, FloatRegister s1, FloatRegister s2, FloatRegister s3, FloatRegister d);
 950 
 951   inline void fnmadd(FloatRegisterImpl::Width w, FloatRegister s1, FloatRegister s2, FloatRegister s3, FloatRegister d);
 952   inline void fnmsub(FloatRegisterImpl::Width w, FloatRegister s1, FloatRegister s2, FloatRegister s3, FloatRegister d);
 953 
 954   // pp 165
 955 
 956   inline void flush(Register s1, Register s2);
 957   inline void flush(Register s1, int simm13a);
 958 
 959   // pp 167
 960 
 961   void flushw();
 962 
 963   // pp 168
 964 
 965   void illtrap(int const22a);
 966 
 967   // pp 169
 968 
 969   void impdep1(int id1, int const19a);
 970   void impdep2(int id1, int const19a);
 971 
 972   // pp 170
 973 


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