4102 }
4103
4104 void MacroAssembler::vxorpd(XMMRegister dst, XMMRegister nds, AddressLiteral src, bool vector256) {
4105 if (reachable(src)) {
4106 vxorpd(dst, nds, as_Address(src), vector256);
4107 } else {
4108 lea(rscratch1, src);
4109 vxorpd(dst, nds, Address(rscratch1, 0), vector256);
4110 }
4111 }
4112
4113 void MacroAssembler::vxorps(XMMRegister dst, XMMRegister nds, AddressLiteral src, bool vector256) {
4114 if (reachable(src)) {
4115 vxorps(dst, nds, as_Address(src), vector256);
4116 } else {
4117 lea(rscratch1, src);
4118 vxorps(dst, nds, Address(rscratch1, 0), vector256);
4119 }
4120 }
4121
4122
4123 //////////////////////////////////////////////////////////////////////////////////
4124 #if INCLUDE_ALL_GCS
4125
4126 void MacroAssembler::g1_write_barrier_pre(Register obj,
4127 Register pre_val,
4128 Register thread,
4129 Register tmp,
4130 bool tosca_live,
4131 bool expand_call) {
4132
4133 // If expand_call is true then we expand the call_VM_leaf macro
4134 // directly to skip generating the check by
4135 // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp.
4136
4137 #ifdef _LP64
4138 assert(thread == r15_thread, "must be");
4139 #endif // _LP64
4140
4141 Label done;
|
4102 }
4103
4104 void MacroAssembler::vxorpd(XMMRegister dst, XMMRegister nds, AddressLiteral src, bool vector256) {
4105 if (reachable(src)) {
4106 vxorpd(dst, nds, as_Address(src), vector256);
4107 } else {
4108 lea(rscratch1, src);
4109 vxorpd(dst, nds, Address(rscratch1, 0), vector256);
4110 }
4111 }
4112
4113 void MacroAssembler::vxorps(XMMRegister dst, XMMRegister nds, AddressLiteral src, bool vector256) {
4114 if (reachable(src)) {
4115 vxorps(dst, nds, as_Address(src), vector256);
4116 } else {
4117 lea(rscratch1, src);
4118 vxorps(dst, nds, Address(rscratch1, 0), vector256);
4119 }
4120 }
4121
4122 void MacroAssembler::resolve_jobject(Register value,
4123 Register thread,
4124 Register tmp) {
4125 assert_different_registers(value, thread, tmp);
4126 Label done, not_weak;
4127 testptr(value, value);
4128 jcc(Assembler::zero, done); // Use NULL as-is.
4129 testptr(value, JNIHandles::weak_tag_mask); // Test for jweak tag.
4130 jcc(Assembler::zero, not_weak);
4131 // Resolve jweak.
4132 movptr(value, Address(value, -JNIHandles::weak_tag_value));
4133 verify_oop(value);
4134 #if INCLUDE_ALL_GCS
4135 if (UseG1GC) {
4136 g1_write_barrier_pre(noreg /* obj */,
4137 value /* pre_val */,
4138 thread /* thread */,
4139 tmp /* tmp */,
4140 true /* tosca_live */,
4141 true /* expand_call */);
4142 }
4143 #endif // INCLUDE_ALL_GCS
4144 jmp(done);
4145 bind(not_weak);
4146 // Resolve (untagged) jobject.
4147 movptr(value, Address(value, 0));
4148 verify_oop(value);
4149 bind(done);
4150 }
4151
4152 void MacroAssembler::clear_jweak_tag(Register possibly_jweak) {
4153 const int32_t inverted_jweak_mask = ~static_cast<int32_t>(JNIHandles::weak_tag_mask);
4154 STATIC_ASSERT(inverted_jweak_mask == -2); // otherwise check this code
4155 // The inverted mask is sign-extended
4156 andptr(possibly_jweak, inverted_jweak_mask);
4157 }
4158
4159 //////////////////////////////////////////////////////////////////////////////////
4160 #if INCLUDE_ALL_GCS
4161
4162 void MacroAssembler::g1_write_barrier_pre(Register obj,
4163 Register pre_val,
4164 Register thread,
4165 Register tmp,
4166 bool tosca_live,
4167 bool expand_call) {
4168
4169 // If expand_call is true then we expand the call_VM_leaf macro
4170 // directly to skip generating the check by
4171 // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp.
4172
4173 #ifdef _LP64
4174 assert(thread == r15_thread, "must be");
4175 #endif // _LP64
4176
4177 Label done;
|