src/share/vm/opto/cfgnode.cpp

*** 1,7 ****
  /*
!  * Copyright (c) 1997, 2016, Oracle and/or its affiliates. All rights reserved.
   * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   *
   * This code is free software; you can redistribute it and/or modify it
   * under the terms of the GNU General Public License version 2 only, as
   * published by the Free Software Foundation.
--- 1,7 ----
  /*
!  * Copyright (c) 1997, 2017, Oracle and/or its affiliates. All rights reserved.
   * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   *
   * This code is free software; you can redistribute it and/or modify it
   * under the terms of the GNU General Public License version 2 only, as
   * published by the Free Software Foundation.
*** 518,530 ****
      // If it is LoopNopde it had 2 (+1 itself) inputs and
      // one of them was cut. The loop is dead if it was EntryContol.
      // Loop node may have only one input because entry path
      // is removed in PhaseIdealLoop::Dominators().
      assert(!this->is_Loop() || cnt_orig <= 3, "Loop node should have 3 or less inputs");
!     if (this->is_Loop() && (del_it == LoopNode::EntryControl ||
!                             del_it == 0 && is_unreachable_region(phase)) ||
!        !this->is_Loop() && has_phis && is_unreachable_region(phase)) {
        // Yes,  the region will be removed during the next step below.
        // Cut the backedge input and remove phis since no data paths left.
        // We don't cut outputs to other nodes here since we need to put them
        // on the worklist.
        PhaseIterGVN *igvn = phase->is_IterGVN();
--- 518,530 ----
      // If it is LoopNopde it had 2 (+1 itself) inputs and
      // one of them was cut. The loop is dead if it was EntryContol.
      // Loop node may have only one input because entry path
      // is removed in PhaseIdealLoop::Dominators().
      assert(!this->is_Loop() || cnt_orig <= 3, "Loop node should have 3 or less inputs");
!     if ((this->is_Loop() && (del_it == LoopNode::EntryControl ||
!                              (del_it == 0 && is_unreachable_region(phase)))) ||
!         (!this->is_Loop() && has_phis && is_unreachable_region(phase))) {
        // Yes,  the region will be removed during the next step below.
        // Cut the backedge input and remove phis since no data paths left.
        // We don't cut outputs to other nodes here since we need to put them
        // on the worklist.
        PhaseIterGVN *igvn = phase->is_IterGVN();
*** 1686,1697 ****
        // is removed in PhaseIdealLoop::Dominators().
        assert(!r->is_Loop() || r->req() <= 3, "Loop node should have 3 or less inputs");
        bool is_loop = (r->is_Loop() && r->req() == 3);
        // Then, check if there is a data loop when phi references itself directly
        // or through other data nodes.
!       if (is_loop && !uin->eqv_uncast(in(LoopNode::EntryControl)) ||
!          !is_loop && is_unsafe_data_reference(uin)) {
          // Break this data loop to avoid creation of a dead loop.
          if (can_reshape) {
            return top;
          } else {
            // We can't return top if we are in Parse phase - cut inputs only
--- 1686,1697 ----
        // is removed in PhaseIdealLoop::Dominators().
        assert(!r->is_Loop() || r->req() <= 3, "Loop node should have 3 or less inputs");
        bool is_loop = (r->is_Loop() && r->req() == 3);
        // Then, check if there is a data loop when phi references itself directly
        // or through other data nodes.
!       if ((is_loop && !uin->eqv_uncast(in(LoopNode::EntryControl))) ||
!           (!is_loop && is_unsafe_data_reference(uin))) {
          // Break this data loop to avoid creation of a dead loop.
          if (can_reshape) {
            return top;
          } else {
            // We can't return top if we are in Parse phase - cut inputs only