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src/cpu/x86/vm/c1_LIRAssembler_x86.cpp

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   1 /*
   2  * Copyright (c) 2000, 2016, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *


1143   LIR_Address* addr = src->as_address_ptr();
1144   Address from_addr = as_Address(addr);
1145 
1146   if (addr->base()->type() == T_OBJECT) {
1147     __ verify_oop(addr->base()->as_pointer_register());
1148   }
1149 
1150   switch (type) {
1151     case T_BOOLEAN: // fall through
1152     case T_BYTE:    // fall through
1153     case T_CHAR:    // fall through
1154     case T_SHORT:
1155       if (!VM_Version::is_P6() && !from_addr.uses(dest->as_register())) {
1156         // on pre P6 processors we may get partial register stalls
1157         // so blow away the value of to_rinfo before loading a
1158         // partial word into it.  Do it here so that it precedes
1159         // the potential patch point below.
1160         __ xorptr(dest->as_register(), dest->as_register());
1161       }
1162       break;


1163   }
1164 
1165   PatchingStub* patch = NULL;
1166   if (patch_code != lir_patch_none) {
1167     patch = new PatchingStub(_masm, PatchingStub::access_field_id);
1168     assert(from_addr.disp() != 0, "must have");
1169   }
1170   if (info != NULL) {
1171     add_debug_info_for_null_check_here(info);
1172   }
1173 
1174   switch (type) {
1175     case T_FLOAT: {
1176       if (dest->is_single_xmm()) {
1177         __ movflt(dest->as_xmm_float_reg(), from_addr);
1178       } else {
1179         assert(dest->is_single_fpu(), "must be");
1180         assert(dest->fpu_regnr() == 0, "dest must be TOS");
1181         __ fld_s(from_addr);
1182       }


   1 /*
   2  * Copyright (c) 2000, 2017, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *


1143   LIR_Address* addr = src->as_address_ptr();
1144   Address from_addr = as_Address(addr);
1145 
1146   if (addr->base()->type() == T_OBJECT) {
1147     __ verify_oop(addr->base()->as_pointer_register());
1148   }
1149 
1150   switch (type) {
1151     case T_BOOLEAN: // fall through
1152     case T_BYTE:    // fall through
1153     case T_CHAR:    // fall through
1154     case T_SHORT:
1155       if (!VM_Version::is_P6() && !from_addr.uses(dest->as_register())) {
1156         // on pre P6 processors we may get partial register stalls
1157         // so blow away the value of to_rinfo before loading a
1158         // partial word into it.  Do it here so that it precedes
1159         // the potential patch point below.
1160         __ xorptr(dest->as_register(), dest->as_register());
1161       }
1162       break;
1163    default:
1164      break;
1165   }
1166 
1167   PatchingStub* patch = NULL;
1168   if (patch_code != lir_patch_none) {
1169     patch = new PatchingStub(_masm, PatchingStub::access_field_id);
1170     assert(from_addr.disp() != 0, "must have");
1171   }
1172   if (info != NULL) {
1173     add_debug_info_for_null_check_here(info);
1174   }
1175 
1176   switch (type) {
1177     case T_FLOAT: {
1178       if (dest->is_single_xmm()) {
1179         __ movflt(dest->as_xmm_float_reg(), from_addr);
1180       } else {
1181         assert(dest->is_single_fpu(), "must be");
1182         assert(dest->fpu_regnr() == 0, "dest must be TOS");
1183         __ fld_s(from_addr);
1184       }


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