1 /*
   2  * Copyright (c) 2000, 2018, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "c1/c1_Compilation.hpp"
  27 #include "c1/c1_Instruction.hpp"
  28 #include "c1/c1_InstructionPrinter.hpp"
  29 #include "c1/c1_LIRAssembler.hpp"
  30 #include "c1/c1_MacroAssembler.hpp"
  31 #include "c1/c1_ValueStack.hpp"
  32 #include "ci/ciInstance.hpp"
  33 #ifdef TARGET_ARCH_x86
  34 # include "nativeInst_x86.hpp"
  35 # include "vmreg_x86.inline.hpp"
  36 #endif
  37 #ifdef TARGET_ARCH_sparc
  38 # include "nativeInst_sparc.hpp"
  39 # include "vmreg_sparc.inline.hpp"
  40 #endif
  41 #ifdef TARGET_ARCH_zero
  42 # include "nativeInst_zero.hpp"
  43 # include "vmreg_zero.inline.hpp"
  44 #endif
  45 #ifdef TARGET_ARCH_arm
  46 # include "nativeInst_arm.hpp"
  47 # include "vmreg_arm.inline.hpp"
  48 #endif
  49 #ifdef TARGET_ARCH_ppc
  50 # include "nativeInst_ppc.hpp"
  51 # include "vmreg_ppc.inline.hpp"
  52 #endif
  53 
  54 
  55 void LIR_Assembler::patching_epilog(PatchingStub* patch, LIR_PatchCode patch_code, Register obj, CodeEmitInfo* info) {
  56   // we must have enough patching space so that call can be inserted
  57   while ((intx) _masm->pc() - (intx) patch->pc_start() < NativeCall::instruction_size) {
  58     _masm->nop();
  59   }
  60   patch->install(_masm, patch_code, obj, info);
  61   append_code_stub(patch);
  62 
  63 #ifdef ASSERT
  64   Bytecodes::Code code = info->scope()->method()->java_code_at_bci(info->stack()->bci());
  65   if (patch->id() == PatchingStub::access_field_id) {
  66     switch (code) {
  67       case Bytecodes::_putstatic:
  68       case Bytecodes::_getstatic:
  69       case Bytecodes::_putfield:
  70       case Bytecodes::_getfield:
  71         break;
  72       default:
  73         ShouldNotReachHere();
  74     }
  75   } else if (patch->id() == PatchingStub::load_klass_id) {
  76     switch (code) {
  77       case Bytecodes::_new:
  78       case Bytecodes::_anewarray:
  79       case Bytecodes::_multianewarray:
  80       case Bytecodes::_instanceof:
  81       case Bytecodes::_checkcast:
  82         break;
  83       default:
  84         ShouldNotReachHere();
  85     }
  86   } else if (patch->id() == PatchingStub::load_mirror_id) {
  87     switch (code) {
  88       case Bytecodes::_putstatic:
  89       case Bytecodes::_getstatic:
  90       case Bytecodes::_ldc:
  91       case Bytecodes::_ldc_w:
  92         break;
  93       default:
  94         ShouldNotReachHere();
  95     }
  96   } else if (patch->id() == PatchingStub::load_appendix_id) {
  97     Bytecodes::Code bc_raw = info->scope()->method()->raw_code_at_bci(info->stack()->bci());
  98     assert(Bytecodes::has_optional_appendix(bc_raw), "unexpected appendix resolution");
  99   } else {
 100     ShouldNotReachHere();
 101   }
 102 #endif
 103 }
 104 
 105 PatchingStub::PatchID LIR_Assembler::patching_id(CodeEmitInfo* info) {
 106   IRScope* scope = info->scope();
 107   Bytecodes::Code bc_raw = scope->method()->raw_code_at_bci(info->stack()->bci());
 108   if (Bytecodes::has_optional_appendix(bc_raw)) {
 109     return PatchingStub::load_appendix_id;
 110   }
 111   return PatchingStub::load_mirror_id;
 112 }
 113 
 114 //---------------------------------------------------------------
 115 
 116 
 117 LIR_Assembler::LIR_Assembler(Compilation* c):
 118    _compilation(c)
 119  , _masm(c->masm())
 120  , _bs(Universe::heap()->barrier_set())
 121  , _frame_map(c->frame_map())
 122  , _current_block(NULL)
 123  , _pending_non_safepoint(NULL)
 124  , _pending_non_safepoint_offset(0)
 125 {
 126   _slow_case_stubs = new CodeStubList();
 127 }
 128 
 129 
 130 LIR_Assembler::~LIR_Assembler() {
 131   // The unwind handler label may be unbound if this destructor is invoked because of a bail-out.
 132   // Reset it here to avoid an assertion.
 133   _unwind_handler_entry.reset();
 134 }
 135 
 136 
 137 void LIR_Assembler::check_codespace() {
 138   CodeSection* cs = _masm->code_section();
 139   if (cs->remaining() < (int)(NOT_LP64(1*K)LP64_ONLY(2*K))) {
 140     BAILOUT("CodeBuffer overflow");
 141   }
 142 }
 143 
 144 
 145 void LIR_Assembler::append_code_stub(CodeStub* stub) {
 146   _slow_case_stubs->append(stub);
 147 }
 148 
 149 void LIR_Assembler::emit_stubs(CodeStubList* stub_list) {
 150   for (int m = 0; m < stub_list->length(); m++) {
 151     CodeStub* s = (*stub_list)[m];
 152 
 153     check_codespace();
 154     CHECK_BAILOUT();
 155 
 156 #ifndef PRODUCT
 157     if (CommentedAssembly) {
 158       stringStream st;
 159       s->print_name(&st);
 160       st.print(" slow case");
 161       _masm->block_comment(st.as_string());
 162     }
 163 #endif
 164     s->emit_code(this);
 165 #ifdef ASSERT
 166     s->assert_no_unbound_labels();
 167 #endif
 168   }
 169 }
 170 
 171 
 172 void LIR_Assembler::emit_slow_case_stubs() {
 173   emit_stubs(_slow_case_stubs);
 174 }
 175 
 176 
 177 bool LIR_Assembler::needs_icache(ciMethod* method) const {
 178   return !method->is_static();
 179 }
 180 
 181 
 182 int LIR_Assembler::code_offset() const {
 183   return _masm->offset();
 184 }
 185 
 186 
 187 address LIR_Assembler::pc() const {
 188   return _masm->pc();
 189 }
 190 
 191 // To bang the stack of this compiled method we use the stack size
 192 // that the interpreter would need in case of a deoptimization. This
 193 // removes the need to bang the stack in the deoptimization blob which
 194 // in turn simplifies stack overflow handling.
 195 int LIR_Assembler::bang_size_in_bytes() const {
 196   return MAX2(initial_frame_size_in_bytes(), _compilation->interpreter_frame_size());
 197 }
 198 
 199 void LIR_Assembler::emit_exception_entries(ExceptionInfoList* info_list) {
 200   for (int i = 0; i < info_list->length(); i++) {
 201     XHandlers* handlers = info_list->at(i)->exception_handlers();
 202 
 203     for (int j = 0; j < handlers->length(); j++) {
 204       XHandler* handler = handlers->handler_at(j);
 205       assert(handler->lir_op_id() != -1, "handler not processed by LinearScan");
 206       assert(handler->entry_code() == NULL ||
 207              handler->entry_code()->instructions_list()->last()->code() == lir_branch ||
 208              handler->entry_code()->instructions_list()->last()->code() == lir_delay_slot, "last operation must be branch");
 209 
 210       if (handler->entry_pco() == -1) {
 211         // entry code not emitted yet
 212         if (handler->entry_code() != NULL && handler->entry_code()->instructions_list()->length() > 1) {
 213           handler->set_entry_pco(code_offset());
 214           if (CommentedAssembly) {
 215             _masm->block_comment("Exception adapter block");
 216           }
 217           emit_lir_list(handler->entry_code());
 218         } else {
 219           handler->set_entry_pco(handler->entry_block()->exception_handler_pco());
 220         }
 221 
 222         assert(handler->entry_pco() != -1, "must be set now");
 223       }
 224     }
 225   }
 226 }
 227 
 228 
 229 void LIR_Assembler::emit_code(BlockList* hir) {
 230   if (PrintLIR) {
 231     print_LIR(hir);
 232   }
 233 
 234   int n = hir->length();
 235   for (int i = 0; i < n; i++) {
 236     emit_block(hir->at(i));
 237     CHECK_BAILOUT();
 238   }
 239 
 240   flush_debug_info(code_offset());
 241 
 242   DEBUG_ONLY(check_no_unbound_labels());
 243 }
 244 
 245 
 246 void LIR_Assembler::emit_block(BlockBegin* block) {
 247   if (block->is_set(BlockBegin::backward_branch_target_flag)) {
 248     align_backward_branch_target();
 249   }
 250 
 251   // if this block is the start of an exception handler, record the
 252   // PC offset of the first instruction for later construction of
 253   // the ExceptionHandlerTable
 254   if (block->is_set(BlockBegin::exception_entry_flag)) {
 255     block->set_exception_handler_pco(code_offset());
 256   }
 257 
 258 #ifndef PRODUCT
 259   if (PrintLIRWithAssembly) {
 260     // don't print Phi's
 261     InstructionPrinter ip(false);
 262     block->print(ip);
 263   }
 264 #endif /* PRODUCT */
 265 
 266   assert(block->lir() != NULL, "must have LIR");
 267   X86_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed"));
 268 
 269 #ifndef PRODUCT
 270   if (CommentedAssembly) {
 271     stringStream st;
 272     st.print_cr(" block B%d [%d, %d]", block->block_id(), block->bci(), block->end()->printable_bci());
 273     _masm->block_comment(st.as_string());
 274   }
 275 #endif
 276 
 277   emit_lir_list(block->lir());
 278 
 279   X86_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed"));
 280 }
 281 
 282 
 283 void LIR_Assembler::emit_lir_list(LIR_List* list) {
 284   peephole(list);
 285 
 286   int n = list->length();
 287   for (int i = 0; i < n; i++) {
 288     LIR_Op* op = list->at(i);
 289 
 290     check_codespace();
 291     CHECK_BAILOUT();
 292 
 293 #ifndef PRODUCT
 294     if (CommentedAssembly) {
 295       // Don't record out every op since that's too verbose.  Print
 296       // branches since they include block and stub names.  Also print
 297       // patching moves since they generate funny looking code.
 298       if (op->code() == lir_branch ||
 299           (op->code() == lir_move && op->as_Op1()->patch_code() != lir_patch_none)) {
 300         stringStream st;
 301         op->print_on(&st);
 302         _masm->block_comment(st.as_string());
 303       }
 304     }
 305     if (PrintLIRWithAssembly) {
 306       // print out the LIR operation followed by the resulting assembly
 307       list->at(i)->print(); tty->cr();
 308     }
 309 #endif /* PRODUCT */
 310 
 311     op->emit_code(this);
 312 
 313     if (compilation()->debug_info_recorder()->recording_non_safepoints()) {
 314       process_debug_info(op);
 315     }
 316 
 317 #ifndef PRODUCT
 318     if (PrintLIRWithAssembly) {
 319       _masm->code()->decode();
 320     }
 321 #endif /* PRODUCT */
 322   }
 323 }
 324 
 325 #ifdef ASSERT
 326 void LIR_Assembler::check_no_unbound_labels() {
 327   CHECK_BAILOUT();
 328 
 329   for (int i = 0; i < _branch_target_blocks.length() - 1; i++) {
 330     if (!_branch_target_blocks.at(i)->label()->is_bound()) {
 331       tty->print_cr("label of block B%d is not bound", _branch_target_blocks.at(i)->block_id());
 332       assert(false, "unbound label");
 333     }
 334   }
 335 }
 336 #endif
 337 
 338 //----------------------------------debug info--------------------------------
 339 
 340 
 341 void LIR_Assembler::add_debug_info_for_branch(CodeEmitInfo* info) {
 342   _masm->code_section()->relocate(pc(), relocInfo::poll_type);
 343   int pc_offset = code_offset();
 344   flush_debug_info(pc_offset);
 345   info->record_debug_info(compilation()->debug_info_recorder(), pc_offset);
 346   if (info->exception_handlers() != NULL) {
 347     compilation()->add_exception_handlers_for_pco(pc_offset, info->exception_handlers());
 348   }
 349 }
 350 
 351 
 352 void LIR_Assembler::add_call_info(int pc_offset, CodeEmitInfo* cinfo) {
 353   flush_debug_info(pc_offset);
 354   cinfo->record_debug_info(compilation()->debug_info_recorder(), pc_offset);
 355   if (cinfo->exception_handlers() != NULL) {
 356     compilation()->add_exception_handlers_for_pco(pc_offset, cinfo->exception_handlers());
 357   }
 358 }
 359 
 360 static ValueStack* debug_info(Instruction* ins) {
 361   StateSplit* ss = ins->as_StateSplit();
 362   if (ss != NULL) return ss->state();
 363   return ins->state_before();
 364 }
 365 
 366 void LIR_Assembler::process_debug_info(LIR_Op* op) {
 367   Instruction* src = op->source();
 368   if (src == NULL)  return;
 369   int pc_offset = code_offset();
 370   if (_pending_non_safepoint == src) {
 371     _pending_non_safepoint_offset = pc_offset;
 372     return;
 373   }
 374   ValueStack* vstack = debug_info(src);
 375   if (vstack == NULL)  return;
 376   if (_pending_non_safepoint != NULL) {
 377     // Got some old debug info.  Get rid of it.
 378     if (debug_info(_pending_non_safepoint) == vstack) {
 379       _pending_non_safepoint_offset = pc_offset;
 380       return;
 381     }
 382     if (_pending_non_safepoint_offset < pc_offset) {
 383       record_non_safepoint_debug_info();
 384     }
 385     _pending_non_safepoint = NULL;
 386   }
 387   // Remember the debug info.
 388   if (pc_offset > compilation()->debug_info_recorder()->last_pc_offset()) {
 389     _pending_non_safepoint = src;
 390     _pending_non_safepoint_offset = pc_offset;
 391   }
 392 }
 393 
 394 // Index caller states in s, where 0 is the oldest, 1 its callee, etc.
 395 // Return NULL if n is too large.
 396 // Returns the caller_bci for the next-younger state, also.
 397 static ValueStack* nth_oldest(ValueStack* s, int n, int& bci_result) {
 398   ValueStack* t = s;
 399   for (int i = 0; i < n; i++) {
 400     if (t == NULL)  break;
 401     t = t->caller_state();
 402   }
 403   if (t == NULL)  return NULL;
 404   for (;;) {
 405     ValueStack* tc = t->caller_state();
 406     if (tc == NULL)  return s;
 407     t = tc;
 408     bci_result = tc->bci();
 409     s = s->caller_state();
 410   }
 411 }
 412 
 413 void LIR_Assembler::record_non_safepoint_debug_info() {
 414   int         pc_offset = _pending_non_safepoint_offset;
 415   ValueStack* vstack    = debug_info(_pending_non_safepoint);
 416   int         bci       = vstack->bci();
 417 
 418   DebugInformationRecorder* debug_info = compilation()->debug_info_recorder();
 419   assert(debug_info->recording_non_safepoints(), "sanity");
 420 
 421   debug_info->add_non_safepoint(pc_offset);
 422 
 423   // Visit scopes from oldest to youngest.
 424   for (int n = 0; ; n++) {
 425     int s_bci = bci;
 426     ValueStack* s = nth_oldest(vstack, n, s_bci);
 427     if (s == NULL)  break;
 428     IRScope* scope = s->scope();
 429     //Always pass false for reexecute since these ScopeDescs are never used for deopt
 430     debug_info->describe_scope(pc_offset, scope->method(), s->bci(), false/*reexecute*/);
 431   }
 432 
 433   debug_info->end_non_safepoint(pc_offset);
 434 }
 435 
 436 
 437 void LIR_Assembler::add_debug_info_for_null_check_here(CodeEmitInfo* cinfo) {
 438   add_debug_info_for_null_check(code_offset(), cinfo);
 439 }
 440 
 441 void LIR_Assembler::add_debug_info_for_null_check(int pc_offset, CodeEmitInfo* cinfo) {
 442   ImplicitNullCheckStub* stub = new ImplicitNullCheckStub(pc_offset, cinfo);
 443   append_code_stub(stub);
 444 }
 445 
 446 void LIR_Assembler::add_debug_info_for_div0_here(CodeEmitInfo* info) {
 447   add_debug_info_for_div0(code_offset(), info);
 448 }
 449 
 450 void LIR_Assembler::add_debug_info_for_div0(int pc_offset, CodeEmitInfo* cinfo) {
 451   DivByZeroStub* stub = new DivByZeroStub(pc_offset, cinfo);
 452   append_code_stub(stub);
 453 }
 454 
 455 void LIR_Assembler::emit_rtcall(LIR_OpRTCall* op) {
 456   rt_call(op->result_opr(), op->addr(), op->arguments(), op->tmp(), op->info());
 457 }
 458 
 459 
 460 void LIR_Assembler::emit_call(LIR_OpJavaCall* op) {
 461   verify_oop_map(op->info());
 462 
 463   if (os::is_MP()) {
 464     // must align calls sites, otherwise they can't be updated atomically on MP hardware
 465     align_call(op->code());
 466   }
 467 
 468   // emit the static call stub stuff out of line
 469   emit_static_call_stub();
 470   CHECK_BAILOUT();
 471 
 472   switch (op->code()) {
 473   case lir_static_call:
 474   case lir_dynamic_call:
 475     call(op, relocInfo::static_call_type);
 476     break;
 477   case lir_optvirtual_call:
 478     call(op, relocInfo::opt_virtual_call_type);
 479     break;
 480   case lir_icvirtual_call:
 481     ic_call(op);
 482     break;
 483   case lir_virtual_call:
 484     vtable_call(op);
 485     break;
 486   default:
 487     fatal(err_msg_res("unexpected op code: %s", op->name()));
 488     break;
 489   }
 490 
 491   // JSR 292
 492   // Record if this method has MethodHandle invokes.
 493   if (op->is_method_handle_invoke()) {
 494     compilation()->set_has_method_handle_invokes(true);
 495   }
 496 
 497 #if defined(X86) && defined(TIERED)
 498   // C2 leave fpu stack dirty clean it
 499   if (UseSSE < 2) {
 500     int i;
 501     for ( i = 1; i <= 7 ; i++ ) {
 502       ffree(i);
 503     }
 504     if (!op->result_opr()->is_float_kind()) {
 505       ffree(0);
 506     }
 507   }
 508 #endif // X86 && TIERED
 509 }
 510 
 511 
 512 void LIR_Assembler::emit_opLabel(LIR_OpLabel* op) {
 513   _masm->bind (*(op->label()));
 514 }
 515 
 516 
 517 void LIR_Assembler::emit_op1(LIR_Op1* op) {
 518   switch (op->code()) {
 519     case lir_move:
 520       if (op->move_kind() == lir_move_volatile) {
 521         assert(op->patch_code() == lir_patch_none, "can't patch volatiles");
 522         volatile_move_op(op->in_opr(), op->result_opr(), op->type(), op->info());
 523       } else {
 524         move_op(op->in_opr(), op->result_opr(), op->type(),
 525                 op->patch_code(), op->info(), op->pop_fpu_stack(),
 526                 op->move_kind() == lir_move_unaligned,
 527                 op->move_kind() == lir_move_wide);
 528       }
 529       break;
 530 
 531     case lir_prefetchr:
 532       prefetchr(op->in_opr());
 533       break;
 534 
 535     case lir_prefetchw:
 536       prefetchw(op->in_opr());
 537       break;
 538 
 539     case lir_roundfp: {
 540       LIR_OpRoundFP* round_op = op->as_OpRoundFP();
 541       roundfp_op(round_op->in_opr(), round_op->tmp(), round_op->result_opr(), round_op->pop_fpu_stack());
 542       break;
 543     }
 544 
 545     case lir_return:
 546       return_op(op->in_opr());
 547       break;
 548 
 549     case lir_safepoint:
 550       if (compilation()->debug_info_recorder()->last_pc_offset() == code_offset()) {
 551         _masm->nop();
 552       }
 553       safepoint_poll(op->in_opr(), op->info());
 554       break;
 555 
 556     case lir_fxch:
 557       fxch(op->in_opr()->as_jint());
 558       break;
 559 
 560     case lir_fld:
 561       fld(op->in_opr()->as_jint());
 562       break;
 563 
 564     case lir_ffree:
 565       ffree(op->in_opr()->as_jint());
 566       break;
 567 
 568     case lir_branch:
 569       break;
 570 
 571     case lir_push:
 572       push(op->in_opr());
 573       break;
 574 
 575     case lir_pop:
 576       pop(op->in_opr());
 577       break;
 578 
 579     case lir_neg:
 580       negate(op->in_opr(), op->result_opr());
 581       break;
 582 
 583     case lir_leal:
 584       leal(op->in_opr(), op->result_opr());
 585       break;
 586 
 587     case lir_null_check:
 588       if (GenerateCompilerNullChecks) {
 589         add_debug_info_for_null_check_here(op->info());
 590 
 591         if (op->in_opr()->is_single_cpu()) {
 592           _masm->null_check(op->in_opr()->as_register());
 593         } else {
 594           Unimplemented();
 595         }
 596       }
 597       break;
 598 
 599     case lir_monaddr:
 600       monitor_address(op->in_opr()->as_constant_ptr()->as_jint(), op->result_opr());
 601       break;
 602 
 603 #ifdef SPARC
 604     case lir_pack64:
 605       pack64(op->in_opr(), op->result_opr());
 606       break;
 607 
 608     case lir_unpack64:
 609       unpack64(op->in_opr(), op->result_opr());
 610       break;
 611 #endif
 612 
 613     case lir_unwind:
 614       unwind_op(op->in_opr());
 615       break;
 616 
 617     default:
 618       Unimplemented();
 619       break;
 620   }
 621 }
 622 
 623 
 624 void LIR_Assembler::emit_op0(LIR_Op0* op) {
 625   switch (op->code()) {
 626     case lir_word_align: {
 627       while (code_offset() % BytesPerWord != 0) {
 628         _masm->nop();
 629       }
 630       break;
 631     }
 632 
 633     case lir_nop:
 634       assert(op->info() == NULL, "not supported");
 635       _masm->nop();
 636       break;
 637 
 638     case lir_label:
 639       Unimplemented();
 640       break;
 641 
 642     case lir_build_frame:
 643       build_frame();
 644       break;
 645 
 646     case lir_std_entry:
 647       // init offsets
 648       offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
 649       _masm->align(CodeEntryAlignment);
 650       if (needs_icache(compilation()->method())) {
 651         check_icache();
 652       }
 653       offsets()->set_value(CodeOffsets::Verified_Entry, _masm->offset());
 654       _masm->verified_entry();
 655       build_frame();
 656       offsets()->set_value(CodeOffsets::Frame_Complete, _masm->offset());
 657       break;
 658 
 659     case lir_osr_entry:
 660       offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
 661       osr_entry();
 662       break;
 663 
 664     case lir_24bit_FPU:
 665       set_24bit_FPU();
 666       break;
 667 
 668     case lir_reset_FPU:
 669       reset_FPU();
 670       break;
 671 
 672     case lir_breakpoint:
 673       breakpoint();
 674       break;
 675 
 676     case lir_fpop_raw:
 677       fpop();
 678       break;
 679 
 680     case lir_membar:
 681       membar();
 682       break;
 683 
 684     case lir_membar_acquire:
 685       membar_acquire();
 686       break;
 687 
 688     case lir_membar_release:
 689       membar_release();
 690       break;
 691 
 692     case lir_membar_loadload:
 693       membar_loadload();
 694       break;
 695 
 696     case lir_membar_storestore:
 697       membar_storestore();
 698       break;
 699 
 700     case lir_membar_loadstore:
 701       membar_loadstore();
 702       break;
 703 
 704     case lir_membar_storeload:
 705       membar_storeload();
 706       break;
 707 
 708     case lir_get_thread:
 709       get_thread(op->result_opr());
 710       break;
 711 
 712     default:
 713       ShouldNotReachHere();
 714       break;
 715   }
 716 }
 717 
 718 
 719 void LIR_Assembler::emit_op2(LIR_Op2* op) {
 720   switch (op->code()) {
 721     case lir_cmp:
 722       if (op->info() != NULL) {
 723         assert(op->in_opr1()->is_address() || op->in_opr2()->is_address(),
 724                "shouldn't be codeemitinfo for non-address operands");
 725         add_debug_info_for_null_check_here(op->info()); // exception possible
 726       }
 727       comp_op(op->condition(), op->in_opr1(), op->in_opr2(), op);
 728       break;
 729 
 730     case lir_cmp_l2i:
 731     case lir_cmp_fd2i:
 732     case lir_ucmp_fd2i:
 733       comp_fl2i(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
 734       break;
 735 
 736     case lir_cmove:
 737       cmove(op->condition(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->type());
 738       break;
 739 
 740     case lir_shl:
 741     case lir_shr:
 742     case lir_ushr:
 743       if (op->in_opr2()->is_constant()) {
 744         shift_op(op->code(), op->in_opr1(), op->in_opr2()->as_constant_ptr()->as_jint(), op->result_opr());
 745       } else {
 746         shift_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp1_opr());
 747       }
 748       break;
 749 
 750     case lir_add:
 751     case lir_sub:
 752     case lir_mul:
 753     case lir_mul_strictfp:
 754     case lir_div:
 755     case lir_div_strictfp:
 756     case lir_rem:
 757       assert(op->fpu_pop_count() < 2, "");
 758       arith_op(
 759         op->code(),
 760         op->in_opr1(),
 761         op->in_opr2(),
 762         op->result_opr(),
 763         op->info(),
 764         op->fpu_pop_count() == 1);
 765       break;
 766 
 767     case lir_abs:
 768     case lir_sqrt:
 769     case lir_sin:
 770     case lir_tan:
 771     case lir_cos:
 772     case lir_log:
 773     case lir_log10:
 774     case lir_exp:
 775     case lir_pow:
 776       intrinsic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
 777       break;
 778 
 779     case lir_logic_and:
 780     case lir_logic_or:
 781     case lir_logic_xor:
 782       logic_op(
 783         op->code(),
 784         op->in_opr1(),
 785         op->in_opr2(),
 786         op->result_opr());
 787       break;
 788 
 789     case lir_throw:
 790       throw_op(op->in_opr1(), op->in_opr2(), op->info());
 791       break;
 792 
 793     case lir_xadd:
 794     case lir_xchg:
 795       atomic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp1_opr());
 796       break;
 797 
 798     default:
 799       Unimplemented();
 800       break;
 801   }
 802 }
 803 
 804 
 805 void LIR_Assembler::build_frame() {
 806   _masm->build_frame(initial_frame_size_in_bytes(), bang_size_in_bytes());
 807 }
 808 
 809 
 810 void LIR_Assembler::roundfp_op(LIR_Opr src, LIR_Opr tmp, LIR_Opr dest, bool pop_fpu_stack) {
 811   assert((src->is_single_fpu() && dest->is_single_stack()) ||
 812          (src->is_double_fpu() && dest->is_double_stack()),
 813          "round_fp: rounds register -> stack location");
 814 
 815   reg2stack (src, dest, src->type(), pop_fpu_stack);
 816 }
 817 
 818 
 819 void LIR_Assembler::move_op(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool unaligned, bool wide) {
 820   if (src->is_register()) {
 821     if (dest->is_register()) {
 822       assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
 823       reg2reg(src,  dest);
 824     } else if (dest->is_stack()) {
 825       assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
 826       reg2stack(src, dest, type, pop_fpu_stack);
 827     } else if (dest->is_address()) {
 828       reg2mem(src, dest, type, patch_code, info, pop_fpu_stack, wide, unaligned);
 829     } else {
 830       ShouldNotReachHere();
 831     }
 832 
 833   } else if (src->is_stack()) {
 834     assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
 835     if (dest->is_register()) {
 836       stack2reg(src, dest, type);
 837     } else if (dest->is_stack()) {
 838       stack2stack(src, dest, type);
 839     } else {
 840       ShouldNotReachHere();
 841     }
 842 
 843   } else if (src->is_constant()) {
 844     if (dest->is_register()) {
 845       const2reg(src, dest, patch_code, info); // patching is possible
 846     } else if (dest->is_stack()) {
 847       assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
 848       const2stack(src, dest);
 849     } else if (dest->is_address()) {
 850       assert(patch_code == lir_patch_none, "no patching allowed here");
 851       const2mem(src, dest, type, info, wide);
 852     } else {
 853       ShouldNotReachHere();
 854     }
 855 
 856   } else if (src->is_address()) {
 857     mem2reg(src, dest, type, patch_code, info, wide, unaligned);
 858 
 859   } else {
 860     ShouldNotReachHere();
 861   }
 862 }
 863 
 864 
 865 void LIR_Assembler::verify_oop_map(CodeEmitInfo* info) {
 866 #ifndef PRODUCT
 867   if (VerifyOops) {
 868     OopMapStream s(info->oop_map());
 869     while (!s.is_done()) {
 870       OopMapValue v = s.current();
 871       if (v.is_oop()) {
 872         VMReg r = v.reg();
 873         if (!r->is_stack()) {
 874           stringStream st;
 875           st.print("bad oop %s at %d", r->as_Register()->name(), _masm->offset());
 876 #ifdef SPARC
 877           _masm->_verify_oop(r->as_Register(), strdup(st.as_string()), __FILE__, __LINE__);
 878 #else
 879           _masm->verify_oop(r->as_Register());
 880 #endif
 881         } else {
 882           _masm->verify_stack_oop(r->reg2stack() * VMRegImpl::stack_slot_size);
 883         }
 884       }
 885       check_codespace();
 886       CHECK_BAILOUT();
 887 
 888       s.next();
 889     }
 890   }
 891 #endif
 892 }