1 /*
   2  * Copyright (c) 1997, 2018, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #ifndef SHARE_VM_ASM_ASSEMBLER_HPP
  26 #define SHARE_VM_ASM_ASSEMBLER_HPP
  27 
  28 #include "asm/codeBuffer.hpp"
  29 #include "code/oopRecorder.hpp"
  30 #include "code/relocInfo.hpp"
  31 #include "memory/allocation.hpp"
  32 #include "utilities/debug.hpp"
  33 #include "utilities/growableArray.hpp"
  34 #include "utilities/top.hpp"
  35 
  36 #ifdef TARGET_ARCH_x86
  37 # include "register_x86.hpp"
  38 # include "vm_version_x86.hpp"
  39 #endif
  40 #ifdef TARGET_ARCH_sparc
  41 # include "register_sparc.hpp"
  42 # include "vm_version_sparc.hpp"
  43 #endif
  44 #ifdef TARGET_ARCH_zero
  45 # include "register_zero.hpp"
  46 # include "vm_version_zero.hpp"
  47 #endif
  48 #ifdef TARGET_ARCH_arm
  49 # include "register_arm.hpp"
  50 # include "vm_version_arm.hpp"
  51 #endif
  52 #ifdef TARGET_ARCH_ppc
  53 # include "register_ppc.hpp"
  54 # include "vm_version_ppc.hpp"
  55 #endif
  56 
  57 // This file contains platform-independent assembler declarations.
  58 
  59 class MacroAssembler;
  60 class AbstractAssembler;
  61 class Label;
  62 
  63 /**
  64  * Labels represent destinations for control transfer instructions.  Such
  65  * instructions can accept a Label as their target argument.  A Label is
  66  * bound to the current location in the code stream by calling the
  67  * MacroAssembler's 'bind' method, which in turn calls the Label's 'bind'
  68  * method.  A Label may be referenced by an instruction before it's bound
  69  * (i.e., 'forward referenced').  'bind' stores the current code offset
  70  * in the Label object.
  71  *
  72  * If an instruction references a bound Label, the offset field(s) within
  73  * the instruction are immediately filled in based on the Label's code
  74  * offset.  If an instruction references an unbound label, that
  75  * instruction is put on a list of instructions that must be patched
  76  * (i.e., 'resolved') when the Label is bound.
  77  *
  78  * 'bind' will call the platform-specific 'patch_instruction' method to
  79  * fill in the offset field(s) for each unresolved instruction (if there
  80  * are any).  'patch_instruction' lives in one of the
  81  * cpu/<arch>/vm/assembler_<arch>* files.
  82  *
  83  * Instead of using a linked list of unresolved instructions, a Label has
  84  * an array of unresolved instruction code offsets.  _patch_index
  85  * contains the total number of forward references.  If the Label's array
  86  * overflows (i.e., _patch_index grows larger than the array size), a
  87  * GrowableArray is allocated to hold the remaining offsets.  (The cache
  88  * size is 4 for now, which handles over 99.5% of the cases)
  89  *
  90  * Labels may only be used within a single CodeSection.  If you need
  91  * to create references between code sections, use explicit relocations.
  92  */
  93 class Label VALUE_OBJ_CLASS_SPEC {
  94  private:
  95   enum { PatchCacheSize = 4 };
  96 
  97   // _loc encodes both the binding state (via its sign)
  98   // and the binding locator (via its value) of a label.
  99   //
 100   // _loc >= 0   bound label, loc() encodes the target (jump) position
 101   // _loc == -1  unbound label
 102   int _loc;
 103 
 104   // References to instructions that jump to this unresolved label.
 105   // These instructions need to be patched when the label is bound
 106   // using the platform-specific patchInstruction() method.
 107   //
 108   // To avoid having to allocate from the C-heap each time, we provide
 109   // a local cache and use the overflow only if we exceed the local cache
 110   int _patches[PatchCacheSize];
 111   int _patch_index;
 112   GrowableArray<int>* _patch_overflow;
 113 
 114   Label(const Label&) { ShouldNotReachHere(); }
 115 
 116  public:
 117 
 118   /**
 119    * After binding, be sure 'patch_instructions' is called later to link
 120    */
 121   void bind_loc(int loc) {
 122     assert(loc >= 0, "illegal locator");
 123     assert(_loc == -1, "already bound");
 124     _loc = loc;
 125   }
 126   void bind_loc(int pos, int sect) { bind_loc(CodeBuffer::locator(pos, sect)); }
 127 
 128 #ifndef PRODUCT
 129   // Iterates over all unresolved instructions for printing
 130   void print_instructions(MacroAssembler* masm) const;
 131 #endif // PRODUCT
 132 
 133   /**
 134    * Returns the position of the the Label in the code buffer
 135    * The position is a 'locator', which encodes both offset and section.
 136    */
 137   int loc() const {
 138     assert(_loc >= 0, "unbound label");
 139     return _loc;
 140   }
 141   int loc_pos()  const { return CodeBuffer::locator_pos(loc()); }
 142   int loc_sect() const { return CodeBuffer::locator_sect(loc()); }
 143 
 144   bool is_bound() const    { return _loc >=  0; }
 145   bool is_unbound() const  { return _loc == -1 && _patch_index > 0; }
 146   bool is_unused() const   { return _loc == -1 && _patch_index == 0; }
 147 
 148   /**
 149    * Adds a reference to an unresolved displacement instruction to
 150    * this unbound label
 151    *
 152    * @param cb         the code buffer being patched
 153    * @param branch_loc the locator of the branch instruction in the code buffer
 154    */
 155   void add_patch_at(CodeBuffer* cb, int branch_loc);
 156 
 157   /**
 158    * Iterate over the list of patches, resolving the instructions
 159    * Call patch_instruction on each 'branch_loc' value
 160    */
 161   void patch_instructions(MacroAssembler* masm);
 162 
 163   void init() {
 164     _loc = -1;
 165     _patch_index = 0;
 166     _patch_overflow = NULL;
 167   }
 168 
 169   Label() {
 170     init();
 171   }
 172 
 173   ~Label() {
 174     assert(is_bound() || is_unused(), "Label was never bound to a location, but it was used as a jmp target");
 175   }
 176 
 177   void reset() {
 178     init(); //leave _patch_overflow because it points to CodeBuffer.
 179   }
 180 };
 181 
 182 // A union type for code which has to assemble both constant and
 183 // non-constant operands, when the distinction cannot be made
 184 // statically.
 185 class RegisterOrConstant VALUE_OBJ_CLASS_SPEC {
 186  private:
 187   Register _r;
 188   intptr_t _c;
 189 
 190  public:
 191   RegisterOrConstant(): _r(noreg), _c(0) {}
 192   RegisterOrConstant(Register r): _r(r), _c(0) {}
 193   RegisterOrConstant(intptr_t c): _r(noreg), _c(c) {}
 194 
 195   Register as_register() const { assert(is_register(),""); return _r; }
 196   intptr_t as_constant() const { assert(is_constant(),""); return _c; }
 197 
 198   Register register_or_noreg() const { return _r; }
 199   intptr_t constant_or_zero() const  { return _c; }
 200 
 201   bool is_register() const { return _r != noreg; }
 202   bool is_constant() const { return _r == noreg; }
 203 };
 204 
 205 // The Abstract Assembler: Pure assembler doing NO optimizations on the
 206 // instruction level; i.e., what you write is what you get.
 207 // The Assembler is generating code into a CodeBuffer.
 208 class AbstractAssembler : public ResourceObj  {
 209   friend class Label;
 210 
 211  protected:
 212   CodeSection* _code_section;          // section within the code buffer
 213   OopRecorder* _oop_recorder;          // support for relocInfo::oop_type
 214 
 215  public:
 216   // Code emission & accessing
 217   address addr_at(int pos) const { return code_section()->start() + pos; }
 218 
 219  protected:
 220   // This routine is called with a label is used for an address.
 221   // Labels and displacements truck in offsets, but target must return a PC.
 222   address target(Label& L)             { return code_section()->target(L, pc()); }
 223 
 224   bool is8bit(int x) const             { return -0x80 <= x && x < 0x80; }
 225   bool isByte(int x) const             { return 0 <= x && x < 0x100; }
 226   bool isShiftCount(int x) const       { return 0 <= x && x < 32; }
 227 
 228   // Instruction boundaries (required when emitting relocatable values).
 229   class InstructionMark: public StackObj {
 230    private:
 231     AbstractAssembler* _assm;
 232 
 233    public:
 234     InstructionMark(AbstractAssembler* assm) : _assm(assm) {
 235       assert(assm->inst_mark() == NULL, "overlapping instructions");
 236       _assm->set_inst_mark();
 237     }
 238     ~InstructionMark() {
 239       _assm->clear_inst_mark();
 240     }
 241   };
 242   friend class InstructionMark;
 243 #ifdef ASSERT
 244   // Make it return true on platforms which need to verify
 245   // instruction boundaries for some operations.
 246   static bool pd_check_instruction_mark();
 247 
 248   // Add delta to short branch distance to verify that it still fit into imm8.
 249   int _short_branch_delta;
 250 
 251   int  short_branch_delta() const { return _short_branch_delta; }
 252   void set_short_branch_delta()   { _short_branch_delta = 32; }
 253   void clear_short_branch_delta() { _short_branch_delta = 0; }
 254 
 255   class ShortBranchVerifier: public StackObj {
 256    private:
 257     AbstractAssembler* _assm;
 258 
 259    public:
 260     ShortBranchVerifier(AbstractAssembler* assm) : _assm(assm) {
 261       assert(assm->short_branch_delta() == 0, "overlapping instructions");
 262       _assm->set_short_branch_delta();
 263     }
 264     ~ShortBranchVerifier() {
 265       _assm->clear_short_branch_delta();
 266     }
 267   };
 268 #else
 269   // Dummy in product.
 270   class ShortBranchVerifier: public StackObj {
 271    public:
 272     ShortBranchVerifier(AbstractAssembler* assm) {}
 273   };
 274 #endif
 275 
 276  public:
 277 
 278   // Creation
 279   AbstractAssembler(CodeBuffer* code);
 280 
 281   // ensure buf contains all code (call this before using/copying the code)
 282   void flush();
 283 
 284   void emit_int8(   int8_t  x) { code_section()->emit_int8(   x); }
 285   void emit_int16(  int16_t x) { code_section()->emit_int16(  x); }
 286   void emit_int32(  int32_t x) { code_section()->emit_int32(  x); }
 287   void emit_int64(  int64_t x) { code_section()->emit_int64(  x); }
 288 
 289   void emit_float(  jfloat  x) { code_section()->emit_float(  x); }
 290   void emit_double( jdouble x) { code_section()->emit_double( x); }
 291   void emit_address(address x) { code_section()->emit_address(x); }
 292 
 293   // min and max values for signed immediate ranges
 294   static int min_simm(int nbits) { return -(intptr_t(1) << (nbits - 1))    ; }
 295   static int max_simm(int nbits) { return  (intptr_t(1) << (nbits - 1)) - 1; }
 296 
 297   // Define some:
 298   static int min_simm10() { return min_simm(10); }
 299   static int min_simm13() { return min_simm(13); }
 300   static int min_simm16() { return min_simm(16); }
 301 
 302   // Test if x is within signed immediate range for nbits
 303   static bool is_simm(intptr_t x, int nbits) { return min_simm(nbits) <= x && x <= max_simm(nbits); }
 304 
 305   // Define some:
 306   static bool is_simm5( intptr_t x) { return is_simm(x, 5 ); }
 307   static bool is_simm8( intptr_t x) { return is_simm(x, 8 ); }
 308   static bool is_simm10(intptr_t x) { return is_simm(x, 10); }
 309   static bool is_simm11(intptr_t x) { return is_simm(x, 11); }
 310   static bool is_simm12(intptr_t x) { return is_simm(x, 12); }
 311   static bool is_simm13(intptr_t x) { return is_simm(x, 13); }
 312   static bool is_simm16(intptr_t x) { return is_simm(x, 16); }
 313   static bool is_simm26(intptr_t x) { return is_simm(x, 26); }
 314   static bool is_simm32(intptr_t x) { return is_simm(x, 32); }
 315 
 316   // Accessors
 317   CodeSection*  code_section() const   { return _code_section; }
 318   CodeBuffer*   code()         const   { return code_section()->outer(); }
 319   int           sect()         const   { return code_section()->index(); }
 320   address       pc()           const   { return code_section()->end();   }
 321   int           offset()       const   { return code_section()->size();  }
 322   int           locator()      const   { return CodeBuffer::locator(offset(), sect()); }
 323 
 324   OopRecorder*  oop_recorder() const   { return _oop_recorder; }
 325   void      set_oop_recorder(OopRecorder* r) { _oop_recorder = r; }
 326 
 327   address       inst_mark() const { return code_section()->mark();       }
 328   void      set_inst_mark()       {        code_section()->set_mark();   }
 329   void    clear_inst_mark()       {        code_section()->clear_mark(); }
 330 
 331   // Constants in code
 332   void relocate(RelocationHolder const& rspec, int format = 0) {
 333     assert(!pd_check_instruction_mark()
 334         || inst_mark() == NULL || inst_mark() == code_section()->end(),
 335         "call relocate() between instructions");
 336     code_section()->relocate(code_section()->end(), rspec, format);
 337   }
 338   void relocate(   relocInfo::relocType rtype, int format = 0) {
 339     code_section()->relocate(code_section()->end(), rtype, format);
 340   }
 341 
 342   static int code_fill_byte();         // used to pad out odd-sized code buffers
 343 
 344   // Associate a comment with the current offset.  It will be printed
 345   // along with the disassembly when printing nmethods.  Currently
 346   // only supported in the instruction section of the code buffer.
 347   void block_comment(const char* comment);
 348   // Copy str to a buffer that has the same lifetime as the CodeBuffer
 349   const char* code_string(const char* str);
 350 
 351   // Label functions
 352   void bind(Label& L); // binds an unbound label L to the current code position
 353 
 354   // Move to a different section in the same code buffer.
 355   void set_code_section(CodeSection* cs);
 356 
 357   // Inform assembler when generating stub code and relocation info
 358   address    start_a_stub(int required_space);
 359   void       end_a_stub();
 360   // Ditto for constants.
 361   address    start_a_const(int required_space, int required_align = sizeof(double));
 362   void       end_a_const(CodeSection* cs);  // Pass the codesection to continue in (insts or stubs?).
 363 
 364   // constants support
 365   //
 366   // We must remember the code section (insts or stubs) in c1
 367   // so we can reset to the proper section in end_a_const().
 368   address long_constant(jlong c) {
 369     CodeSection* c1 = _code_section;
 370     address ptr = start_a_const(sizeof(c), sizeof(c));
 371     if (ptr != NULL) {
 372       emit_int64(c);
 373       end_a_const(c1);
 374     }
 375     return ptr;
 376   }
 377   address double_constant(jdouble c) {
 378     CodeSection* c1 = _code_section;
 379     address ptr = start_a_const(sizeof(c), sizeof(c));
 380     if (ptr != NULL) {
 381       emit_double(c);
 382       end_a_const(c1);
 383     }
 384     return ptr;
 385   }
 386   address float_constant(jfloat c) {
 387     CodeSection* c1 = _code_section;
 388     address ptr = start_a_const(sizeof(c), sizeof(c));
 389     if (ptr != NULL) {
 390       emit_float(c);
 391       end_a_const(c1);
 392     }
 393     return ptr;
 394   }
 395   address address_constant(address c) {
 396     CodeSection* c1 = _code_section;
 397     address ptr = start_a_const(sizeof(c), sizeof(c));
 398     if (ptr != NULL) {
 399       emit_address(c);
 400       end_a_const(c1);
 401     }
 402     return ptr;
 403   }
 404   address address_constant(address c, RelocationHolder const& rspec) {
 405     CodeSection* c1 = _code_section;
 406     address ptr = start_a_const(sizeof(c), sizeof(c));
 407     if (ptr != NULL) {
 408       relocate(rspec);
 409       emit_address(c);
 410       end_a_const(c1);
 411     }
 412     return ptr;
 413   }
 414 
 415   // Bootstrapping aid to cope with delayed determination of constants.
 416   // Returns a static address which will eventually contain the constant.
 417   // The value zero (NULL) stands instead of a constant which is still uncomputed.
 418   // Thus, the eventual value of the constant must not be zero.
 419   // This is fine, since this is designed for embedding object field
 420   // offsets in code which must be generated before the object class is loaded.
 421   // Field offsets are never zero, since an object's header (mark word)
 422   // is located at offset zero.
 423   RegisterOrConstant delayed_value(int(*value_fn)(), Register tmp, int offset = 0);
 424   RegisterOrConstant delayed_value(address(*value_fn)(), Register tmp, int offset = 0);
 425   virtual RegisterOrConstant delayed_value_impl(intptr_t* delayed_value_addr, Register tmp, int offset) = 0;
 426   // Last overloading is platform-dependent; look in assembler_<arch>.cpp.
 427   static intptr_t* delayed_value_addr(int(*constant_fn)());
 428   static intptr_t* delayed_value_addr(address(*constant_fn)());
 429   static void update_delayed_values();
 430 
 431   // Bang stack to trigger StackOverflowError at a safe location
 432   // implementation delegates to machine-specific bang_stack_with_offset
 433   void generate_stack_overflow_check( int frame_size_in_bytes );
 434   virtual void bang_stack_with_offset(int offset) = 0;
 435 
 436 
 437   /**
 438    * A platform-dependent method to patch a jump instruction that refers
 439    * to this label.
 440    *
 441    * @param branch the location of the instruction to patch
 442    * @param masm the assembler which generated the branch
 443    */
 444   void pd_patch_instruction(address branch, address target);
 445 
 446 };
 447 
 448 #ifdef TARGET_ARCH_x86
 449 # include "assembler_x86.hpp"
 450 #endif
 451 #ifdef TARGET_ARCH_sparc
 452 # include "assembler_sparc.hpp"
 453 #endif
 454 #ifdef TARGET_ARCH_zero
 455 # include "assembler_zero.hpp"
 456 #endif
 457 #ifdef TARGET_ARCH_arm
 458 # include "assembler_arm.hpp"
 459 #endif
 460 #ifdef TARGET_ARCH_ppc
 461 # include "assembler_ppc.hpp"
 462 #endif
 463 
 464 
 465 #endif // SHARE_VM_ASM_ASSEMBLER_HPP