1 /*
2 * Copyright (c) 2016, 2018, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2016 SAP SE. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "precompiled.hpp"
27 #include "c1/c1_Defs.hpp"
28 #include "c1/c1_MacroAssembler.hpp"
29 #include "c1/c1_Runtime1.hpp"
30 #include "ci/ciUtilities.hpp"
31 #include "gc/shared/cardTable.hpp"
32 #include "gc/shared/cardTableBarrierSet.hpp"
33 #include "interpreter/interpreter.hpp"
34 #include "nativeInst_s390.hpp"
35 #include "oops/compiledICHolder.hpp"
36 #include "oops/oop.inline.hpp"
37 #include "prims/jvmtiExport.hpp"
38 #include "register_s390.hpp"
39 #include "runtime/sharedRuntime.hpp"
40 #include "runtime/signature.hpp"
41 #include "runtime/vframeArray.hpp"
42 #include "utilities/macros.hpp"
43 #include "vmreg_s390.inline.hpp"
44 #include "registerSaver_s390.hpp"
45 #if INCLUDE_ALL_GCS
46 #include "gc/g1/g1BarrierSet.hpp"
47 #include "gc/g1/g1CardTable.hpp"
48 #include "gc/g1/g1ThreadLocalData.hpp"
49 #endif
50
51 // Implementation of StubAssembler
52
53 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry_point, int number_of_arguments) {
54 set_num_rt_args(0); // Nothing on stack.
55 assert(!(oop_result1->is_valid() || metadata_result->is_valid()) || oop_result1 != metadata_result, "registers must be different");
56
57 // We cannot trust that code generated by the C++ compiler saves R14
58 // to z_abi_160.return_pc, because sometimes it spills R14 using stmg at
59 // z_abi_160.gpr14 (e.g. InterpreterRuntime::_new()).
60 // Therefore we load the PC into Z_R1_scratch and let set_last_Java_frame() save
61 // it into the frame anchor.
62 address pc = get_PC(Z_R1_scratch);
63 int call_offset = (int)(pc - addr_at(0));
64 set_last_Java_frame(Z_SP, Z_R1_scratch);
65
66 // ARG1 must hold thread address.
67 z_lgr(Z_ARG1, Z_thread);
68
69 address return_pc = NULL;
70 align_call_far_patchable(this->pc());
71 return_pc = call_c_opt(entry_point);
72 assert(return_pc != NULL, "const section overflow");
73
74 reset_last_Java_frame();
75
76 // Check for pending exceptions.
77 {
78 load_and_test_long(Z_R0_scratch, Address(Z_thread, Thread::pending_exception_offset()));
79
80 // This used to conditionally jump to forward_exception however it is
81 // possible if we relocate that the branch will not reach. So we must jump
82 // around so we can always reach.
83
84 Label ok;
85 z_bre(ok); // Bcondequal is the same as bcondZero.
86
87 // exception pending => forward to exception handler
88
89 // Make sure that the vm_results are cleared.
90 if (oop_result1->is_valid()) {
91 clear_mem(Address(Z_thread, JavaThread::vm_result_offset()), sizeof(jlong));
92 }
93 if (metadata_result->is_valid()) {
94 clear_mem(Address(Z_thread, JavaThread::vm_result_2_offset()), sizeof(jlong));
95 }
96 if (frame_size() == no_frame_size) {
97 // Pop the stub frame.
98 pop_frame();
99 restore_return_pc();
100 load_const_optimized(Z_R1, StubRoutines::forward_exception_entry());
101 z_br(Z_R1);
102 } else if (_stub_id == Runtime1::forward_exception_id) {
103 should_not_reach_here();
104 } else {
105 load_const_optimized(Z_R1, Runtime1::entry_for (Runtime1::forward_exception_id));
106 z_br(Z_R1);
107 }
108
109 bind(ok);
110 }
111
112 // Get oop results if there are any and reset the values in the thread.
113 if (oop_result1->is_valid()) {
114 get_vm_result(oop_result1);
115 }
116 if (metadata_result->is_valid()) {
117 get_vm_result_2(metadata_result);
118 }
119
120 return call_offset;
121 }
122
123
124 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1) {
125 // Z_ARG1 is reserved for the thread.
126 lgr_if_needed(Z_ARG2, arg1);
127 return call_RT(oop_result1, metadata_result, entry, 1);
128 }
129
130
131 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2) {
132 // Z_ARG1 is reserved for the thread.
133 lgr_if_needed(Z_ARG2, arg1);
134 assert(arg2 != Z_ARG2, "smashed argument");
135 lgr_if_needed(Z_ARG3, arg2);
136 return call_RT(oop_result1, metadata_result, entry, 2);
137 }
138
139
140 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2, Register arg3) {
141 // Z_ARG1 is reserved for the thread.
142 lgr_if_needed(Z_ARG2, arg1);
143 assert(arg2 != Z_ARG2, "smashed argument");
144 lgr_if_needed(Z_ARG3, arg2);
145 assert(arg3 != Z_ARG3, "smashed argument");
146 lgr_if_needed(Z_ARG4, arg3);
147 return call_RT(oop_result1, metadata_result, entry, 3);
148 }
149
150
151 // Implementation of Runtime1
152
153 #define __ sasm->
154
155 #ifndef PRODUCT
156 #undef __
157 #define __ (Verbose ? (sasm->block_comment(FILE_AND_LINE),sasm):sasm)->
158 #endif // !PRODUCT
159
160 #define BLOCK_COMMENT(str) if (PrintAssembly) __ block_comment(str)
161 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
162
163 static OopMap* generate_oop_map(StubAssembler* sasm) {
164 RegisterSaver::RegisterSet reg_set = RegisterSaver::all_registers;
165 int frame_size_in_slots =
166 RegisterSaver::live_reg_frame_size(reg_set) / VMRegImpl::stack_slot_size;
167 sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word);
168 return RegisterSaver::generate_oop_map(sasm, reg_set);
169 }
170
171 static OopMap* save_live_registers(StubAssembler* sasm, bool save_fpu_registers = true, Register return_pc = Z_R14) {
172 __ block_comment("save_live_registers");
173 RegisterSaver::RegisterSet reg_set =
174 save_fpu_registers ? RegisterSaver::all_registers : RegisterSaver::all_integer_registers;
175 int frame_size_in_slots =
176 RegisterSaver::live_reg_frame_size(reg_set) / VMRegImpl::stack_slot_size;
177 sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word);
178 return RegisterSaver::save_live_registers(sasm, reg_set, return_pc);
179 }
180
181 static OopMap* save_live_registers_except_r2(StubAssembler* sasm, bool save_fpu_registers = true) {
182 if (!save_fpu_registers) {
183 __ unimplemented(FILE_AND_LINE);
184 }
185 __ block_comment("save_live_registers");
186 RegisterSaver::RegisterSet reg_set = RegisterSaver::all_registers_except_r2;
187 int frame_size_in_slots =
188 RegisterSaver::live_reg_frame_size(reg_set) / VMRegImpl::stack_slot_size;
189 sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word);
190 return RegisterSaver::save_live_registers(sasm, reg_set);
191 }
192
193 static OopMap* save_volatile_registers(StubAssembler* sasm, Register return_pc = Z_R14) {
194 __ block_comment("save_volatile_registers");
195 RegisterSaver::RegisterSet reg_set = RegisterSaver::all_volatile_registers;
196 int frame_size_in_slots =
197 RegisterSaver::live_reg_frame_size(reg_set) / VMRegImpl::stack_slot_size;
198 sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word);
199 return RegisterSaver::save_live_registers(sasm, reg_set, return_pc);
200 }
201
202 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
203 __ block_comment("restore_live_registers");
204 RegisterSaver::RegisterSet reg_set =
205 restore_fpu_registers ? RegisterSaver::all_registers : RegisterSaver::all_integer_registers;
206 RegisterSaver::restore_live_registers(sasm, reg_set);
207 }
208
209 static void restore_live_registers_except_r2(StubAssembler* sasm, bool restore_fpu_registers = true) {
210 if (!restore_fpu_registers) {
211 __ unimplemented(FILE_AND_LINE);
212 }
213 __ block_comment("restore_live_registers_except_r2");
214 RegisterSaver::restore_live_registers(sasm, RegisterSaver::all_registers_except_r2);
215 }
216
217 static void restore_volatile_registers(StubAssembler* sasm) {
218 __ block_comment("restore_volatile_registers");
219 RegisterSaver::RegisterSet reg_set = RegisterSaver::all_volatile_registers;
220 RegisterSaver::restore_live_registers(sasm, reg_set);
221 }
222
223 void Runtime1::initialize_pd() {
224 // Nothing to do.
225 }
226
227 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) {
228 // Make a frame and preserve the caller's caller-save registers.
229 OopMap* oop_map = save_live_registers(sasm);
230 int call_offset;
231 if (!has_argument) {
232 call_offset = __ call_RT(noreg, noreg, target);
233 } else {
234 call_offset = __ call_RT(noreg, noreg, target, Z_R1_scratch, Z_R0_scratch);
235 }
236 OopMapSet* oop_maps = new OopMapSet();
237 oop_maps->add_gc_map(call_offset, oop_map);
238
239 __ should_not_reach_here();
240 return oop_maps;
241 }
242
243 void Runtime1::generate_unwind_exception(StubAssembler *sasm) {
244 // Incoming parameters: Z_EXC_OOP and Z_EXC_PC.
245 // Keep copies in callee-saved registers during runtime call.
246 const Register exception_oop_callee_saved = Z_R11;
247 const Register exception_pc_callee_saved = Z_R12;
248 // Other registers used in this stub.
249 const Register handler_addr = Z_R4;
250
251 // Verify that only exception_oop, is valid at this time.
252 __ invalidate_registers(Z_EXC_OOP, Z_EXC_PC);
253
254 // Check that fields in JavaThread for exception oop and issuing pc are set.
255 __ asm_assert_mem8_is_zero(in_bytes(JavaThread::exception_oop_offset()), Z_thread, "exception oop already set : " FILE_AND_LINE, 0);
256 __ asm_assert_mem8_is_zero(in_bytes(JavaThread::exception_pc_offset()), Z_thread, "exception pc already set : " FILE_AND_LINE, 0);
257
258 // Save exception_oop and pc in callee-saved register to preserve it
259 // during runtime calls.
260 __ verify_not_null_oop(Z_EXC_OOP);
261 __ lgr_if_needed(exception_oop_callee_saved, Z_EXC_OOP);
262 __ lgr_if_needed(exception_pc_callee_saved, Z_EXC_PC);
263
264 __ push_frame_abi160(0); // Runtime code needs the z_abi_160.
265
266 // Search the exception handler address of the caller (using the return address).
267 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), Z_thread, Z_EXC_PC);
268 // Z_RET(Z_R2): exception handler address of the caller.
269
270 __ pop_frame();
271
272 __ invalidate_registers(exception_oop_callee_saved, exception_pc_callee_saved, Z_RET);
273
274 // Move result of call into correct register.
275 __ lgr_if_needed(handler_addr, Z_RET);
276
277 // Restore exception oop and pc to Z_EXC_OOP and Z_EXC_PC (required convention of exception handler).
278 __ lgr_if_needed(Z_EXC_OOP, exception_oop_callee_saved);
279 __ lgr_if_needed(Z_EXC_PC, exception_pc_callee_saved);
280
281 // Verify that there is really a valid exception in Z_EXC_OOP.
282 __ verify_not_null_oop(Z_EXC_OOP);
283
284 __ z_br(handler_addr); // Jump to exception handler.
285 }
286
287 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {
288 // Make a frame and preserve the caller's caller-save registers.
289 OopMap* oop_map = save_live_registers(sasm);
290
291 // Call the runtime patching routine, returns non-zero if nmethod got deopted.
292 int call_offset = __ call_RT(noreg, noreg, target);
293 OopMapSet* oop_maps = new OopMapSet();
294 oop_maps->add_gc_map(call_offset, oop_map);
295
296 // Re-execute the patched instruction or, if the nmethod was
297 // deoptmized, return to the deoptimization handler entry that will
298 // cause re-execution of the current bytecode.
299 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
300 assert(deopt_blob != NULL, "deoptimization blob must have been created");
301
302 __ z_ltr(Z_RET, Z_RET); // return value == 0
303
304 restore_live_registers(sasm);
305
306 __ z_bcr(Assembler::bcondZero, Z_R14);
307
308 // Return to the deoptimization handler entry for unpacking and
309 // rexecute if we simply returned then we'd deopt as if any call we
310 // patched had just returned.
311 AddressLiteral dest(deopt_blob->unpack_with_reexecution());
312 __ load_const_optimized(Z_R1_scratch, dest);
313 __ z_br(Z_R1_scratch);
314
315 return oop_maps;
316 }
317
318 OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
319
320 // for better readability
321 const bool must_gc_arguments = true;
322 const bool dont_gc_arguments = false;
323
324 // Default value; overwritten for some optimized stubs that are
325 // called from methods that do not use the fpu.
326 bool save_fpu_registers = true;
327
328 // Stub code and info for the different stubs.
329 OopMapSet* oop_maps = NULL;
330 switch (id) {
331 case forward_exception_id:
332 {
333 oop_maps = generate_handle_exception(id, sasm);
334 // will not return
335 }
336 break;
337
338 case new_instance_id:
339 case fast_new_instance_id:
340 case fast_new_instance_init_check_id:
341 {
342 Register klass = Z_R11; // Incoming
343 Register obj = Z_R2; // Result
344
345 if (id == new_instance_id) {
346 __ set_info("new_instance", dont_gc_arguments);
347 } else if (id == fast_new_instance_id) {
348 __ set_info("fast new_instance", dont_gc_arguments);
349 } else {
350 assert(id == fast_new_instance_init_check_id, "bad StubID");
351 __ set_info("fast new_instance init check", dont_gc_arguments);
352 }
353
354 OopMap* map = save_live_registers_except_r2(sasm);
355 int call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_instance), klass);
356 oop_maps = new OopMapSet();
357 oop_maps->add_gc_map(call_offset, map);
358 restore_live_registers_except_r2(sasm);
359
360 __ verify_oop(obj);
361 __ z_br(Z_R14);
362 }
363 break;
364
365 case counter_overflow_id:
366 {
367 // Arguments :
368 // bci : stack param 0
369 // method : stack param 1
370 //
371 Register bci = Z_ARG2, method = Z_ARG3;
372 // frame size in bytes
373 OopMap* map = save_live_registers(sasm);
374 const int frame_size = sasm->frame_size() * VMRegImpl::slots_per_word * VMRegImpl::stack_slot_size;
375 __ z_lg(bci, 0*BytesPerWord + FrameMap::first_available_sp_in_frame + frame_size, Z_SP);
376 __ z_lg(method, 1*BytesPerWord + FrameMap::first_available_sp_in_frame + frame_size, Z_SP);
377 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci, method);
378 oop_maps = new OopMapSet();
379 oop_maps->add_gc_map(call_offset, map);
380 restore_live_registers(sasm);
381 __ z_br(Z_R14);
382 }
383 break;
384 case new_type_array_id:
385 case new_object_array_id:
386 {
387 Register length = Z_R13; // Incoming
388 Register klass = Z_R11; // Incoming
389 Register obj = Z_R2; // Result
390
391 if (id == new_type_array_id) {
392 __ set_info("new_type_array", dont_gc_arguments);
393 } else {
394 __ set_info("new_object_array", dont_gc_arguments);
395 }
396
397 #ifdef ASSERT
398 // Assert object type is really an array of the proper kind.
399 {
400 NearLabel ok;
401 Register t0 = obj;
402 __ mem2reg_opt(t0, Address(klass, Klass::layout_helper_offset()), false);
403 __ z_sra(t0, Klass::_lh_array_tag_shift);
404 int tag = ((id == new_type_array_id)
405 ? Klass::_lh_array_tag_type_value
406 : Klass::_lh_array_tag_obj_value);
407 __ compare32_and_branch(t0, tag, Assembler::bcondEqual, ok);
408 __ stop("assert(is an array klass)");
409 __ should_not_reach_here();
410 __ bind(ok);
411 }
412 #endif // ASSERT
413
414 OopMap* map = save_live_registers_except_r2(sasm);
415 int call_offset;
416 if (id == new_type_array_id) {
417 call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_type_array), klass, length);
418 } else {
419 call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_object_array), klass, length);
420 }
421
422 oop_maps = new OopMapSet();
423 oop_maps->add_gc_map(call_offset, map);
424 restore_live_registers_except_r2(sasm);
425
426 __ verify_oop(obj);
427 __ z_br(Z_R14);
428 }
429 break;
430
431 case new_multi_array_id:
432 { __ set_info("new_multi_array", dont_gc_arguments);
433 // Z_R3,: klass
434 // Z_R4,: rank
435 // Z_R5: address of 1st dimension
436 OopMap* map = save_live_registers(sasm);
437 int call_offset = __ call_RT(Z_R2, noreg, CAST_FROM_FN_PTR(address, new_multi_array), Z_R3, Z_R4, Z_R5);
438
439 oop_maps = new OopMapSet();
440 oop_maps->add_gc_map(call_offset, map);
441 restore_live_registers_except_r2(sasm);
442
443 // Z_R2,: new multi array
444 __ verify_oop(Z_R2);
445 __ z_br(Z_R14);
446 }
447 break;
448
449 case register_finalizer_id:
450 {
451 __ set_info("register_finalizer", dont_gc_arguments);
452
453 // Load the klass and check the has finalizer flag.
454 Register klass = Z_ARG2;
455 __ load_klass(klass, Z_ARG1);
456 __ testbit(Address(klass, Klass::access_flags_offset()), exact_log2(JVM_ACC_HAS_FINALIZER));
457 __ z_bcr(Assembler::bcondAllZero, Z_R14); // Return if bit is not set.
458
459 OopMap* oop_map = save_live_registers(sasm);
460 int call_offset = __ call_RT(noreg, noreg,
461 CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), Z_ARG1);
462 oop_maps = new OopMapSet();
463 oop_maps->add_gc_map(call_offset, oop_map);
464
465 // Now restore all the live registers.
466 restore_live_registers(sasm);
467
468 __ z_br(Z_R14);
469 }
470 break;
471
472 case throw_range_check_failed_id:
473 { __ set_info("range_check_failed", dont_gc_arguments);
474 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true);
475 }
476 break;
477
478 case throw_index_exception_id:
479 { __ set_info("index_range_check_failed", dont_gc_arguments);
480 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true);
481 }
482 break;
483 case throw_div0_exception_id:
484 { __ set_info("throw_div0_exception", dont_gc_arguments);
485 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false);
486 }
487 break;
488 case throw_null_pointer_exception_id:
489 { __ set_info("throw_null_pointer_exception", dont_gc_arguments);
490 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false);
491 }
492 break;
493 case handle_exception_nofpu_id:
494 case handle_exception_id:
495 { __ set_info("handle_exception", dont_gc_arguments);
496 oop_maps = generate_handle_exception(id, sasm);
497 }
498 break;
499 case handle_exception_from_callee_id:
500 { __ set_info("handle_exception_from_callee", dont_gc_arguments);
501 oop_maps = generate_handle_exception(id, sasm);
502 }
503 break;
504 case unwind_exception_id:
505 { __ set_info("unwind_exception", dont_gc_arguments);
506 // Note: no stubframe since we are about to leave the current
507 // activation and we are calling a leaf VM function only.
508 generate_unwind_exception(sasm);
509 }
510 break;
511 case throw_array_store_exception_id:
512 { __ set_info("throw_array_store_exception", dont_gc_arguments);
513 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), true);
514 }
515 break;
516 case throw_class_cast_exception_id:
517 { // Z_R1_scratch: object
518 __ set_info("throw_class_cast_exception", dont_gc_arguments);
519 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true);
520 }
521 break;
522 case throw_incompatible_class_change_error_id:
523 { __ set_info("throw_incompatible_class_cast_exception", dont_gc_arguments);
524 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false);
525 }
526 break;
527 case slow_subtype_check_id:
528 {
529 // Arguments :
530 // sub : stack param 0
531 // super: stack param 1
532 // raddr: Z_R14, blown by call
533 //
534 // Result : condition code 0 for match (bcondEqual will be true),
535 // condition code 2 for miss (bcondNotEqual will be true)
536 NearLabel miss;
537 const Register Rsubklass = Z_ARG2; // sub
538 const Register Rsuperklass = Z_ARG3; // super
539
540 // No args, but tmp registers that are killed.
541 const Register Rlength = Z_ARG4; // cache array length
542 const Register Rarray_ptr = Z_ARG5; // Current value from cache array.
543
544 if (UseCompressedOops) {
545 assert(Universe::heap() != NULL, "java heap must be initialized to generate partial_subtype_check stub");
546 }
547
548 const int frame_size = 4*BytesPerWord + frame::z_abi_160_size;
549 // Save return pc. This is not necessary, but could be helpful
550 // in the case of crashes.
551 __ save_return_pc();
552 __ push_frame(frame_size);
553 // Save registers before changing them.
554 int i = 0;
555 __ z_stg(Rsubklass, (i++)*BytesPerWord + frame::z_abi_160_size, Z_SP);
556 __ z_stg(Rsuperklass, (i++)*BytesPerWord + frame::z_abi_160_size, Z_SP);
557 __ z_stg(Rlength, (i++)*BytesPerWord + frame::z_abi_160_size, Z_SP);
558 __ z_stg(Rarray_ptr, (i++)*BytesPerWord + frame::z_abi_160_size, Z_SP);
559 assert(i*BytesPerWord + frame::z_abi_160_size == frame_size, "check");
560
561 // Get sub and super from stack.
562 __ z_lg(Rsubklass, 0*BytesPerWord + FrameMap::first_available_sp_in_frame + frame_size, Z_SP);
563 __ z_lg(Rsuperklass, 1*BytesPerWord + FrameMap::first_available_sp_in_frame + frame_size, Z_SP);
564
565 __ check_klass_subtype_slow_path(Rsubklass, Rsuperklass, Rarray_ptr, Rlength, NULL, &miss);
566
567 // Match falls through here.
568 i = 0;
569 __ z_lg(Rsubklass, (i++)*BytesPerWord + frame::z_abi_160_size, Z_SP);
570 __ z_lg(Rsuperklass, (i++)*BytesPerWord + frame::z_abi_160_size, Z_SP);
571 __ z_lg(Rlength, (i++)*BytesPerWord + frame::z_abi_160_size, Z_SP);
572 __ z_lg(Rarray_ptr, (i++)*BytesPerWord + frame::z_abi_160_size, Z_SP);
573 assert(i*BytesPerWord + frame::z_abi_160_size == frame_size, "check");
574 __ pop_frame();
575 // Return pc is still in R_14.
576 __ clear_reg(Z_R0_scratch); // Zero indicates a match. Set CC 0 (bcondEqual will be true)
577 __ z_br(Z_R14);
578
579 __ BIND(miss);
580 i = 0;
581 __ z_lg(Rsubklass, (i++)*BytesPerWord + frame::z_abi_160_size, Z_SP);
582 __ z_lg(Rsuperklass, (i++)*BytesPerWord + frame::z_abi_160_size, Z_SP);
583 __ z_lg(Rlength, (i++)*BytesPerWord + frame::z_abi_160_size, Z_SP);
584 __ z_lg(Rarray_ptr, (i++)*BytesPerWord + frame::z_abi_160_size, Z_SP);
585 assert(i*BytesPerWord + frame::z_abi_160_size == frame_size, "check");
586 __ pop_frame();
587 // return pc is still in R_14
588 __ load_const_optimized(Z_R0_scratch, 1); // One indicates a miss.
589 __ z_ltgr(Z_R0_scratch, Z_R0_scratch); // Set CC 2 (bcondNotEqual will be true).
590 __ z_br(Z_R14);
591 }
592 break;
593 case monitorenter_nofpu_id:
594 case monitorenter_id:
595 { // Z_R1_scratch : object
596 // Z_R13 : lock address (see LIRGenerator::syncTempOpr())
597 __ set_info("monitorenter", dont_gc_arguments);
598
599 int save_fpu_registers = (id == monitorenter_id);
600 // Make a frame and preserve the caller's caller-save registers.
601 OopMap* oop_map = save_live_registers(sasm, save_fpu_registers);
602
603 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), Z_R1_scratch, Z_R13);
604
605 oop_maps = new OopMapSet();
606 oop_maps->add_gc_map(call_offset, oop_map);
607 restore_live_registers(sasm, save_fpu_registers);
608
609 __ z_br(Z_R14);
610 }
611 break;
612
613 case monitorexit_nofpu_id:
614 case monitorexit_id:
615 { // Z_R1_scratch : lock address
616 // Note: really a leaf routine but must setup last java sp
617 // => Use call_RT for now (speed can be improved by
618 // doing last java sp setup manually).
619 __ set_info("monitorexit", dont_gc_arguments);
620
621 int save_fpu_registers = (id == monitorexit_id);
622 // Make a frame and preserve the caller's caller-save registers.
623 OopMap* oop_map = save_live_registers(sasm, save_fpu_registers);
624
625 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), Z_R1_scratch);
626
627 oop_maps = new OopMapSet();
628 oop_maps->add_gc_map(call_offset, oop_map);
629 restore_live_registers(sasm, save_fpu_registers);
630
631 __ z_br(Z_R14);
632 }
633 break;
634
635 case deoptimize_id:
636 { // Args: Z_R1_scratch: trap request
637 __ set_info("deoptimize", dont_gc_arguments);
638 Register trap_request = Z_R1_scratch;
639 OopMap* oop_map = save_live_registers(sasm);
640 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, deoptimize), trap_request);
641 oop_maps = new OopMapSet();
642 oop_maps->add_gc_map(call_offset, oop_map);
643 restore_live_registers(sasm);
644 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
645 assert(deopt_blob != NULL, "deoptimization blob must have been created");
646 AddressLiteral dest(deopt_blob->unpack_with_reexecution());
647 __ load_const_optimized(Z_R1_scratch, dest);
648 __ z_br(Z_R1_scratch);
649 }
650 break;
651
652 case access_field_patching_id:
653 { __ set_info("access_field_patching", dont_gc_arguments);
654 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching));
655 }
656 break;
657
658 case load_klass_patching_id:
659 { __ set_info("load_klass_patching", dont_gc_arguments);
660 // We should set up register map.
661 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching));
662 }
663 break;
664
665 case load_mirror_patching_id:
666 { __ set_info("load_mirror_patching", dont_gc_arguments);
667 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_mirror_patching));
668 }
669 break;
670
671 case load_appendix_patching_id:
672 { __ set_info("load_appendix_patching", dont_gc_arguments);
673 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_appendix_patching));
674 }
675 break;
676 #if 0
677 case dtrace_object_alloc_id:
678 { // rax,: object
679 StubFrame f(sasm, "dtrace_object_alloc", dont_gc_arguments);
680 // We can't gc here so skip the oopmap but make sure that all
681 // the live registers get saved.
682 save_live_registers(sasm, 1);
683
684 __ NOT_LP64(push(rax)) LP64_ONLY(mov(c_rarg0, rax));
685 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_object_alloc)));
686 NOT_LP64(__ pop(rax));
687
688 restore_live_registers(sasm);
689 }
690 break;
691
692 case fpu2long_stub_id:
693 {
694 // rax, and rdx are destroyed, but should be free since the result is returned there
695 // preserve rsi,ecx
696 __ push(rsi);
697 __ push(rcx);
698 LP64_ONLY(__ push(rdx);)
699
700 // check for NaN
701 Label return0, do_return, return_min_jlong, do_convert;
702
703 Address value_high_word(rsp, wordSize + 4);
704 Address value_low_word(rsp, wordSize);
705 Address result_high_word(rsp, 3*wordSize + 4);
706 Address result_low_word(rsp, 3*wordSize);
707
708 __ subptr(rsp, 32); // more than enough on 32bit
709 __ fst_d(value_low_word);
710 __ movl(rax, value_high_word);
711 __ andl(rax, 0x7ff00000);
712 __ cmpl(rax, 0x7ff00000);
713 __ jcc(Assembler::notEqual, do_convert);
714 __ movl(rax, value_high_word);
715 __ andl(rax, 0xfffff);
716 __ orl(rax, value_low_word);
717 __ jcc(Assembler::notZero, return0);
718
719 __ bind(do_convert);
720 __ fnstcw(Address(rsp, 0));
721 __ movzwl(rax, Address(rsp, 0));
722 __ orl(rax, 0xc00);
723 __ movw(Address(rsp, 2), rax);
724 __ fldcw(Address(rsp, 2));
725 __ fwait();
726 __ fistp_d(result_low_word);
727 __ fldcw(Address(rsp, 0));
728 __ fwait();
729 // This gets the entire long in rax on 64bit
730 __ movptr(rax, result_low_word);
731 // testing of high bits
732 __ movl(rdx, result_high_word);
733 __ mov(rcx, rax);
734 // What the heck is the point of the next instruction???
735 __ xorl(rcx, 0x0);
736 __ movl(rsi, 0x80000000);
737 __ xorl(rsi, rdx);
738 __ orl(rcx, rsi);
739 __ jcc(Assembler::notEqual, do_return);
740 __ fldz();
741 __ fcomp_d(value_low_word);
742 __ fnstsw_ax();
743 __ testl(rax, 0x4100); // ZF & CF == 0
744 __ jcc(Assembler::equal, return_min_jlong);
745 // return max_jlong
746 __ mov64(rax, CONST64(0x7fffffffffffffff));
747 __ jmp(do_return);
748
749 __ bind(return_min_jlong);
750 __ mov64(rax, UCONST64(0x8000000000000000));
751 __ jmp(do_return);
752
753 __ bind(return0);
754 __ fpop();
755 __ xorptr(rax, rax);
756
757 __ bind(do_return);
758 __ addptr(rsp, 32);
759 LP64_ONLY(__ pop(rdx);)
760 __ pop(rcx);
761 __ pop(rsi);
762 __ ret(0);
763 }
764 break;
765 #endif // TODO
766
767 #if INCLUDE_ALL_GCS
768 case g1_pre_barrier_slow_id:
769 { // Z_R1_scratch: previous value of memory
770
771 BarrierSet* bs = BarrierSet::barrier_set();
772 if (bs->kind() != BarrierSet::G1BarrierSet) {
773 __ should_not_reach_here(FILE_AND_LINE);
774 break;
775 }
776
777 __ set_info("g1_pre_barrier_slow_id", dont_gc_arguments);
778
779 Register pre_val = Z_R1_scratch;
780 Register tmp = Z_R6; // Must be non-volatile because it is used to save pre_val.
781 Register tmp2 = Z_R7;
782
783 Label refill, restart, marking_not_active;
784 int satb_q_active_byte_offset = in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset());
785 int satb_q_index_byte_offset = in_bytes(G1ThreadLocalData::satb_mark_queue_index_offset());
786 int satb_q_buf_byte_offset = in_bytes(G1ThreadLocalData::satb_mark_queue_buffer_offset());
787
788 // Save tmp registers (see assertion in G1PreBarrierStub::emit_code()).
789 __ z_stg(tmp, 0*BytesPerWord + FrameMap::first_available_sp_in_frame, Z_SP);
790 __ z_stg(tmp2, 1*BytesPerWord + FrameMap::first_available_sp_in_frame, Z_SP);
791
792 // Is marking still active?
793 if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
794 __ load_and_test_int(tmp, Address(Z_thread, satb_q_active_byte_offset));
795 } else {
796 assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
797 __ load_and_test_byte(tmp, Address(Z_thread, satb_q_active_byte_offset));
798 }
799 __ z_bre(marking_not_active); // Activity indicator is zero, so there is no marking going on currently.
800
801 __ bind(restart);
802 // Load the index into the SATB buffer. SATBMarkQueue::_index is a
803 // size_t so ld_ptr is appropriate.
804 __ z_ltg(tmp, satb_q_index_byte_offset, Z_R0, Z_thread);
805
806 // index == 0?
807 __ z_brz(refill);
808
809 __ z_lg(tmp2, satb_q_buf_byte_offset, Z_thread);
810 __ add2reg(tmp, -oopSize);
811
812 __ z_stg(pre_val, 0, tmp, tmp2); // [_buf + index] := <address_of_card>
813 __ z_stg(tmp, satb_q_index_byte_offset, Z_thread);
814
815 __ bind(marking_not_active);
816 // Restore tmp registers (see assertion in G1PreBarrierStub::emit_code()).
817 __ z_lg(tmp, 0*BytesPerWord + FrameMap::first_available_sp_in_frame, Z_SP);
818 __ z_lg(tmp2, 1*BytesPerWord + FrameMap::first_available_sp_in_frame, Z_SP);
819 __ z_br(Z_R14);
820
821 __ bind(refill);
822 save_volatile_registers(sasm);
823 __ z_lgr(tmp, pre_val); // save pre_val
824 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SATBMarkQueueSet::handle_zero_index_for_thread),
825 Z_thread);
826 __ z_lgr(pre_val, tmp); // restore pre_val
827 restore_volatile_registers(sasm);
828 __ z_bru(restart);
829 }
830 break;
831
832 case g1_post_barrier_slow_id:
833 { // Z_R1_scratch: oop address, address of updated memory slot
834 BarrierSet* bs = BarrierSet::barrier_set();
835 if (bs->kind() != BarrierSet::G1BarrierSet) {
836 __ should_not_reach_here(FILE_AND_LINE);
837 break;
838 }
839
840 __ set_info("g1_post_barrier_slow_id", dont_gc_arguments);
841
842 Register addr_oop = Z_R1_scratch;
843 Register addr_card = Z_R1_scratch;
844 Register r1 = Z_R6; // Must be saved/restored.
845 Register r2 = Z_R7; // Must be saved/restored.
846 Register cardtable = r1; // Must be non-volatile, because it is used to save addr_card.
847 jbyte* byte_map_base = ci_card_table_address();
848
849 // Save registers used below (see assertion in G1PreBarrierStub::emit_code()).
850 __ z_stg(r1, 0*BytesPerWord + FrameMap::first_available_sp_in_frame, Z_SP);
851
852 Label not_already_dirty, restart, refill, young_card;
853
854 // Calculate address of card corresponding to the updated oop slot.
855 AddressLiteral rs(byte_map_base);
856 __ z_srlg(addr_card, addr_oop, CardTable::card_shift);
857 addr_oop = noreg; // dead now
858 __ load_const_optimized(cardtable, rs); // cardtable := <card table base>
859 __ z_agr(addr_card, cardtable); // addr_card := addr_oop>>card_shift + cardtable
860
861 __ z_cli(0, addr_card, (int)G1CardTable::g1_young_card_val());
862 __ z_bre(young_card);
863
864 __ z_sync(); // Required to support concurrent cleaning.
865
866 __ z_cli(0, addr_card, (int)CardTable::dirty_card_val());
867 __ z_brne(not_already_dirty);
868
869 __ bind(young_card);
870 // We didn't take the branch, so we're already dirty: restore
871 // used registers and return.
872 __ z_lg(r1, 0*BytesPerWord + FrameMap::first_available_sp_in_frame, Z_SP);
873 __ z_br(Z_R14);
874
875 // Not dirty.
876 __ bind(not_already_dirty);
877
878 // First, dirty it: [addr_card] := 0
879 __ z_mvi(0, addr_card, CardTable::dirty_card_val());
880
881 Register idx = cardtable; // Must be non-volatile, because it is used to save addr_card.
882 Register buf = r2;
883 cardtable = noreg; // now dead
884
885 // Save registers used below (see assertion in G1PreBarrierStub::emit_code()).
886 __ z_stg(r2, 1*BytesPerWord + FrameMap::first_available_sp_in_frame, Z_SP);
887
888 ByteSize dirty_card_q_index_byte_offset = G1ThreadLocalData::dirty_card_queue_index_offset();
889 ByteSize dirty_card_q_buf_byte_offset = G1ThreadLocalData::dirty_card_queue_buffer_offset();
890
891 __ bind(restart);
892
893 // Get the index into the update buffer. DirtyCardQueue::_index is
894 // a size_t so z_ltg is appropriate here.
895 __ z_ltg(idx, Address(Z_thread, dirty_card_q_index_byte_offset));
896
897 // index == 0?
898 __ z_brz(refill);
899
900 __ z_lg(buf, Address(Z_thread, dirty_card_q_buf_byte_offset));
901 __ add2reg(idx, -oopSize);
902
903 __ z_stg(addr_card, 0, idx, buf); // [_buf + index] := <address_of_card>
904 __ z_stg(idx, Address(Z_thread, dirty_card_q_index_byte_offset));
905 // Restore killed registers and return.
906 __ z_lg(r1, 0*BytesPerWord + FrameMap::first_available_sp_in_frame, Z_SP);
907 __ z_lg(r2, 1*BytesPerWord + FrameMap::first_available_sp_in_frame, Z_SP);
908 __ z_br(Z_R14);
909
910 __ bind(refill);
911 save_volatile_registers(sasm);
912 __ z_lgr(idx, addr_card); // Save addr_card, tmp3 must be non-volatile.
913 __ call_VM_leaf(CAST_FROM_FN_PTR(address, DirtyCardQueueSet::handle_zero_index_for_thread),
914 Z_thread);
915 __ z_lgr(addr_card, idx);
916 restore_volatile_registers(sasm); // Restore addr_card.
917 __ z_bru(restart);
918 }
919 break;
920 #endif // INCLUDE_ALL_GCS
921 case predicate_failed_trap_id:
922 {
923 __ set_info("predicate_failed_trap", dont_gc_arguments);
924
925 OopMap* map = save_live_registers(sasm);
926
927 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, predicate_failed_trap));
928 oop_maps = new OopMapSet();
929 oop_maps->add_gc_map(call_offset, map);
930 restore_live_registers(sasm);
931
932 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
933 assert(deopt_blob != NULL, "deoptimization blob must have been created");
934
935 __ load_const_optimized(Z_R1_scratch, deopt_blob->unpack_with_reexecution());
936 __ z_br(Z_R1_scratch);
937 }
938 break;
939
940 default:
941 {
942 __ should_not_reach_here(FILE_AND_LINE, id);
943 }
944 break;
945 }
946 return oop_maps;
947 }
948
949 OopMapSet* Runtime1::generate_handle_exception(StubID id, StubAssembler *sasm) {
950 __ block_comment("generate_handle_exception");
951
952 // incoming parameters: Z_EXC_OOP, Z_EXC_PC
953
954 // Save registers if required.
955 OopMapSet* oop_maps = new OopMapSet();
956 OopMap* oop_map = NULL;
957 Register reg_fp = Z_R1_scratch;
958
959 switch (id) {
960 case forward_exception_id: {
961 // We're handling an exception in the context of a compiled frame.
962 // The registers have been saved in the standard places. Perform
963 // an exception lookup in the caller and dispatch to the handler
964 // if found. Otherwise unwind and dispatch to the callers
965 // exception handler.
966 oop_map = generate_oop_map(sasm);
967
968 // Load and clear pending exception oop into.
969 __ z_lg(Z_EXC_OOP, Address(Z_thread, Thread::pending_exception_offset()));
970 __ clear_mem(Address(Z_thread, Thread::pending_exception_offset()), 8);
971
972 // Different stubs forward their exceptions; they should all have similar frame layouts
973 // (a) to find their return address (b) for a correct oop_map generated above.
974 assert(RegisterSaver::live_reg_frame_size(RegisterSaver::all_registers) ==
975 RegisterSaver::live_reg_frame_size(RegisterSaver::all_registers_except_r2), "requirement");
976
977 // Load issuing PC (the return address for this stub).
978 const int frame_size_in_bytes = sasm->frame_size() * VMRegImpl::slots_per_word * VMRegImpl::stack_slot_size;
979 __ z_lg(Z_EXC_PC, Address(Z_SP, frame_size_in_bytes + _z_abi16(return_pc)));
980 DEBUG_ONLY(__ z_lay(reg_fp, Address(Z_SP, frame_size_in_bytes));)
981
982 // Make sure that the vm_results are cleared (may be unnecessary).
983 __ clear_mem(Address(Z_thread, JavaThread::vm_result_offset()), sizeof(oop));
984 __ clear_mem(Address(Z_thread, JavaThread::vm_result_2_offset()), sizeof(Metadata*));
985 break;
986 }
987 case handle_exception_nofpu_id:
988 case handle_exception_id:
989 // At this point all registers MAY be live.
990 DEBUG_ONLY(__ z_lgr(reg_fp, Z_SP);)
991 oop_map = save_live_registers(sasm, id != handle_exception_nofpu_id, Z_EXC_PC);
992 break;
993 case handle_exception_from_callee_id: {
994 // At this point all registers except Z_EXC_OOP and Z_EXC_PC are dead.
995 DEBUG_ONLY(__ z_lgr(reg_fp, Z_SP);)
996 __ save_return_pc(Z_EXC_PC);
997 const int frame_size_in_bytes = __ push_frame_abi160(0);
998 oop_map = new OopMap(frame_size_in_bytes / VMRegImpl::stack_slot_size, 0);
999 sasm->set_frame_size(frame_size_in_bytes / BytesPerWord);
1000 break;
1001 }
1002 default: ShouldNotReachHere();
1003 }
1004
1005 // Verify that only Z_EXC_OOP, and Z_EXC_PC are valid at this time.
1006 __ invalidate_registers(Z_EXC_OOP, Z_EXC_PC, reg_fp);
1007 // Verify that Z_EXC_OOP, contains a valid exception.
1008 __ verify_not_null_oop(Z_EXC_OOP);
1009
1010 // Check that fields in JavaThread for exception oop and issuing pc
1011 // are empty before writing to them.
1012 __ asm_assert_mem8_is_zero(in_bytes(JavaThread::exception_oop_offset()), Z_thread, "exception oop already set : " FILE_AND_LINE, 0);
1013 __ asm_assert_mem8_is_zero(in_bytes(JavaThread::exception_pc_offset()), Z_thread, "exception pc already set : " FILE_AND_LINE, 0);
1014
1015 // Save exception oop and issuing pc into JavaThread.
1016 // (Exception handler will load it from here.)
1017 __ z_stg(Z_EXC_OOP, Address(Z_thread, JavaThread::exception_oop_offset()));
1018 __ z_stg(Z_EXC_PC, Address(Z_thread, JavaThread::exception_pc_offset()));
1019
1020 #ifdef ASSERT
1021 { NearLabel ok;
1022 __ z_cg(Z_EXC_PC, Address(reg_fp, _z_abi16(return_pc)));
1023 __ branch_optimized(Assembler::bcondEqual, ok);
1024 __ stop("use throwing pc as return address (has bci & oop map)");
1025 __ bind(ok);
1026 }
1027 #endif
1028
1029 // Compute the exception handler.
1030 // The exception oop and the throwing pc are read from the fields in JavaThread.
1031 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc));
1032 oop_maps->add_gc_map(call_offset, oop_map);
1033
1034 // Z_RET(Z_R2): handler address
1035 // will be the deopt blob if nmethod was deoptimized while we looked up
1036 // handler regardless of whether handler existed in the nmethod.
1037
1038 // Only Z_R2, is valid at this time, all other registers have been destroyed by the runtime call.
1039 __ invalidate_registers(Z_R2);
1040
1041 switch(id) {
1042 case forward_exception_id:
1043 case handle_exception_nofpu_id:
1044 case handle_exception_id:
1045 // Restore the registers that were saved at the beginning.
1046 __ z_lgr(Z_R1_scratch, Z_R2); // Restoring live registers kills Z_R2.
1047 restore_live_registers(sasm, id != handle_exception_nofpu_id); // Pops as well the frame.
1048 __ z_br(Z_R1_scratch);
1049 break;
1050 case handle_exception_from_callee_id: {
1051 __ pop_frame();
1052 __ z_br(Z_R2); // Jump to exception handler.
1053 }
1054 break;
1055 default: ShouldNotReachHere();
1056 }
1057
1058 return oop_maps;
1059 }
1060
1061
1062 #undef __
1063
1064 const char *Runtime1::pd_name_for_address(address entry) {
1065 return "<unknown function>";
1066 }