1 /* 2 * Copyright (c) 2000, 2016, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "precompiled.hpp" 26 #include "c1/c1_Compilation.hpp" 27 #include "c1/c1_Instruction.hpp" 28 #include "c1/c1_InstructionPrinter.hpp" 29 #include "c1/c1_LIRAssembler.hpp" 30 #include "c1/c1_MacroAssembler.hpp" 31 #include "c1/c1_ValueStack.hpp" 32 #include "ci/ciInstance.hpp" 33 #include "gc/shared/collectedHeap.hpp" 34 #include "runtime/os.hpp" 35 36 void LIR_Assembler::patching_epilog(PatchingStub* patch, LIR_PatchCode patch_code, Register obj, CodeEmitInfo* info) { 37 // We must have enough patching space so that call can be inserted. 38 // We cannot use fat nops here, since the concurrent code rewrite may transiently 39 // create the illegal instruction sequence. 40 while ((intx) _masm->pc() - (intx) patch->pc_start() < NativeGeneralJump::instruction_size) { 41 _masm->nop(); 42 } 43 patch->install(_masm, patch_code, obj, info); 44 append_code_stub(patch); 45 46 #ifdef ASSERT 47 Bytecodes::Code code = info->scope()->method()->java_code_at_bci(info->stack()->bci()); 48 if (patch->id() == PatchingStub::access_field_id) { 49 switch (code) { 50 case Bytecodes::_putstatic: 51 case Bytecodes::_getstatic: 52 case Bytecodes::_putfield: 53 case Bytecodes::_getfield: 54 break; 55 default: 56 ShouldNotReachHere(); 57 } 58 } else if (patch->id() == PatchingStub::load_klass_id) { 59 switch (code) { 60 case Bytecodes::_new: 61 case Bytecodes::_anewarray: 62 case Bytecodes::_multianewarray: 63 case Bytecodes::_instanceof: 64 case Bytecodes::_checkcast: 65 break; 66 default: 67 ShouldNotReachHere(); 68 } 69 } else if (patch->id() == PatchingStub::load_mirror_id) { 70 switch (code) { 71 case Bytecodes::_putstatic: 72 case Bytecodes::_getstatic: 73 case Bytecodes::_ldc: 74 case Bytecodes::_ldc_w: 75 break; 76 default: 77 ShouldNotReachHere(); 78 } 79 } else if (patch->id() == PatchingStub::load_appendix_id) { 80 Bytecodes::Code bc_raw = info->scope()->method()->raw_code_at_bci(info->stack()->bci()); 81 assert(Bytecodes::has_optional_appendix(bc_raw), "unexpected appendix resolution"); 82 } else { 83 ShouldNotReachHere(); 84 } 85 #endif 86 } 87 88 PatchingStub::PatchID LIR_Assembler::patching_id(CodeEmitInfo* info) { 89 IRScope* scope = info->scope(); 90 Bytecodes::Code bc_raw = scope->method()->raw_code_at_bci(info->stack()->bci()); 91 if (Bytecodes::has_optional_appendix(bc_raw)) { 92 return PatchingStub::load_appendix_id; 93 } 94 return PatchingStub::load_mirror_id; 95 } 96 97 //--------------------------------------------------------------- 98 99 100 LIR_Assembler::LIR_Assembler(Compilation* c): 101 _compilation(c) 102 , _masm(c->masm()) 103 , _bs(Universe::heap()->barrier_set()) 104 , _frame_map(c->frame_map()) 105 , _current_block(NULL) 106 , _pending_non_safepoint(NULL) 107 , _pending_non_safepoint_offset(0) 108 { 109 _slow_case_stubs = new CodeStubList(); 110 } 111 112 113 LIR_Assembler::~LIR_Assembler() { 114 } 115 116 117 void LIR_Assembler::check_codespace() { 118 CodeSection* cs = _masm->code_section(); 119 if (cs->remaining() < (int)(NOT_LP64(1*K)LP64_ONLY(2*K))) { 120 BAILOUT("CodeBuffer overflow"); 121 } 122 } 123 124 125 void LIR_Assembler::append_code_stub(CodeStub* stub) { 126 _slow_case_stubs->append(stub); 127 } 128 129 void LIR_Assembler::emit_stubs(CodeStubList* stub_list) { 130 for (int m = 0; m < stub_list->length(); m++) { 131 CodeStub* s = stub_list->at(m); 132 133 check_codespace(); 134 CHECK_BAILOUT(); 135 136 #ifndef PRODUCT 137 if (CommentedAssembly) { 138 stringStream st; 139 s->print_name(&st); 140 st.print(" slow case"); 141 _masm->block_comment(st.as_string()); 142 } 143 #endif 144 s->emit_code(this); 145 #ifdef ASSERT 146 s->assert_no_unbound_labels(); 147 #endif 148 } 149 } 150 151 152 void LIR_Assembler::emit_slow_case_stubs() { 153 emit_stubs(_slow_case_stubs); 154 } 155 156 157 bool LIR_Assembler::needs_icache(ciMethod* method) const { 158 return !method->is_static(); 159 } 160 161 162 int LIR_Assembler::code_offset() const { 163 return _masm->offset(); 164 } 165 166 167 address LIR_Assembler::pc() const { 168 return _masm->pc(); 169 } 170 171 // To bang the stack of this compiled method we use the stack size 172 // that the interpreter would need in case of a deoptimization. This 173 // removes the need to bang the stack in the deoptimization blob which 174 // in turn simplifies stack overflow handling. 175 int LIR_Assembler::bang_size_in_bytes() const { 176 return MAX2(initial_frame_size_in_bytes() + os::extra_bang_size_in_bytes(), _compilation->interpreter_frame_size()); 177 } 178 179 void LIR_Assembler::emit_exception_entries(ExceptionInfoList* info_list) { 180 for (int i = 0; i < info_list->length(); i++) { 181 XHandlers* handlers = info_list->at(i)->exception_handlers(); 182 183 for (int j = 0; j < handlers->length(); j++) { 184 XHandler* handler = handlers->handler_at(j); 185 assert(handler->lir_op_id() != -1, "handler not processed by LinearScan"); 186 assert(handler->entry_code() == NULL || 187 handler->entry_code()->instructions_list()->last()->code() == lir_branch || 188 handler->entry_code()->instructions_list()->last()->code() == lir_delay_slot, "last operation must be branch"); 189 190 if (handler->entry_pco() == -1) { 191 // entry code not emitted yet 192 if (handler->entry_code() != NULL && handler->entry_code()->instructions_list()->length() > 1) { 193 handler->set_entry_pco(code_offset()); 194 if (CommentedAssembly) { 195 _masm->block_comment("Exception adapter block"); 196 } 197 emit_lir_list(handler->entry_code()); 198 } else { 199 handler->set_entry_pco(handler->entry_block()->exception_handler_pco()); 200 } 201 202 assert(handler->entry_pco() != -1, "must be set now"); 203 } 204 } 205 } 206 } 207 208 209 void LIR_Assembler::emit_code(BlockList* hir) { 210 if (PrintLIR) { 211 print_LIR(hir); 212 } 213 214 int n = hir->length(); 215 for (int i = 0; i < n; i++) { 216 emit_block(hir->at(i)); 217 CHECK_BAILOUT(); 218 } 219 220 flush_debug_info(code_offset()); 221 222 DEBUG_ONLY(check_no_unbound_labels()); 223 } 224 225 226 void LIR_Assembler::emit_block(BlockBegin* block) { 227 if (block->is_set(BlockBegin::backward_branch_target_flag)) { 228 align_backward_branch_target(); 229 } 230 231 // if this block is the start of an exception handler, record the 232 // PC offset of the first instruction for later construction of 233 // the ExceptionHandlerTable 234 if (block->is_set(BlockBegin::exception_entry_flag)) { 235 block->set_exception_handler_pco(code_offset()); 236 } 237 238 #ifndef PRODUCT 239 if (PrintLIRWithAssembly) { 240 // don't print Phi's 241 InstructionPrinter ip(false); 242 block->print(ip); 243 } 244 #endif /* PRODUCT */ 245 246 assert(block->lir() != NULL, "must have LIR"); 247 X86_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed")); 248 249 #ifndef PRODUCT 250 if (CommentedAssembly) { 251 stringStream st; 252 st.print_cr(" block B%d [%d, %d]", block->block_id(), block->bci(), block->end()->printable_bci()); 253 _masm->block_comment(st.as_string()); 254 } 255 #endif 256 257 emit_lir_list(block->lir()); 258 259 X86_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed")); 260 } 261 262 263 void LIR_Assembler::emit_lir_list(LIR_List* list) { 264 peephole(list); 265 266 int n = list->length(); 267 for (int i = 0; i < n; i++) { 268 LIR_Op* op = list->at(i); 269 270 check_codespace(); 271 CHECK_BAILOUT(); 272 273 #ifndef PRODUCT 274 if (CommentedAssembly) { 275 // Don't record out every op since that's too verbose. Print 276 // branches since they include block and stub names. Also print 277 // patching moves since they generate funny looking code. 278 if (op->code() == lir_branch || 279 (op->code() == lir_move && op->as_Op1()->patch_code() != lir_patch_none)) { 280 stringStream st; 281 op->print_on(&st); 282 _masm->block_comment(st.as_string()); 283 } 284 } 285 if (PrintLIRWithAssembly) { 286 // print out the LIR operation followed by the resulting assembly 287 list->at(i)->print(); tty->cr(); 288 } 289 #endif /* PRODUCT */ 290 291 op->emit_code(this); 292 293 if (compilation()->debug_info_recorder()->recording_non_safepoints()) { 294 process_debug_info(op); 295 } 296 297 #ifndef PRODUCT 298 if (PrintLIRWithAssembly) { 299 _masm->code()->decode(); 300 } 301 #endif /* PRODUCT */ 302 } 303 } 304 305 #ifdef ASSERT 306 void LIR_Assembler::check_no_unbound_labels() { 307 CHECK_BAILOUT(); 308 309 for (int i = 0; i < _branch_target_blocks.length() - 1; i++) { 310 if (!_branch_target_blocks.at(i)->label()->is_bound()) { 311 tty->print_cr("label of block B%d is not bound", _branch_target_blocks.at(i)->block_id()); 312 assert(false, "unbound label"); 313 } 314 } 315 } 316 #endif 317 318 //----------------------------------debug info-------------------------------- 319 320 321 void LIR_Assembler::add_debug_info_for_branch(CodeEmitInfo* info) { 322 int pc_offset = code_offset(); 323 flush_debug_info(pc_offset); 324 info->record_debug_info(compilation()->debug_info_recorder(), pc_offset); 325 if (info->exception_handlers() != NULL) { 326 compilation()->add_exception_handlers_for_pco(pc_offset, info->exception_handlers()); 327 } 328 } 329 330 331 void LIR_Assembler::add_call_info(int pc_offset, CodeEmitInfo* cinfo) { 332 flush_debug_info(pc_offset); 333 cinfo->record_debug_info(compilation()->debug_info_recorder(), pc_offset); 334 if (cinfo->exception_handlers() != NULL) { 335 compilation()->add_exception_handlers_for_pco(pc_offset, cinfo->exception_handlers()); 336 } 337 } 338 339 static ValueStack* debug_info(Instruction* ins) { 340 StateSplit* ss = ins->as_StateSplit(); 341 if (ss != NULL) return ss->state(); 342 return ins->state_before(); 343 } 344 345 void LIR_Assembler::process_debug_info(LIR_Op* op) { 346 Instruction* src = op->source(); 347 if (src == NULL) return; 348 int pc_offset = code_offset(); 349 if (_pending_non_safepoint == src) { 350 _pending_non_safepoint_offset = pc_offset; 351 return; 352 } 353 ValueStack* vstack = debug_info(src); 354 if (vstack == NULL) return; 355 if (_pending_non_safepoint != NULL) { 356 // Got some old debug info. Get rid of it. 357 if (debug_info(_pending_non_safepoint) == vstack) { 358 _pending_non_safepoint_offset = pc_offset; 359 return; 360 } 361 if (_pending_non_safepoint_offset < pc_offset) { 362 record_non_safepoint_debug_info(); 363 } 364 _pending_non_safepoint = NULL; 365 } 366 // Remember the debug info. 367 if (pc_offset > compilation()->debug_info_recorder()->last_pc_offset()) { 368 _pending_non_safepoint = src; 369 _pending_non_safepoint_offset = pc_offset; 370 } 371 } 372 373 // Index caller states in s, where 0 is the oldest, 1 its callee, etc. 374 // Return NULL if n is too large. 375 // Returns the caller_bci for the next-younger state, also. 376 static ValueStack* nth_oldest(ValueStack* s, int n, int& bci_result) { 377 ValueStack* t = s; 378 for (int i = 0; i < n; i++) { 379 if (t == NULL) break; 380 t = t->caller_state(); 381 } 382 if (t == NULL) return NULL; 383 for (;;) { 384 ValueStack* tc = t->caller_state(); 385 if (tc == NULL) return s; 386 t = tc; 387 bci_result = tc->bci(); 388 s = s->caller_state(); 389 } 390 } 391 392 void LIR_Assembler::record_non_safepoint_debug_info() { 393 int pc_offset = _pending_non_safepoint_offset; 394 ValueStack* vstack = debug_info(_pending_non_safepoint); 395 int bci = vstack->bci(); 396 397 DebugInformationRecorder* debug_info = compilation()->debug_info_recorder(); 398 assert(debug_info->recording_non_safepoints(), "sanity"); 399 400 debug_info->add_non_safepoint(pc_offset); 401 402 // Visit scopes from oldest to youngest. 403 for (int n = 0; ; n++) { 404 int s_bci = bci; 405 ValueStack* s = nth_oldest(vstack, n, s_bci); 406 if (s == NULL) break; 407 IRScope* scope = s->scope(); 408 //Always pass false for reexecute since these ScopeDescs are never used for deopt 409 methodHandle null_mh; 410 debug_info->describe_scope(pc_offset, null_mh, scope->method(), s->bci(), false/*reexecute*/); 411 } 412 413 debug_info->end_non_safepoint(pc_offset); 414 } 415 416 417 ImplicitNullCheckStub* LIR_Assembler::add_debug_info_for_null_check_here(CodeEmitInfo* cinfo) { 418 return add_debug_info_for_null_check(code_offset(), cinfo); 419 } 420 421 ImplicitNullCheckStub* LIR_Assembler::add_debug_info_for_null_check(int pc_offset, CodeEmitInfo* cinfo) { 422 ImplicitNullCheckStub* stub = new ImplicitNullCheckStub(pc_offset, cinfo); 423 append_code_stub(stub); 424 return stub; 425 } 426 427 void LIR_Assembler::add_debug_info_for_div0_here(CodeEmitInfo* info) { 428 add_debug_info_for_div0(code_offset(), info); 429 } 430 431 void LIR_Assembler::add_debug_info_for_div0(int pc_offset, CodeEmitInfo* cinfo) { 432 DivByZeroStub* stub = new DivByZeroStub(pc_offset, cinfo); 433 append_code_stub(stub); 434 } 435 436 void LIR_Assembler::emit_rtcall(LIR_OpRTCall* op) { 437 rt_call(op->result_opr(), op->addr(), op->arguments(), op->tmp(), op->info()); 438 } 439 440 441 void LIR_Assembler::emit_call(LIR_OpJavaCall* op) { 442 verify_oop_map(op->info()); 443 444 if (os::is_MP()) { 445 // must align calls sites, otherwise they can't be updated atomically on MP hardware 446 align_call(op->code()); 447 } 448 449 // emit the static call stub stuff out of line 450 emit_static_call_stub(); 451 CHECK_BAILOUT(); 452 453 switch (op->code()) { 454 case lir_static_call: 455 case lir_dynamic_call: 456 call(op, relocInfo::static_call_type); 457 break; 458 case lir_optvirtual_call: 459 call(op, relocInfo::opt_virtual_call_type); 460 break; 461 case lir_icvirtual_call: 462 ic_call(op); 463 break; 464 case lir_virtual_call: 465 vtable_call(op); 466 break; 467 default: 468 fatal("unexpected op code: %s", op->name()); 469 break; 470 } 471 472 // JSR 292 473 // Record if this method has MethodHandle invokes. 474 if (op->is_method_handle_invoke()) { 475 compilation()->set_has_method_handle_invokes(true); 476 } 477 478 #if defined(X86) && defined(TIERED) 479 // C2 leave fpu stack dirty clean it 480 if (UseSSE < 2) { 481 int i; 482 for ( i = 1; i <= 7 ; i++ ) { 483 ffree(i); 484 } 485 if (!op->result_opr()->is_float_kind()) { 486 ffree(0); 487 } 488 } 489 #endif // X86 && TIERED 490 } 491 492 493 void LIR_Assembler::emit_opLabel(LIR_OpLabel* op) { 494 _masm->bind (*(op->label())); 495 } 496 497 498 void LIR_Assembler::emit_op1(LIR_Op1* op) { 499 switch (op->code()) { 500 case lir_move: 501 if (op->move_kind() == lir_move_volatile) { 502 assert(op->patch_code() == lir_patch_none, "can't patch volatiles"); 503 volatile_move_op(op->in_opr(), op->result_opr(), op->type(), op->info()); 504 } else { 505 move_op(op->in_opr(), op->result_opr(), op->type(), 506 op->patch_code(), op->info(), op->pop_fpu_stack(), 507 op->move_kind() == lir_move_unaligned, 508 op->move_kind() == lir_move_wide); 509 } 510 break; 511 512 case lir_roundfp: { 513 LIR_OpRoundFP* round_op = op->as_OpRoundFP(); 514 roundfp_op(round_op->in_opr(), round_op->tmp(), round_op->result_opr(), round_op->pop_fpu_stack()); 515 break; 516 } 517 518 case lir_return: 519 return_op(op->in_opr()); 520 break; 521 522 case lir_safepoint: 523 if (compilation()->debug_info_recorder()->last_pc_offset() == code_offset()) { 524 _masm->nop(); 525 } 526 safepoint_poll(op->in_opr(), op->info()); 527 break; 528 529 case lir_fxch: 530 fxch(op->in_opr()->as_jint()); 531 break; 532 533 case lir_fld: 534 fld(op->in_opr()->as_jint()); 535 break; 536 537 case lir_ffree: 538 ffree(op->in_opr()->as_jint()); 539 break; 540 541 case lir_branch: 542 break; 543 544 case lir_push: 545 push(op->in_opr()); 546 break; 547 548 case lir_pop: 549 pop(op->in_opr()); 550 break; 551 552 case lir_neg: 553 negate(op->in_opr(), op->result_opr()); 554 break; 555 556 case lir_leal: 557 leal(op->in_opr(), op->result_opr()); 558 break; 559 560 case lir_null_check: { 561 ImplicitNullCheckStub* stub = add_debug_info_for_null_check_here(op->info()); 562 563 if (op->in_opr()->is_single_cpu()) { 564 _masm->null_check(op->in_opr()->as_register(), stub->entry()); 565 } else { 566 Unimplemented(); 567 } 568 break; 569 } 570 571 case lir_monaddr: 572 monitor_address(op->in_opr()->as_constant_ptr()->as_jint(), op->result_opr()); 573 break; 574 575 #ifdef SPARC 576 case lir_pack64: 577 pack64(op->in_opr(), op->result_opr()); 578 break; 579 580 case lir_unpack64: 581 unpack64(op->in_opr(), op->result_opr()); 582 break; 583 #endif 584 585 case lir_unwind: 586 unwind_op(op->in_opr()); 587 break; 588 589 default: 590 Unimplemented(); 591 break; 592 } 593 } 594 595 596 void LIR_Assembler::emit_op0(LIR_Op0* op) { 597 switch (op->code()) { 598 case lir_word_align: { 599 _masm->align(BytesPerWord); 600 break; 601 } 602 603 case lir_nop: 604 assert(op->info() == NULL, "not supported"); 605 _masm->nop(); 606 break; 607 608 case lir_label: 609 Unimplemented(); 610 break; 611 612 case lir_build_frame: 613 build_frame(); 614 break; 615 616 case lir_std_entry: 617 // init offsets 618 offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset()); 619 _masm->align(CodeEntryAlignment); 620 if (needs_icache(compilation()->method())) { 621 check_icache(); 622 } 623 offsets()->set_value(CodeOffsets::Verified_Entry, _masm->offset()); 624 _masm->verified_entry(); 625 build_frame(); 626 offsets()->set_value(CodeOffsets::Frame_Complete, _masm->offset()); 627 break; 628 629 case lir_osr_entry: 630 offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset()); 631 osr_entry(); 632 break; 633 634 case lir_24bit_FPU: 635 set_24bit_FPU(); 636 break; 637 638 case lir_reset_FPU: 639 reset_FPU(); 640 break; 641 642 case lir_breakpoint: 643 breakpoint(); 644 break; 645 646 case lir_fpop_raw: 647 fpop(); 648 break; 649 650 case lir_membar: 651 membar(); 652 break; 653 654 case lir_membar_acquire: 655 membar_acquire(); 656 break; 657 658 case lir_membar_release: 659 membar_release(); 660 break; 661 662 case lir_membar_loadload: 663 membar_loadload(); 664 break; 665 666 case lir_membar_storestore: 667 membar_storestore(); 668 break; 669 670 case lir_membar_loadstore: 671 membar_loadstore(); 672 break; 673 674 case lir_membar_storeload: 675 membar_storeload(); 676 break; 677 678 case lir_get_thread: 679 get_thread(op->result_opr()); 680 break; 681 682 case lir_on_spin_wait: 683 on_spin_wait(); 684 break; 685 686 default: 687 ShouldNotReachHere(); 688 break; 689 } 690 } 691 692 693 void LIR_Assembler::emit_op2(LIR_Op2* op) { 694 switch (op->code()) { 695 case lir_cmp: 696 if (op->info() != NULL) { 697 assert(op->in_opr1()->is_address() || op->in_opr2()->is_address(), 698 "shouldn't be codeemitinfo for non-address operands"); 699 add_debug_info_for_null_check_here(op->info()); // exception possible 700 } 701 comp_op(op->condition(), op->in_opr1(), op->in_opr2(), op); 702 break; 703 704 case lir_cmp_l2i: 705 case lir_cmp_fd2i: 706 case lir_ucmp_fd2i: 707 comp_fl2i(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op); 708 break; 709 710 case lir_cmove: 711 cmove(op->condition(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->type()); 712 break; 713 714 case lir_shl: 715 case lir_shr: 716 case lir_ushr: 717 if (op->in_opr2()->is_constant()) { 718 shift_op(op->code(), op->in_opr1(), op->in_opr2()->as_constant_ptr()->as_jint(), op->result_opr()); 719 } else { 720 shift_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp1_opr()); 721 } 722 break; 723 724 case lir_add: 725 case lir_sub: 726 case lir_mul: 727 case lir_mul_strictfp: 728 case lir_div: 729 case lir_div_strictfp: 730 case lir_rem: 731 assert(op->fpu_pop_count() < 2, ""); 732 arith_op( 733 op->code(), 734 op->in_opr1(), 735 op->in_opr2(), 736 op->result_opr(), 737 op->info(), 738 op->fpu_pop_count() == 1); 739 break; 740 741 case lir_abs: 742 case lir_sqrt: 743 case lir_tan: 744 case lir_log10: 745 intrinsic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op); 746 break; 747 748 case lir_logic_and: 749 case lir_logic_or: 750 case lir_logic_xor: 751 logic_op( 752 op->code(), 753 op->in_opr1(), 754 op->in_opr2(), 755 op->result_opr()); 756 break; 757 758 case lir_throw: 759 throw_op(op->in_opr1(), op->in_opr2(), op->info()); 760 break; 761 762 case lir_xadd: 763 case lir_xchg: 764 atomic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp1_opr()); 765 break; 766 767 default: 768 Unimplemented(); 769 break; 770 } 771 } 772 773 774 void LIR_Assembler::build_frame() { 775 _masm->build_frame(initial_frame_size_in_bytes(), bang_size_in_bytes()); 776 } 777 778 779 void LIR_Assembler::roundfp_op(LIR_Opr src, LIR_Opr tmp, LIR_Opr dest, bool pop_fpu_stack) { 780 assert((src->is_single_fpu() && dest->is_single_stack()) || 781 (src->is_double_fpu() && dest->is_double_stack()), 782 "round_fp: rounds register -> stack location"); 783 784 reg2stack (src, dest, src->type(), pop_fpu_stack); 785 } 786 787 788 void LIR_Assembler::move_op(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool unaligned, bool wide) { 789 if (src->is_register()) { 790 if (dest->is_register()) { 791 assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here"); 792 reg2reg(src, dest); 793 } else if (dest->is_stack()) { 794 assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here"); 795 reg2stack(src, dest, type, pop_fpu_stack); 796 } else if (dest->is_address()) { 797 reg2mem(src, dest, type, patch_code, info, pop_fpu_stack, wide, unaligned); 798 } else { 799 ShouldNotReachHere(); 800 } 801 802 } else if (src->is_stack()) { 803 assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here"); 804 if (dest->is_register()) { 805 stack2reg(src, dest, type); 806 } else if (dest->is_stack()) { 807 stack2stack(src, dest, type); 808 } else { 809 ShouldNotReachHere(); 810 } 811 812 } else if (src->is_constant()) { 813 if (dest->is_register()) { 814 const2reg(src, dest, patch_code, info); // patching is possible 815 } else if (dest->is_stack()) { 816 assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here"); 817 const2stack(src, dest); 818 } else if (dest->is_address()) { 819 assert(patch_code == lir_patch_none, "no patching allowed here"); 820 const2mem(src, dest, type, info, wide); 821 } else { 822 ShouldNotReachHere(); 823 } 824 825 } else if (src->is_address()) { 826 mem2reg(src, dest, type, patch_code, info, wide, unaligned); 827 828 } else { 829 ShouldNotReachHere(); 830 } 831 } 832 833 834 void LIR_Assembler::verify_oop_map(CodeEmitInfo* info) { 835 #ifndef PRODUCT 836 if (VerifyOops) { 837 OopMapStream s(info->oop_map()); 838 while (!s.is_done()) { 839 OopMapValue v = s.current(); 840 if (v.is_oop()) { 841 VMReg r = v.reg(); 842 if (!r->is_stack()) { 843 stringStream st; 844 st.print("bad oop %s at %d", r->as_Register()->name(), _masm->offset()); 845 #ifdef SPARC 846 _masm->_verify_oop(r->as_Register(), os::strdup(st.as_string(), mtCompiler), __FILE__, __LINE__); 847 #else 848 _masm->verify_oop(r->as_Register()); 849 #endif 850 } else { 851 _masm->verify_stack_oop(r->reg2stack() * VMRegImpl::stack_slot_size); 852 } 853 } 854 check_codespace(); 855 CHECK_BAILOUT(); 856 857 s.next(); 858 } 859 } 860 #endif 861 }