1 /* 2 * Copyright (c) 1998, 2018, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "precompiled.hpp" 26 #include "asm/macroAssembler.inline.hpp" 27 #include "memory/allocation.inline.hpp" 28 #include "opto/ad.hpp" 29 #include "opto/block.hpp" 30 #include "opto/c2compiler.hpp" 31 #include "opto/callnode.hpp" 32 #include "opto/cfgnode.hpp" 33 #include "opto/machnode.hpp" 34 #include "opto/runtime.hpp" 35 #include "opto/chaitin.hpp" 36 #include "runtime/sharedRuntime.hpp" 37 38 // Optimization - Graph Style 39 40 // Check whether val is not-null-decoded compressed oop, 41 // i.e. will grab into the base of the heap if it represents NULL. 42 static bool accesses_heap_base_zone(Node *val) { 43 if (Universe::narrow_oop_base() != NULL) { // Implies UseCompressedOops. 44 if (val && val->is_Mach()) { 45 if (val->as_Mach()->ideal_Opcode() == Op_DecodeN) { 46 // This assumes all Decodes with TypePtr::NotNull are matched to nodes that 47 // decode NULL to point to the heap base (Decode_NN). 48 if (val->bottom_type()->is_oopptr()->ptr() == TypePtr::NotNull) { 49 return true; 50 } 51 } 52 // Must recognize load operation with Decode matched in memory operand. 53 // We should not reach here exept for PPC/AIX, as os::zero_page_read_protected() 54 // returns true everywhere else. On PPC, no such memory operands 55 // exist, therefore we did not yet implement a check for such operands. 56 NOT_AIX(Unimplemented()); 57 } 58 } 59 return false; 60 } 61 62 static bool needs_explicit_null_check_for_read(Node *val) { 63 // On some OSes (AIX) the page at address 0 is only write protected. 64 // If so, only Store operations will trap. 65 if (os::zero_page_read_protected()) { 66 return false; // Implicit null check will work. 67 } 68 // Also a read accessing the base of a heap-based compressed heap will trap. 69 if (accesses_heap_base_zone(val) && // Hits the base zone page. 70 Universe::narrow_oop_use_implicit_null_checks()) { // Base zone page is protected. 71 return false; 72 } 73 74 return true; 75 } 76 77 //------------------------------implicit_null_check---------------------------- 78 // Detect implicit-null-check opportunities. Basically, find NULL checks 79 // with suitable memory ops nearby. Use the memory op to do the NULL check. 80 // I can generate a memory op if there is not one nearby. 81 // The proj is the control projection for the not-null case. 82 // The val is the pointer being checked for nullness or 83 // decodeHeapOop_not_null node if it did not fold into address. 84 void PhaseCFG::implicit_null_check(Block* block, Node *proj, Node *val, int allowed_reasons) { 85 // Assume if null check need for 0 offset then always needed 86 // Intel solaris doesn't support any null checks yet and no 87 // mechanism exists (yet) to set the switches at an os_cpu level 88 if( !ImplicitNullChecks || MacroAssembler::needs_explicit_null_check(0)) return; 89 90 // Make sure the ptr-is-null path appears to be uncommon! 91 float f = block->end()->as_MachIf()->_prob; 92 if( proj->Opcode() == Op_IfTrue ) f = 1.0f - f; 93 if( f > PROB_UNLIKELY_MAG(4) ) return; 94 95 uint bidx = 0; // Capture index of value into memop 96 bool was_store; // Memory op is a store op 97 98 // Get the successor block for if the test ptr is non-null 99 Block* not_null_block; // this one goes with the proj 100 Block* null_block; 101 if (block->get_node(block->number_of_nodes()-1) == proj) { 102 null_block = block->_succs[0]; 103 not_null_block = block->_succs[1]; 104 } else { 105 assert(block->get_node(block->number_of_nodes()-2) == proj, "proj is one or the other"); 106 not_null_block = block->_succs[0]; 107 null_block = block->_succs[1]; 108 } 109 while (null_block->is_Empty() == Block::empty_with_goto) { 110 null_block = null_block->_succs[0]; 111 } 112 113 // Search the exception block for an uncommon trap. 114 // (See Parse::do_if and Parse::do_ifnull for the reason 115 // we need an uncommon trap. Briefly, we need a way to 116 // detect failure of this optimization, as in 6366351.) 117 { 118 bool found_trap = false; 119 for (uint i1 = 0; i1 < null_block->number_of_nodes(); i1++) { 120 Node* nn = null_block->get_node(i1); 121 if (nn->is_MachCall() && 122 nn->as_MachCall()->entry_point() == SharedRuntime::uncommon_trap_blob()->entry_point()) { 123 const Type* trtype = nn->in(TypeFunc::Parms)->bottom_type(); 124 if (trtype->isa_int() && trtype->is_int()->is_con()) { 125 jint tr_con = trtype->is_int()->get_con(); 126 Deoptimization::DeoptReason reason = Deoptimization::trap_request_reason(tr_con); 127 Deoptimization::DeoptAction action = Deoptimization::trap_request_action(tr_con); 128 assert((int)reason < (int)BitsPerInt, "recode bit map"); 129 if (is_set_nth_bit(allowed_reasons, (int) reason) 130 && action != Deoptimization::Action_none) { 131 // This uncommon trap is sure to recompile, eventually. 132 // When that happens, C->too_many_traps will prevent 133 // this transformation from happening again. 134 found_trap = true; 135 } 136 } 137 break; 138 } 139 } 140 if (!found_trap) { 141 // We did not find an uncommon trap. 142 return; 143 } 144 } 145 146 // Check for decodeHeapOop_not_null node which did not fold into address 147 bool is_decoden = ((intptr_t)val) & 1; 148 val = (Node*)(((intptr_t)val) & ~1); 149 150 assert(!is_decoden || (val->in(0) == NULL) && val->is_Mach() && 151 (val->as_Mach()->ideal_Opcode() == Op_DecodeN), "sanity"); 152 153 // Search the successor block for a load or store who's base value is also 154 // the tested value. There may be several. 155 Node_List *out = new Node_List(Thread::current()->resource_area()); 156 MachNode *best = NULL; // Best found so far 157 for (DUIterator i = val->outs(); val->has_out(i); i++) { 158 Node *m = val->out(i); 159 if( !m->is_Mach() ) continue; 160 MachNode *mach = m->as_Mach(); 161 was_store = false; 162 int iop = mach->ideal_Opcode(); 163 switch( iop ) { 164 case Op_LoadB: 165 case Op_LoadUB: 166 case Op_LoadUS: 167 case Op_LoadD: 168 case Op_LoadF: 169 case Op_LoadI: 170 case Op_LoadL: 171 case Op_LoadP: 172 case Op_LoadN: 173 case Op_LoadS: 174 case Op_LoadKlass: 175 case Op_LoadNKlass: 176 case Op_LoadRange: 177 case Op_LoadD_unaligned: 178 case Op_LoadL_unaligned: 179 assert(mach->in(2) == val, "should be address"); 180 break; 181 case Op_StoreB: 182 case Op_StoreC: 183 case Op_StoreCM: 184 case Op_StoreD: 185 case Op_StoreF: 186 case Op_StoreI: 187 case Op_StoreL: 188 case Op_StoreP: 189 case Op_StoreN: 190 case Op_StoreNKlass: 191 was_store = true; // Memory op is a store op 192 // Stores will have their address in slot 2 (memory in slot 1). 193 // If the value being nul-checked is in another slot, it means we 194 // are storing the checked value, which does NOT check the value! 195 if( mach->in(2) != val ) continue; 196 break; // Found a memory op? 197 case Op_StrComp: 198 case Op_StrEquals: 199 case Op_StrIndexOf: 200 case Op_StrIndexOfChar: 201 case Op_AryEq: 202 case Op_StrInflatedCopy: 203 case Op_StrCompressedCopy: 204 case Op_EncodeISOArray: 205 case Op_HasNegatives: 206 // Not a legit memory op for implicit null check regardless of 207 // embedded loads 208 continue; 209 default: // Also check for embedded loads 210 if( !mach->needs_anti_dependence_check() ) 211 continue; // Not an memory op; skip it 212 if( must_clone[iop] ) { 213 // Do not move nodes which produce flags because 214 // RA will try to clone it to place near branch and 215 // it will cause recompilation, see clone_node(). 216 continue; 217 } 218 { 219 // Check that value is used in memory address in 220 // instructions with embedded load (CmpP val1,(val2+off)). 221 Node* base; 222 Node* index; 223 const MachOper* oper = mach->memory_inputs(base, index); 224 if (oper == NULL || oper == (MachOper*)-1) { 225 continue; // Not an memory op; skip it 226 } 227 if (val == base || 228 (val == index && val->bottom_type()->isa_narrowoop())) { 229 break; // Found it 230 } else { 231 continue; // Skip it 232 } 233 } 234 break; 235 } 236 237 // On some OSes (AIX) the page at address 0 is only write protected. 238 // If so, only Store operations will trap. 239 // But a read accessing the base of a heap-based compressed heap will trap. 240 if (!was_store && needs_explicit_null_check_for_read(val)) { 241 continue; 242 } 243 244 // Check that node's control edge is not-null block's head or dominates it, 245 // otherwise we can't hoist it because there are other control dependencies. 246 Node* ctrl = mach->in(0); 247 if (ctrl != NULL && !(ctrl == not_null_block->head() || 248 get_block_for_node(ctrl)->dominates(not_null_block))) { 249 continue; 250 } 251 252 // check if the offset is not too high for implicit exception 253 { 254 intptr_t offset = 0; 255 const TypePtr *adr_type = NULL; // Do not need this return value here 256 const Node* base = mach->get_base_and_disp(offset, adr_type); 257 if (base == NULL || base == NodeSentinel) { 258 // Narrow oop address doesn't have base, only index. 259 // Give up if offset is beyond page size or if heap base is not protected. 260 if (val->bottom_type()->isa_narrowoop() && 261 (MacroAssembler::needs_explicit_null_check(offset) || 262 !Universe::narrow_oop_use_implicit_null_checks())) 263 continue; 264 // cannot reason about it; is probably not implicit null exception 265 } else { 266 const TypePtr* tptr; 267 if (UseCompressedOops && (Universe::narrow_oop_shift() == 0 || 268 Universe::narrow_klass_shift() == 0)) { 269 // 32-bits narrow oop can be the base of address expressions 270 tptr = base->get_ptr_type(); 271 } else { 272 // only regular oops are expected here 273 tptr = base->bottom_type()->is_ptr(); 274 } 275 // Give up if offset is not a compile-time constant. 276 if (offset == Type::OffsetBot || tptr->_offset == Type::OffsetBot) 277 continue; 278 offset += tptr->_offset; // correct if base is offseted 279 // Give up if reference is beyond page size. 280 if (MacroAssembler::needs_explicit_null_check(offset)) 281 continue; 282 // Give up if base is a decode node and the heap base is not protected. 283 if (base->is_Mach() && base->as_Mach()->ideal_Opcode() == Op_DecodeN && 284 !Universe::narrow_oop_use_implicit_null_checks()) 285 continue; 286 } 287 } 288 289 // Check ctrl input to see if the null-check dominates the memory op 290 Block *cb = get_block_for_node(mach); 291 cb = cb->_idom; // Always hoist at least 1 block 292 if( !was_store ) { // Stores can be hoisted only one block 293 while( cb->_dom_depth > (block->_dom_depth + 1)) 294 cb = cb->_idom; // Hoist loads as far as we want 295 // The non-null-block should dominate the memory op, too. Live 296 // range spilling will insert a spill in the non-null-block if it is 297 // needs to spill the memory op for an implicit null check. 298 if (cb->_dom_depth == (block->_dom_depth + 1)) { 299 if (cb != not_null_block) continue; 300 cb = cb->_idom; 301 } 302 } 303 if( cb != block ) continue; 304 305 // Found a memory user; see if it can be hoisted to check-block 306 uint vidx = 0; // Capture index of value into memop 307 uint j; 308 for( j = mach->req()-1; j > 0; j-- ) { 309 if( mach->in(j) == val ) { 310 vidx = j; 311 // Ignore DecodeN val which could be hoisted to where needed. 312 if( is_decoden ) continue; 313 } 314 // Block of memory-op input 315 Block *inb = get_block_for_node(mach->in(j)); 316 Block *b = block; // Start from nul check 317 while( b != inb && b->_dom_depth > inb->_dom_depth ) 318 b = b->_idom; // search upwards for input 319 // See if input dominates null check 320 if( b != inb ) 321 break; 322 } 323 if( j > 0 ) 324 continue; 325 Block *mb = get_block_for_node(mach); 326 // Hoisting stores requires more checks for the anti-dependence case. 327 // Give up hoisting if we have to move the store past any load. 328 if( was_store ) { 329 Block *b = mb; // Start searching here for a local load 330 // mach use (faulting) trying to hoist 331 // n might be blocker to hoisting 332 while( b != block ) { 333 uint k; 334 for( k = 1; k < b->number_of_nodes(); k++ ) { 335 Node *n = b->get_node(k); 336 if( n->needs_anti_dependence_check() && 337 n->in(LoadNode::Memory) == mach->in(StoreNode::Memory) ) 338 break; // Found anti-dependent load 339 } 340 if( k < b->number_of_nodes() ) 341 break; // Found anti-dependent load 342 // Make sure control does not do a merge (would have to check allpaths) 343 if( b->num_preds() != 2 ) break; 344 b = get_block_for_node(b->pred(1)); // Move up to predecessor block 345 } 346 if( b != block ) continue; 347 } 348 349 // Make sure this memory op is not already being used for a NullCheck 350 Node *e = mb->end(); 351 if( e->is_MachNullCheck() && e->in(1) == mach ) 352 continue; // Already being used as a NULL check 353 354 // Found a candidate! Pick one with least dom depth - the highest 355 // in the dom tree should be closest to the null check. 356 if (best == NULL || get_block_for_node(mach)->_dom_depth < get_block_for_node(best)->_dom_depth) { 357 best = mach; 358 bidx = vidx; 359 } 360 } 361 // No candidate! 362 if (best == NULL) { 363 return; 364 } 365 366 // ---- Found an implicit null check 367 #ifndef PRODUCT 368 extern int implicit_null_checks; 369 implicit_null_checks++; 370 #endif 371 372 if( is_decoden ) { 373 // Check if we need to hoist decodeHeapOop_not_null first. 374 Block *valb = get_block_for_node(val); 375 if( block != valb && block->_dom_depth < valb->_dom_depth ) { 376 // Hoist it up to the end of the test block. 377 valb->find_remove(val); 378 block->add_inst(val); 379 map_node_to_block(val, block); 380 // DecodeN on x86 may kill flags. Check for flag-killing projections 381 // that also need to be hoisted. 382 for (DUIterator_Fast jmax, j = val->fast_outs(jmax); j < jmax; j++) { 383 Node* n = val->fast_out(j); 384 if( n->is_MachProj() ) { 385 get_block_for_node(n)->find_remove(n); 386 block->add_inst(n); 387 map_node_to_block(n, block); 388 } 389 } 390 } 391 } 392 // Hoist the memory candidate up to the end of the test block. 393 Block *old_block = get_block_for_node(best); 394 old_block->find_remove(best); 395 block->add_inst(best); 396 map_node_to_block(best, block); 397 398 // Move the control dependence if it is pinned to not-null block. 399 // Don't change it in other cases: NULL or dominating control. 400 if (best->in(0) == not_null_block->head()) { 401 // Set it to control edge of null check. 402 best->set_req(0, proj->in(0)->in(0)); 403 } 404 405 // Check for flag-killing projections that also need to be hoisted 406 // Should be DU safe because no edge updates. 407 for (DUIterator_Fast jmax, j = best->fast_outs(jmax); j < jmax; j++) { 408 Node* n = best->fast_out(j); 409 if( n->is_MachProj() ) { 410 get_block_for_node(n)->find_remove(n); 411 block->add_inst(n); 412 map_node_to_block(n, block); 413 } 414 } 415 416 // proj==Op_True --> ne test; proj==Op_False --> eq test. 417 // One of two graph shapes got matched: 418 // (IfTrue (If (Bool NE (CmpP ptr NULL)))) 419 // (IfFalse (If (Bool EQ (CmpP ptr NULL)))) 420 // NULL checks are always branch-if-eq. If we see a IfTrue projection 421 // then we are replacing a 'ne' test with a 'eq' NULL check test. 422 // We need to flip the projections to keep the same semantics. 423 if( proj->Opcode() == Op_IfTrue ) { 424 // Swap order of projections in basic block to swap branch targets 425 Node *tmp1 = block->get_node(block->end_idx()+1); 426 Node *tmp2 = block->get_node(block->end_idx()+2); 427 block->map_node(tmp2, block->end_idx()+1); 428 block->map_node(tmp1, block->end_idx()+2); 429 Node *tmp = new Node(C->top()); // Use not NULL input 430 tmp1->replace_by(tmp); 431 tmp2->replace_by(tmp1); 432 tmp->replace_by(tmp2); 433 tmp->destruct(); 434 } 435 436 // Remove the existing null check; use a new implicit null check instead. 437 // Since schedule-local needs precise def-use info, we need to correct 438 // it as well. 439 Node *old_tst = proj->in(0); 440 MachNode *nul_chk = new MachNullCheckNode(old_tst->in(0),best,bidx); 441 block->map_node(nul_chk, block->end_idx()); 442 map_node_to_block(nul_chk, block); 443 // Redirect users of old_test to nul_chk 444 for (DUIterator_Last i2min, i2 = old_tst->last_outs(i2min); i2 >= i2min; --i2) 445 old_tst->last_out(i2)->set_req(0, nul_chk); 446 // Clean-up any dead code 447 for (uint i3 = 0; i3 < old_tst->req(); i3++) { 448 Node* in = old_tst->in(i3); 449 old_tst->set_req(i3, NULL); 450 if (in->outcnt() == 0) { 451 // Remove dead input node 452 in->disconnect_inputs(NULL, C); 453 block->find_remove(in); 454 } 455 } 456 457 latency_from_uses(nul_chk); 458 latency_from_uses(best); 459 460 // insert anti-dependences to defs in this block 461 if (! best->needs_anti_dependence_check()) { 462 for (uint k = 1; k < block->number_of_nodes(); k++) { 463 Node *n = block->get_node(k); 464 if (n->needs_anti_dependence_check() && 465 n->in(LoadNode::Memory) == best->in(StoreNode::Memory)) { 466 // Found anti-dependent load 467 insert_anti_dependences(block, n); 468 } 469 } 470 } 471 } 472 473 474 //------------------------------select----------------------------------------- 475 // Select a nice fellow from the worklist to schedule next. If there is only 476 // one choice, then use it. Projections take top priority for correctness 477 // reasons - if I see a projection, then it is next. There are a number of 478 // other special cases, for instructions that consume condition codes, et al. 479 // These are chosen immediately. Some instructions are required to immediately 480 // precede the last instruction in the block, and these are taken last. Of the 481 // remaining cases (most), choose the instruction with the greatest latency 482 // (that is, the most number of pseudo-cycles required to the end of the 483 // routine). If there is a tie, choose the instruction with the most inputs. 484 Node* PhaseCFG::select( 485 Block* block, 486 Node_List &worklist, 487 GrowableArray<int> &ready_cnt, 488 VectorSet &next_call, 489 uint sched_slot, 490 intptr_t* recalc_pressure_nodes) { 491 492 // If only a single entry on the stack, use it 493 uint cnt = worklist.size(); 494 if (cnt == 1) { 495 Node *n = worklist[0]; 496 worklist.map(0,worklist.pop()); 497 return n; 498 } 499 500 uint choice = 0; // Bigger is most important 501 uint latency = 0; // Bigger is scheduled first 502 uint score = 0; // Bigger is better 503 int idx = -1; // Index in worklist 504 int cand_cnt = 0; // Candidate count 505 bool block_size_threshold_ok = (block->number_of_nodes() > 10) ? true : false; 506 507 for( uint i=0; i<cnt; i++ ) { // Inspect entire worklist 508 // Order in worklist is used to break ties. 509 // See caller for how this is used to delay scheduling 510 // of induction variable increments to after the other 511 // uses of the phi are scheduled. 512 Node *n = worklist[i]; // Get Node on worklist 513 514 int iop = n->is_Mach() ? n->as_Mach()->ideal_Opcode() : 0; 515 if( n->is_Proj() || // Projections always win 516 n->Opcode()== Op_Con || // So does constant 'Top' 517 iop == Op_CreateEx || // Create-exception must start block 518 iop == Op_CheckCastPP 519 ) { 520 worklist.map(i,worklist.pop()); 521 return n; 522 } 523 524 // Final call in a block must be adjacent to 'catch' 525 Node *e = block->end(); 526 if( e->is_Catch() && e->in(0)->in(0) == n ) 527 continue; 528 529 // Memory op for an implicit null check has to be at the end of the block 530 if( e->is_MachNullCheck() && e->in(1) == n ) 531 continue; 532 533 // Schedule IV increment last. 534 if (e->is_Mach() && e->as_Mach()->ideal_Opcode() == Op_CountedLoopEnd) { 535 // Cmp might be matched into CountedLoopEnd node. 536 Node *cmp = (e->in(1)->ideal_reg() == Op_RegFlags) ? e->in(1) : e; 537 if (cmp->req() > 1 && cmp->in(1) == n && n->is_iteratively_computed()) { 538 continue; 539 } 540 } 541 542 uint n_choice = 2; 543 544 // See if this instruction is consumed by a branch. If so, then (as the 545 // branch is the last instruction in the basic block) force it to the 546 // end of the basic block 547 if ( must_clone[iop] ) { 548 // See if any use is a branch 549 bool found_machif = false; 550 551 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) { 552 Node* use = n->fast_out(j); 553 554 // The use is a conditional branch, make them adjacent 555 if (use->is_MachIf() && get_block_for_node(use) == block) { 556 found_machif = true; 557 break; 558 } 559 560 // More than this instruction pending for successor to be ready, 561 // don't choose this if other opportunities are ready 562 if (ready_cnt.at(use->_idx) > 1) 563 n_choice = 1; 564 } 565 566 // loop terminated, prefer not to use this instruction 567 if (found_machif) 568 continue; 569 } 570 571 // See if this has a predecessor that is "must_clone", i.e. sets the 572 // condition code. If so, choose this first 573 for (uint j = 0; j < n->req() ; j++) { 574 Node *inn = n->in(j); 575 if (inn) { 576 if (inn->is_Mach() && must_clone[inn->as_Mach()->ideal_Opcode()] ) { 577 n_choice = 3; 578 break; 579 } 580 } 581 } 582 583 // MachTemps should be scheduled last so they are near their uses 584 if (n->is_MachTemp()) { 585 n_choice = 1; 586 } 587 588 uint n_latency = get_latency_for_node(n); 589 uint n_score = n->req(); // Many inputs get high score to break ties 590 591 if (OptoRegScheduling && block_size_threshold_ok) { 592 if (recalc_pressure_nodes[n->_idx] == 0x7fff7fff) { 593 _regalloc->_scratch_int_pressure.init(_regalloc->_sched_int_pressure.high_pressure_limit()); 594 _regalloc->_scratch_float_pressure.init(_regalloc->_sched_float_pressure.high_pressure_limit()); 595 // simulate the notion that we just picked this node to schedule 596 n->add_flag(Node::Flag_is_scheduled); 597 // now caculate its effect upon the graph if we did 598 adjust_register_pressure(n, block, recalc_pressure_nodes, false); 599 // return its state for finalize in case somebody else wins 600 n->remove_flag(Node::Flag_is_scheduled); 601 // now save the two final pressure components of register pressure, limiting pressure calcs to short size 602 short int_pressure = (short)_regalloc->_scratch_int_pressure.current_pressure(); 603 short float_pressure = (short)_regalloc->_scratch_float_pressure.current_pressure(); 604 recalc_pressure_nodes[n->_idx] = int_pressure; 605 recalc_pressure_nodes[n->_idx] |= (float_pressure << 16); 606 } 607 608 if (_scheduling_for_pressure) { 609 latency = n_latency; 610 if (n_choice != 3) { 611 // Now evaluate each register pressure component based on threshold in the score. 612 // In general the defining register type will dominate the score, ergo we will not see register pressure grow on both banks 613 // on a single instruction, but we might see it shrink on both banks. 614 // For each use of register that has a register class that is over the high pressure limit, we build n_score up for 615 // live ranges that terminate on this instruction. 616 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) { 617 short int_pressure = (short)recalc_pressure_nodes[n->_idx]; 618 n_score = (int_pressure < 0) ? ((score + n_score) - int_pressure) : (int_pressure > 0) ? 1 : n_score; 619 } 620 if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) { 621 short float_pressure = (short)(recalc_pressure_nodes[n->_idx] >> 16); 622 n_score = (float_pressure < 0) ? ((score + n_score) - float_pressure) : (float_pressure > 0) ? 1 : n_score; 623 } 624 } else { 625 // make sure we choose these candidates 626 score = 0; 627 } 628 } 629 } 630 631 // Keep best latency found 632 cand_cnt++; 633 if (choice < n_choice || 634 (choice == n_choice && 635 ((StressLCM && Compile::randomized_select(cand_cnt)) || 636 (!StressLCM && 637 (latency < n_latency || 638 (latency == n_latency && 639 (score < n_score))))))) { 640 choice = n_choice; 641 latency = n_latency; 642 score = n_score; 643 idx = i; // Also keep index in worklist 644 } 645 } // End of for all ready nodes in worklist 646 647 assert(idx >= 0, "index should be set"); 648 Node *n = worklist[(uint)idx]; // Get the winner 649 650 worklist.map((uint)idx, worklist.pop()); // Compress worklist 651 return n; 652 } 653 654 //-------------------------adjust_register_pressure---------------------------- 655 void PhaseCFG::adjust_register_pressure(Node* n, Block* block, intptr_t* recalc_pressure_nodes, bool finalize_mode) { 656 PhaseLive* liveinfo = _regalloc->get_live(); 657 IndexSet* liveout = liveinfo->live(block); 658 // first adjust the register pressure for the sources 659 for (uint i = 1; i < n->req(); i++) { 660 bool lrg_ends = false; 661 Node *src_n = n->in(i); 662 if (src_n == NULL) continue; 663 if (!src_n->is_Mach()) continue; 664 uint src = _regalloc->_lrg_map.find(src_n); 665 if (src == 0) continue; 666 LRG& lrg_src = _regalloc->lrgs(src); 667 // detect if the live range ends or not 668 if (liveout->member(src) == false) { 669 lrg_ends = true; 670 for (DUIterator_Fast jmax, j = src_n->fast_outs(jmax); j < jmax; j++) { 671 Node* m = src_n->fast_out(j); // Get user 672 if (m == n) continue; 673 if (!m->is_Mach()) continue; 674 MachNode *mach = m->as_Mach(); 675 bool src_matches = false; 676 int iop = mach->ideal_Opcode(); 677 678 switch (iop) { 679 case Op_StoreB: 680 case Op_StoreC: 681 case Op_StoreCM: 682 case Op_StoreD: 683 case Op_StoreF: 684 case Op_StoreI: 685 case Op_StoreL: 686 case Op_StoreP: 687 case Op_StoreN: 688 case Op_StoreVector: 689 case Op_StoreNKlass: 690 for (uint k = 1; k < m->req(); k++) { 691 Node *in = m->in(k); 692 if (in == src_n) { 693 src_matches = true; 694 break; 695 } 696 } 697 break; 698 699 default: 700 src_matches = true; 701 break; 702 } 703 704 // If we have a store as our use, ignore the non source operands 705 if (src_matches == false) continue; 706 707 // Mark every unscheduled use which is not n with a recalculation 708 if ((get_block_for_node(m) == block) && (!m->is_scheduled())) { 709 if (finalize_mode && !m->is_Phi()) { 710 recalc_pressure_nodes[m->_idx] = 0x7fff7fff; 711 } 712 lrg_ends = false; 713 } 714 } 715 } 716 // if none, this live range ends and we can adjust register pressure 717 if (lrg_ends) { 718 if (finalize_mode) { 719 _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure); 720 } else { 721 _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure); 722 } 723 } 724 } 725 726 // now add the register pressure from the dest and evaluate which heuristic we should use: 727 // 1.) The default, latency scheduling 728 // 2.) Register pressure scheduling based on the high pressure limit threshold for int or float register stacks 729 uint dst = _regalloc->_lrg_map.find(n); 730 if (dst != 0) { 731 LRG& lrg_dst = _regalloc->lrgs(dst); 732 if (finalize_mode) { 733 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure); 734 // check to see if we fall over the register pressure cliff here 735 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) { 736 _scheduling_for_pressure = true; 737 } else if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) { 738 _scheduling_for_pressure = true; 739 } else { 740 // restore latency scheduling mode 741 _scheduling_for_pressure = false; 742 } 743 } else { 744 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure); 745 } 746 } 747 } 748 749 //------------------------------set_next_call---------------------------------- 750 void PhaseCFG::set_next_call(Block* block, Node* n, VectorSet& next_call) { 751 if( next_call.test_set(n->_idx) ) return; 752 for( uint i=0; i<n->len(); i++ ) { 753 Node *m = n->in(i); 754 if( !m ) continue; // must see all nodes in block that precede call 755 if (get_block_for_node(m) == block) { 756 set_next_call(block, m, next_call); 757 } 758 } 759 } 760 761 //------------------------------needed_for_next_call--------------------------- 762 // Set the flag 'next_call' for each Node that is needed for the next call to 763 // be scheduled. This flag lets me bias scheduling so Nodes needed for the 764 // next subroutine call get priority - basically it moves things NOT needed 765 // for the next call till after the call. This prevents me from trying to 766 // carry lots of stuff live across a call. 767 void PhaseCFG::needed_for_next_call(Block* block, Node* this_call, VectorSet& next_call) { 768 // Find the next control-defining Node in this block 769 Node* call = NULL; 770 for (DUIterator_Fast imax, i = this_call->fast_outs(imax); i < imax; i++) { 771 Node* m = this_call->fast_out(i); 772 if (get_block_for_node(m) == block && // Local-block user 773 m != this_call && // Not self-start node 774 m->is_MachCall()) { 775 call = m; 776 break; 777 } 778 } 779 if (call == NULL) return; // No next call (e.g., block end is near) 780 // Set next-call for all inputs to this call 781 set_next_call(block, call, next_call); 782 } 783 784 //------------------------------add_call_kills------------------------------------- 785 // helper function that adds caller save registers to MachProjNode 786 static void add_call_kills(MachProjNode *proj, RegMask& regs, const char* save_policy, bool exclude_soe) { 787 // Fill in the kill mask for the call 788 for( OptoReg::Name r = OptoReg::Name(0); r < _last_Mach_Reg; r=OptoReg::add(r,1) ) { 789 if( !regs.Member(r) ) { // Not already defined by the call 790 // Save-on-call register? 791 if ((save_policy[r] == 'C') || 792 (save_policy[r] == 'A') || 793 ((save_policy[r] == 'E') && exclude_soe)) { 794 proj->_rout.Insert(r); 795 } 796 } 797 } 798 } 799 800 801 //------------------------------sched_call------------------------------------- 802 uint PhaseCFG::sched_call(Block* block, uint node_cnt, Node_List& worklist, GrowableArray<int>& ready_cnt, MachCallNode* mcall, VectorSet& next_call) { 803 RegMask regs; 804 805 // Schedule all the users of the call right now. All the users are 806 // projection Nodes, so they must be scheduled next to the call. 807 // Collect all the defined registers. 808 for (DUIterator_Fast imax, i = mcall->fast_outs(imax); i < imax; i++) { 809 Node* n = mcall->fast_out(i); 810 assert( n->is_MachProj(), "" ); 811 int n_cnt = ready_cnt.at(n->_idx)-1; 812 ready_cnt.at_put(n->_idx, n_cnt); 813 assert( n_cnt == 0, "" ); 814 // Schedule next to call 815 block->map_node(n, node_cnt++); 816 // Collect defined registers 817 regs.OR(n->out_RegMask()); 818 // Check for scheduling the next control-definer 819 if( n->bottom_type() == Type::CONTROL ) 820 // Warm up next pile of heuristic bits 821 needed_for_next_call(block, n, next_call); 822 823 // Children of projections are now all ready 824 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) { 825 Node* m = n->fast_out(j); // Get user 826 if(get_block_for_node(m) != block) { 827 continue; 828 } 829 if( m->is_Phi() ) continue; 830 int m_cnt = ready_cnt.at(m->_idx) - 1; 831 ready_cnt.at_put(m->_idx, m_cnt); 832 if( m_cnt == 0 ) 833 worklist.push(m); 834 } 835 836 } 837 838 // Act as if the call defines the Frame Pointer. 839 // Certainly the FP is alive and well after the call. 840 regs.Insert(_matcher.c_frame_pointer()); 841 842 // Set all registers killed and not already defined by the call. 843 uint r_cnt = mcall->tf()->range()->cnt(); 844 int op = mcall->ideal_Opcode(); 845 MachProjNode *proj = new MachProjNode( mcall, r_cnt+1, RegMask::Empty, MachProjNode::fat_proj ); 846 map_node_to_block(proj, block); 847 block->insert_node(proj, node_cnt++); 848 849 // Select the right register save policy. 850 const char *save_policy = NULL; 851 switch (op) { 852 case Op_CallRuntime: 853 case Op_CallLeaf: 854 case Op_CallLeafNoFP: 855 // Calling C code so use C calling convention 856 save_policy = _matcher._c_reg_save_policy; 857 break; 858 859 case Op_CallStaticJava: 860 case Op_CallDynamicJava: 861 // Calling Java code so use Java calling convention 862 save_policy = _matcher._register_save_policy; 863 break; 864 865 default: 866 ShouldNotReachHere(); 867 } 868 869 // When using CallRuntime mark SOE registers as killed by the call 870 // so values that could show up in the RegisterMap aren't live in a 871 // callee saved register since the register wouldn't know where to 872 // find them. CallLeaf and CallLeafNoFP are ok because they can't 873 // have debug info on them. Strictly speaking this only needs to be 874 // done for oops since idealreg2debugmask takes care of debug info 875 // references but there no way to handle oops differently than other 876 // pointers as far as the kill mask goes. 877 bool exclude_soe = op == Op_CallRuntime; 878 879 // If the call is a MethodHandle invoke, we need to exclude the 880 // register which is used to save the SP value over MH invokes from 881 // the mask. Otherwise this register could be used for 882 // deoptimization information. 883 if (op == Op_CallStaticJava) { 884 MachCallStaticJavaNode* mcallstaticjava = (MachCallStaticJavaNode*) mcall; 885 if (mcallstaticjava->_method_handle_invoke) 886 proj->_rout.OR(Matcher::method_handle_invoke_SP_save_mask()); 887 } 888 889 add_call_kills(proj, regs, save_policy, exclude_soe); 890 891 return node_cnt; 892 } 893 894 895 //------------------------------schedule_local--------------------------------- 896 // Topological sort within a block. Someday become a real scheduler. 897 bool PhaseCFG::schedule_local(Block* block, GrowableArray<int>& ready_cnt, VectorSet& next_call, intptr_t *recalc_pressure_nodes) { 898 // Already "sorted" are the block start Node (as the first entry), and 899 // the block-ending Node and any trailing control projections. We leave 900 // these alone. PhiNodes and ParmNodes are made to follow the block start 901 // Node. Everything else gets topo-sorted. 902 903 #ifndef PRODUCT 904 if (trace_opto_pipelining()) { 905 tty->print_cr("# --- schedule_local B%d, before: ---", block->_pre_order); 906 for (uint i = 0;i < block->number_of_nodes(); i++) { 907 tty->print("# "); 908 block->get_node(i)->fast_dump(); 909 } 910 tty->print_cr("#"); 911 } 912 #endif 913 914 // RootNode is already sorted 915 if (block->number_of_nodes() == 1) { 916 return true; 917 } 918 919 bool block_size_threshold_ok = (block->number_of_nodes() > 10) ? true : false; 920 921 // We track the uses of local definitions as input dependences so that 922 // we know when a given instruction is avialable to be scheduled. 923 uint i; 924 if (OptoRegScheduling && block_size_threshold_ok) { 925 for (i = 1; i < block->number_of_nodes(); i++) { // setup nodes for pressure calc 926 Node *n = block->get_node(i); 927 n->remove_flag(Node::Flag_is_scheduled); 928 if (!n->is_Phi()) { 929 recalc_pressure_nodes[n->_idx] = 0x7fff7fff; 930 } 931 } 932 } 933 934 // Move PhiNodes and ParmNodes from 1 to cnt up to the start 935 uint node_cnt = block->end_idx(); 936 uint phi_cnt = 1; 937 for( i = 1; i<node_cnt; i++ ) { // Scan for Phi 938 Node *n = block->get_node(i); 939 if( n->is_Phi() || // Found a PhiNode or ParmNode 940 (n->is_Proj() && n->in(0) == block->head()) ) { 941 // Move guy at 'phi_cnt' to the end; makes a hole at phi_cnt 942 block->map_node(block->get_node(phi_cnt), i); 943 block->map_node(n, phi_cnt++); // swap Phi/Parm up front 944 if (OptoRegScheduling && block_size_threshold_ok) { 945 // mark n as scheduled 946 n->add_flag(Node::Flag_is_scheduled); 947 } 948 } else { // All others 949 // Count block-local inputs to 'n' 950 uint cnt = n->len(); // Input count 951 uint local = 0; 952 for( uint j=0; j<cnt; j++ ) { 953 Node *m = n->in(j); 954 if( m && get_block_for_node(m) == block && !m->is_top() ) 955 local++; // One more block-local input 956 } 957 ready_cnt.at_put(n->_idx, local); // Count em up 958 959 #ifdef ASSERT 960 if( UseConcMarkSweepGC || UseG1GC ) { 961 if( n->is_Mach() && n->as_Mach()->ideal_Opcode() == Op_StoreCM ) { 962 // Check the precedence edges 963 for (uint prec = n->req(); prec < n->len(); prec++) { 964 Node* oop_store = n->in(prec); 965 if (oop_store != NULL) { 966 assert(get_block_for_node(oop_store)->_dom_depth <= block->_dom_depth, "oop_store must dominate card-mark"); 967 } 968 } 969 } 970 } 971 #endif 972 973 // A few node types require changing a required edge to a precedence edge 974 // before allocation. 975 if( n->is_Mach() && n->req() > TypeFunc::Parms && 976 (n->as_Mach()->ideal_Opcode() == Op_MemBarAcquire || 977 n->as_Mach()->ideal_Opcode() == Op_MemBarVolatile) ) { 978 // MemBarAcquire could be created without Precedent edge. 979 // del_req() replaces the specified edge with the last input edge 980 // and then removes the last edge. If the specified edge > number of 981 // edges the last edge will be moved outside of the input edges array 982 // and the edge will be lost. This is why this code should be 983 // executed only when Precedent (== TypeFunc::Parms) edge is present. 984 Node *x = n->in(TypeFunc::Parms); 985 if (x != NULL && get_block_for_node(x) == block && n->find_prec_edge(x) != -1) { 986 // Old edge to node within same block will get removed, but no precedence 987 // edge will get added because it already exists. Update ready count. 988 int cnt = ready_cnt.at(n->_idx); 989 assert(cnt > 1, "MemBar node %d must not get ready here", n->_idx); 990 ready_cnt.at_put(n->_idx, cnt-1); 991 } 992 n->del_req(TypeFunc::Parms); 993 n->add_prec(x); 994 } 995 } 996 } 997 for(uint i2=i; i2< block->number_of_nodes(); i2++ ) // Trailing guys get zapped count 998 ready_cnt.at_put(block->get_node(i2)->_idx, 0); 999 1000 // All the prescheduled guys do not hold back internal nodes 1001 uint i3; 1002 for (i3 = 0; i3 < phi_cnt; i3++) { // For all pre-scheduled 1003 Node *n = block->get_node(i3); // Get pre-scheduled 1004 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) { 1005 Node* m = n->fast_out(j); 1006 if (get_block_for_node(m) == block) { // Local-block user 1007 int m_cnt = ready_cnt.at(m->_idx)-1; 1008 if (OptoRegScheduling && block_size_threshold_ok) { 1009 // mark m as scheduled 1010 if (m_cnt < 0) { 1011 m->add_flag(Node::Flag_is_scheduled); 1012 } 1013 } 1014 ready_cnt.at_put(m->_idx, m_cnt); // Fix ready count 1015 } 1016 } 1017 } 1018 1019 Node_List delay; 1020 // Make a worklist 1021 Node_List worklist; 1022 for(uint i4=i3; i4<node_cnt; i4++ ) { // Put ready guys on worklist 1023 Node *m = block->get_node(i4); 1024 if( !ready_cnt.at(m->_idx) ) { // Zero ready count? 1025 if (m->is_iteratively_computed()) { 1026 // Push induction variable increments last to allow other uses 1027 // of the phi to be scheduled first. The select() method breaks 1028 // ties in scheduling by worklist order. 1029 delay.push(m); 1030 } else if (m->is_Mach() && m->as_Mach()->ideal_Opcode() == Op_CreateEx) { 1031 // Force the CreateEx to the top of the list so it's processed 1032 // first and ends up at the start of the block. 1033 worklist.insert(0, m); 1034 } else { 1035 worklist.push(m); // Then on to worklist! 1036 } 1037 } 1038 } 1039 while (delay.size()) { 1040 Node* d = delay.pop(); 1041 worklist.push(d); 1042 } 1043 1044 if (OptoRegScheduling && block_size_threshold_ok) { 1045 // To stage register pressure calculations we need to examine the live set variables 1046 // breaking them up by register class to compartmentalize the calculations. 1047 uint float_pressure = Matcher::float_pressure(FLOATPRESSURE); 1048 _regalloc->_sched_int_pressure.init(INTPRESSURE); 1049 _regalloc->_sched_float_pressure.init(float_pressure); 1050 _regalloc->_scratch_int_pressure.init(INTPRESSURE); 1051 _regalloc->_scratch_float_pressure.init(float_pressure); 1052 1053 _regalloc->compute_entry_block_pressure(block); 1054 } 1055 1056 // Warm up the 'next_call' heuristic bits 1057 needed_for_next_call(block, block->head(), next_call); 1058 1059 #ifndef PRODUCT 1060 if (trace_opto_pipelining()) { 1061 for (uint j=0; j< block->number_of_nodes(); j++) { 1062 Node *n = block->get_node(j); 1063 int idx = n->_idx; 1064 tty->print("# ready cnt:%3d ", ready_cnt.at(idx)); 1065 tty->print("latency:%3d ", get_latency_for_node(n)); 1066 tty->print("%4d: %s\n", idx, n->Name()); 1067 } 1068 } 1069 #endif 1070 1071 uint max_idx = (uint)ready_cnt.length(); 1072 // Pull from worklist and schedule 1073 while( worklist.size() ) { // Worklist is not ready 1074 1075 #ifndef PRODUCT 1076 if (trace_opto_pipelining()) { 1077 tty->print("# ready list:"); 1078 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist 1079 Node *n = worklist[i]; // Get Node on worklist 1080 tty->print(" %d", n->_idx); 1081 } 1082 tty->cr(); 1083 } 1084 #endif 1085 1086 // Select and pop a ready guy from worklist 1087 Node* n = select(block, worklist, ready_cnt, next_call, phi_cnt, recalc_pressure_nodes); 1088 block->map_node(n, phi_cnt++); // Schedule him next 1089 1090 if (OptoRegScheduling && block_size_threshold_ok) { 1091 n->add_flag(Node::Flag_is_scheduled); 1092 1093 // Now adjust the resister pressure with the node we selected 1094 if (!n->is_Phi()) { 1095 adjust_register_pressure(n, block, recalc_pressure_nodes, true); 1096 } 1097 } 1098 1099 #ifndef PRODUCT 1100 if (trace_opto_pipelining()) { 1101 tty->print("# select %d: %s", n->_idx, n->Name()); 1102 tty->print(", latency:%d", get_latency_for_node(n)); 1103 n->dump(); 1104 if (Verbose) { 1105 tty->print("# ready list:"); 1106 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist 1107 Node *n = worklist[i]; // Get Node on worklist 1108 tty->print(" %d", n->_idx); 1109 } 1110 tty->cr(); 1111 } 1112 } 1113 1114 #endif 1115 if( n->is_MachCall() ) { 1116 MachCallNode *mcall = n->as_MachCall(); 1117 phi_cnt = sched_call(block, phi_cnt, worklist, ready_cnt, mcall, next_call); 1118 continue; 1119 } 1120 1121 if (n->is_Mach() && n->as_Mach()->has_call()) { 1122 RegMask regs; 1123 regs.Insert(_matcher.c_frame_pointer()); 1124 regs.OR(n->out_RegMask()); 1125 1126 MachProjNode *proj = new MachProjNode( n, 1, RegMask::Empty, MachProjNode::fat_proj ); 1127 map_node_to_block(proj, block); 1128 block->insert_node(proj, phi_cnt++); 1129 1130 add_call_kills(proj, regs, _matcher._c_reg_save_policy, false); 1131 } 1132 1133 // Children are now all ready 1134 for (DUIterator_Fast i5max, i5 = n->fast_outs(i5max); i5 < i5max; i5++) { 1135 Node* m = n->fast_out(i5); // Get user 1136 if (get_block_for_node(m) != block) { 1137 continue; 1138 } 1139 if( m->is_Phi() ) continue; 1140 if (m->_idx >= max_idx) { // new node, skip it 1141 assert(m->is_MachProj() && n->is_Mach() && n->as_Mach()->has_call(), "unexpected node types"); 1142 continue; 1143 } 1144 int m_cnt = ready_cnt.at(m->_idx) - 1; 1145 ready_cnt.at_put(m->_idx, m_cnt); 1146 if( m_cnt == 0 ) 1147 worklist.push(m); 1148 } 1149 } 1150 1151 if( phi_cnt != block->end_idx() ) { 1152 // did not schedule all. Retry, Bailout, or Die 1153 if (C->subsume_loads() == true && !C->failing()) { 1154 // Retry with subsume_loads == false 1155 // If this is the first failure, the sentinel string will "stick" 1156 // to the Compile object, and the C2Compiler will see it and retry. 1157 C->record_failure(C2Compiler::retry_no_subsuming_loads()); 1158 } else { 1159 assert(false, "graph should be schedulable"); 1160 } 1161 // assert( phi_cnt == end_idx(), "did not schedule all" ); 1162 return false; 1163 } 1164 1165 if (OptoRegScheduling && block_size_threshold_ok) { 1166 _regalloc->compute_exit_block_pressure(block); 1167 block->_reg_pressure = _regalloc->_sched_int_pressure.final_pressure(); 1168 block->_freg_pressure = _regalloc->_sched_float_pressure.final_pressure(); 1169 } 1170 1171 #ifndef PRODUCT 1172 if (trace_opto_pipelining()) { 1173 tty->print_cr("#"); 1174 tty->print_cr("# after schedule_local"); 1175 for (uint i = 0;i < block->number_of_nodes();i++) { 1176 tty->print("# "); 1177 block->get_node(i)->fast_dump(); 1178 } 1179 tty->print_cr("# "); 1180 1181 if (OptoRegScheduling && block_size_threshold_ok) { 1182 tty->print_cr("# pressure info : %d", block->_pre_order); 1183 _regalloc->print_pressure_info(_regalloc->_sched_int_pressure, "int register info"); 1184 _regalloc->print_pressure_info(_regalloc->_sched_float_pressure, "float register info"); 1185 } 1186 tty->cr(); 1187 } 1188 #endif 1189 1190 return true; 1191 } 1192 1193 //--------------------------catch_cleanup_fix_all_inputs----------------------- 1194 static void catch_cleanup_fix_all_inputs(Node *use, Node *old_def, Node *new_def) { 1195 for (uint l = 0; l < use->len(); l++) { 1196 if (use->in(l) == old_def) { 1197 if (l < use->req()) { 1198 use->set_req(l, new_def); 1199 } else { 1200 use->rm_prec(l); 1201 use->add_prec(new_def); 1202 l--; 1203 } 1204 } 1205 } 1206 } 1207 1208 //------------------------------catch_cleanup_find_cloned_def------------------ 1209 Node* PhaseCFG::catch_cleanup_find_cloned_def(Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) { 1210 assert( use_blk != def_blk, "Inter-block cleanup only"); 1211 1212 // The use is some block below the Catch. Find and return the clone of the def 1213 // that dominates the use. If there is no clone in a dominating block, then 1214 // create a phi for the def in a dominating block. 1215 1216 // Find which successor block dominates this use. The successor 1217 // blocks must all be single-entry (from the Catch only; I will have 1218 // split blocks to make this so), hence they all dominate. 1219 while( use_blk->_dom_depth > def_blk->_dom_depth+1 ) 1220 use_blk = use_blk->_idom; 1221 1222 // Find the successor 1223 Node *fixup = NULL; 1224 1225 uint j; 1226 for( j = 0; j < def_blk->_num_succs; j++ ) 1227 if( use_blk == def_blk->_succs[j] ) 1228 break; 1229 1230 if( j == def_blk->_num_succs ) { 1231 // Block at same level in dom-tree is not a successor. It needs a 1232 // PhiNode, the PhiNode uses from the def and IT's uses need fixup. 1233 Node_Array inputs = new Node_List(Thread::current()->resource_area()); 1234 for(uint k = 1; k < use_blk->num_preds(); k++) { 1235 Block* block = get_block_for_node(use_blk->pred(k)); 1236 inputs.map(k, catch_cleanup_find_cloned_def(block, def, def_blk, n_clone_idx)); 1237 } 1238 1239 // Check to see if the use_blk already has an identical phi inserted. 1240 // If it exists, it will be at the first position since all uses of a 1241 // def are processed together. 1242 Node *phi = use_blk->get_node(1); 1243 if( phi->is_Phi() ) { 1244 fixup = phi; 1245 for (uint k = 1; k < use_blk->num_preds(); k++) { 1246 if (phi->in(k) != inputs[k]) { 1247 // Not a match 1248 fixup = NULL; 1249 break; 1250 } 1251 } 1252 } 1253 1254 // If an existing PhiNode was not found, make a new one. 1255 if (fixup == NULL) { 1256 Node *new_phi = PhiNode::make(use_blk->head(), def); 1257 use_blk->insert_node(new_phi, 1); 1258 map_node_to_block(new_phi, use_blk); 1259 for (uint k = 1; k < use_blk->num_preds(); k++) { 1260 new_phi->set_req(k, inputs[k]); 1261 } 1262 fixup = new_phi; 1263 } 1264 1265 } else { 1266 // Found the use just below the Catch. Make it use the clone. 1267 fixup = use_blk->get_node(n_clone_idx); 1268 } 1269 1270 return fixup; 1271 } 1272 1273 //--------------------------catch_cleanup_intra_block-------------------------- 1274 // Fix all input edges in use that reference "def". The use is in the same 1275 // block as the def and both have been cloned in each successor block. 1276 static void catch_cleanup_intra_block(Node *use, Node *def, Block *blk, int beg, int n_clone_idx) { 1277 1278 // Both the use and def have been cloned. For each successor block, 1279 // get the clone of the use, and make its input the clone of the def 1280 // found in that block. 1281 1282 uint use_idx = blk->find_node(use); 1283 uint offset_idx = use_idx - beg; 1284 for( uint k = 0; k < blk->_num_succs; k++ ) { 1285 // Get clone in each successor block 1286 Block *sb = blk->_succs[k]; 1287 Node *clone = sb->get_node(offset_idx+1); 1288 assert( clone->Opcode() == use->Opcode(), "" ); 1289 1290 // Make use-clone reference the def-clone 1291 catch_cleanup_fix_all_inputs(clone, def, sb->get_node(n_clone_idx)); 1292 } 1293 } 1294 1295 //------------------------------catch_cleanup_inter_block--------------------- 1296 // Fix all input edges in use that reference "def". The use is in a different 1297 // block than the def. 1298 void PhaseCFG::catch_cleanup_inter_block(Node *use, Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) { 1299 if( !use_blk ) return; // Can happen if the use is a precedence edge 1300 1301 Node *new_def = catch_cleanup_find_cloned_def(use_blk, def, def_blk, n_clone_idx); 1302 catch_cleanup_fix_all_inputs(use, def, new_def); 1303 } 1304 1305 //------------------------------call_catch_cleanup----------------------------- 1306 // If we inserted any instructions between a Call and his CatchNode, 1307 // clone the instructions on all paths below the Catch. 1308 void PhaseCFG::call_catch_cleanup(Block* block) { 1309 1310 // End of region to clone 1311 uint end = block->end_idx(); 1312 if( !block->get_node(end)->is_Catch() ) return; 1313 // Start of region to clone 1314 uint beg = end; 1315 while(!block->get_node(beg-1)->is_MachProj() || 1316 !block->get_node(beg-1)->in(0)->is_MachCall() ) { 1317 beg--; 1318 assert(beg > 0,"Catch cleanup walking beyond block boundary"); 1319 } 1320 // Range of inserted instructions is [beg, end) 1321 if( beg == end ) return; 1322 1323 // Clone along all Catch output paths. Clone area between the 'beg' and 1324 // 'end' indices. 1325 for( uint i = 0; i < block->_num_succs; i++ ) { 1326 Block *sb = block->_succs[i]; 1327 // Clone the entire area; ignoring the edge fixup for now. 1328 for( uint j = end; j > beg; j-- ) { 1329 Node *clone = block->get_node(j-1)->clone(); 1330 sb->insert_node(clone, 1); 1331 map_node_to_block(clone, sb); 1332 if (clone->needs_anti_dependence_check()) { 1333 insert_anti_dependences(sb, clone); 1334 } 1335 } 1336 } 1337 1338 1339 // Fixup edges. Check the def-use info per cloned Node 1340 for(uint i2 = beg; i2 < end; i2++ ) { 1341 uint n_clone_idx = i2-beg+1; // Index of clone of n in each successor block 1342 Node *n = block->get_node(i2); // Node that got cloned 1343 // Need DU safe iterator because of edge manipulation in calls. 1344 Unique_Node_List *out = new Unique_Node_List(Thread::current()->resource_area()); 1345 for (DUIterator_Fast j1max, j1 = n->fast_outs(j1max); j1 < j1max; j1++) { 1346 out->push(n->fast_out(j1)); 1347 } 1348 uint max = out->size(); 1349 for (uint j = 0; j < max; j++) {// For all users 1350 Node *use = out->pop(); 1351 Block *buse = get_block_for_node(use); 1352 if( use->is_Phi() ) { 1353 for( uint k = 1; k < use->req(); k++ ) 1354 if( use->in(k) == n ) { 1355 Block* b = get_block_for_node(buse->pred(k)); 1356 Node *fixup = catch_cleanup_find_cloned_def(b, n, block, n_clone_idx); 1357 use->set_req(k, fixup); 1358 } 1359 } else { 1360 if (block == buse) { 1361 catch_cleanup_intra_block(use, n, block, beg, n_clone_idx); 1362 } else { 1363 catch_cleanup_inter_block(use, buse, n, block, n_clone_idx); 1364 } 1365 } 1366 } // End for all users 1367 1368 } // End of for all Nodes in cloned area 1369 1370 // Remove the now-dead cloned ops 1371 for(uint i3 = beg; i3 < end; i3++ ) { 1372 block->get_node(beg)->disconnect_inputs(NULL, C); 1373 block->remove_node(beg); 1374 } 1375 1376 // If the successor blocks have a CreateEx node, move it back to the top 1377 for(uint i4 = 0; i4 < block->_num_succs; i4++ ) { 1378 Block *sb = block->_succs[i4]; 1379 uint new_cnt = end - beg; 1380 // Remove any newly created, but dead, nodes. 1381 for( uint j = new_cnt; j > 0; j-- ) { 1382 Node *n = sb->get_node(j); 1383 if (n->outcnt() == 0 && 1384 (!n->is_Proj() || n->as_Proj()->in(0)->outcnt() == 1) ){ 1385 n->disconnect_inputs(NULL, C); 1386 sb->remove_node(j); 1387 new_cnt--; 1388 } 1389 } 1390 // If any newly created nodes remain, move the CreateEx node to the top 1391 if (new_cnt > 0) { 1392 Node *cex = sb->get_node(1+new_cnt); 1393 if( cex->is_Mach() && cex->as_Mach()->ideal_Opcode() == Op_CreateEx ) { 1394 sb->remove_node(1+new_cnt); 1395 sb->insert_node(cex, 1); 1396 } 1397 } 1398 } 1399 }