1 /* 2 * Copyright (c) 1998, 2018, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "precompiled.hpp" 26 #include "asm/macroAssembler.inline.hpp" 27 #include "memory/allocation.inline.hpp" 28 #include "opto/ad.hpp" 29 #include "opto/block.hpp" 30 #include "opto/c2compiler.hpp" 31 #include "opto/callnode.hpp" 32 #include "opto/cfgnode.hpp" 33 #include "opto/machnode.hpp" 34 #include "opto/runtime.hpp" 35 #include "opto/chaitin.hpp" 36 #include "runtime/sharedRuntime.hpp" 37 38 // Optimization - Graph Style 39 40 // Check whether val is not-null-decoded compressed oop, 41 // i.e. will grab into the base of the heap if it represents NULL. 42 static bool accesses_heap_base_zone(Node *val) { 43 if (Universe::narrow_oop_base() != NULL) { // Implies UseCompressedOops. 44 if (val && val->is_Mach()) { 45 if (val->as_Mach()->ideal_Opcode() == Op_DecodeN) { 46 // This assumes all Decodes with TypePtr::NotNull are matched to nodes that 47 // decode NULL to point to the heap base (Decode_NN). 48 if (val->bottom_type()->is_oopptr()->ptr() == TypePtr::NotNull) { 49 return true; 50 } 51 } 52 // Must recognize load operation with Decode matched in memory operand. 53 // We should not reach here exept for PPC/AIX, as os::zero_page_read_protected() 54 // returns true everywhere else. On PPC, no such memory operands 55 // exist, therefore we did not yet implement a check for such operands. 56 NOT_AIX(Unimplemented()); 57 } 58 } 59 return false; 60 } 61 62 static bool needs_explicit_null_check_for_read(Node *val) { 63 // On some OSes (AIX) the page at address 0 is only write protected. 64 // If so, only Store operations will trap. 65 if (os::zero_page_read_protected()) { 66 return false; // Implicit null check will work. 67 } 68 // Also a read accessing the base of a heap-based compressed heap will trap. 69 if (accesses_heap_base_zone(val) && // Hits the base zone page. 70 Universe::narrow_oop_use_implicit_null_checks()) { // Base zone page is protected. 71 return false; 72 } 73 74 return true; 75 } 76 77 //------------------------------implicit_null_check---------------------------- 78 // Detect implicit-null-check opportunities. Basically, find NULL checks 79 // with suitable memory ops nearby. Use the memory op to do the NULL check. 80 // I can generate a memory op if there is not one nearby. 81 // The proj is the control projection for the not-null case. 82 // The val is the pointer being checked for nullness or 83 // decodeHeapOop_not_null node if it did not fold into address. 84 void PhaseCFG::implicit_null_check(Block* block, Node *proj, Node *val, int allowed_reasons) { 85 // Assume if null check need for 0 offset then always needed 86 // Intel solaris doesn't support any null checks yet and no 87 // mechanism exists (yet) to set the switches at an os_cpu level 88 if( !ImplicitNullChecks || MacroAssembler::needs_explicit_null_check(0)) return; 89 90 // Make sure the ptr-is-null path appears to be uncommon! 91 float f = block->end()->as_MachIf()->_prob; 92 if( proj->Opcode() == Op_IfTrue ) f = 1.0f - f; 93 if( f > PROB_UNLIKELY_MAG(4) ) return; 94 95 uint bidx = 0; // Capture index of value into memop 96 bool was_store; // Memory op is a store op 97 98 // Get the successor block for if the test ptr is non-null 99 Block* not_null_block; // this one goes with the proj 100 Block* null_block; 101 if (block->get_node(block->number_of_nodes()-1) == proj) { 102 null_block = block->_succs[0]; 103 not_null_block = block->_succs[1]; 104 } else { 105 assert(block->get_node(block->number_of_nodes()-2) == proj, "proj is one or the other"); 106 not_null_block = block->_succs[0]; 107 null_block = block->_succs[1]; 108 } 109 while (null_block->is_Empty() == Block::empty_with_goto) { 110 null_block = null_block->_succs[0]; 111 } 112 113 // Search the exception block for an uncommon trap. 114 // (See Parse::do_if and Parse::do_ifnull for the reason 115 // we need an uncommon trap. Briefly, we need a way to 116 // detect failure of this optimization, as in 6366351.) 117 { 118 bool found_trap = false; 119 for (uint i1 = 0; i1 < null_block->number_of_nodes(); i1++) { 120 Node* nn = null_block->get_node(i1); 121 if (nn->is_MachCall() && 122 nn->as_MachCall()->entry_point() == SharedRuntime::uncommon_trap_blob()->entry_point()) { 123 const Type* trtype = nn->in(TypeFunc::Parms)->bottom_type(); 124 if (trtype->isa_int() && trtype->is_int()->is_con()) { 125 jint tr_con = trtype->is_int()->get_con(); 126 Deoptimization::DeoptReason reason = Deoptimization::trap_request_reason(tr_con); 127 Deoptimization::DeoptAction action = Deoptimization::trap_request_action(tr_con); 128 assert((int)reason < (int)BitsPerInt, "recode bit map"); 129 if (is_set_nth_bit(allowed_reasons, (int) reason) 130 && action != Deoptimization::Action_none) { 131 // This uncommon trap is sure to recompile, eventually. 132 // When that happens, C->too_many_traps will prevent 133 // this transformation from happening again. 134 found_trap = true; 135 } 136 } 137 break; 138 } 139 } 140 if (!found_trap) { 141 // We did not find an uncommon trap. 142 return; 143 } 144 } 145 146 // Check for decodeHeapOop_not_null node which did not fold into address 147 bool is_decoden = ((intptr_t)val) & 1; 148 val = (Node*)(((intptr_t)val) & ~1); 149 150 assert(!is_decoden || (val->in(0) == NULL) && val->is_Mach() && 151 (val->as_Mach()->ideal_Opcode() == Op_DecodeN), "sanity"); 152 153 // Search the successor block for a load or store who's base value is also 154 // the tested value. There may be several. 155 Node_List *out = new Node_List(Thread::current()->resource_area()); 156 MachNode *best = NULL; // Best found so far 157 for (DUIterator i = val->outs(); val->has_out(i); i++) { 158 Node *m = val->out(i); 159 if( !m->is_Mach() ) continue; 160 MachNode *mach = m->as_Mach(); 161 was_store = false; 162 int iop = mach->ideal_Opcode(); 163 switch( iop ) { 164 case Op_LoadB: 165 case Op_LoadUB: 166 case Op_LoadUS: 167 case Op_LoadD: 168 case Op_LoadF: 169 case Op_LoadI: 170 case Op_LoadL: 171 case Op_LoadP: 172 case Op_LoadBarrierSlowReg: 173 case Op_LoadBarrierWeakSlowReg: 174 case Op_LoadN: 175 case Op_LoadS: 176 case Op_LoadKlass: 177 case Op_LoadNKlass: 178 case Op_LoadRange: 179 case Op_LoadD_unaligned: 180 case Op_LoadL_unaligned: 181 assert(mach->in(2) == val, "should be address"); 182 break; 183 case Op_StoreB: 184 case Op_StoreC: 185 case Op_StoreCM: 186 case Op_StoreD: 187 case Op_StoreF: 188 case Op_StoreI: 189 case Op_StoreL: 190 case Op_StoreP: 191 case Op_StoreN: 192 case Op_StoreNKlass: 193 was_store = true; // Memory op is a store op 194 // Stores will have their address in slot 2 (memory in slot 1). 195 // If the value being nul-checked is in another slot, it means we 196 // are storing the checked value, which does NOT check the value! 197 if( mach->in(2) != val ) continue; 198 break; // Found a memory op? 199 case Op_StrComp: 200 case Op_StrEquals: 201 case Op_StrIndexOf: 202 case Op_StrIndexOfChar: 203 case Op_AryEq: 204 case Op_StrInflatedCopy: 205 case Op_StrCompressedCopy: 206 case Op_EncodeISOArray: 207 case Op_HasNegatives: 208 // Not a legit memory op for implicit null check regardless of 209 // embedded loads 210 continue; 211 default: // Also check for embedded loads 212 if( !mach->needs_anti_dependence_check() ) 213 continue; // Not an memory op; skip it 214 if( must_clone[iop] ) { 215 // Do not move nodes which produce flags because 216 // RA will try to clone it to place near branch and 217 // it will cause recompilation, see clone_node(). 218 continue; 219 } 220 { 221 // Check that value is used in memory address in 222 // instructions with embedded load (CmpP val1,(val2+off)). 223 Node* base; 224 Node* index; 225 const MachOper* oper = mach->memory_inputs(base, index); 226 if (oper == NULL || oper == (MachOper*)-1) { 227 continue; // Not an memory op; skip it 228 } 229 if (val == base || 230 (val == index && val->bottom_type()->isa_narrowoop())) { 231 break; // Found it 232 } else { 233 continue; // Skip it 234 } 235 } 236 break; 237 } 238 239 // On some OSes (AIX) the page at address 0 is only write protected. 240 // If so, only Store operations will trap. 241 // But a read accessing the base of a heap-based compressed heap will trap. 242 if (!was_store && needs_explicit_null_check_for_read(val)) { 243 continue; 244 } 245 246 // Check that node's control edge is not-null block's head or dominates it, 247 // otherwise we can't hoist it because there are other control dependencies. 248 Node* ctrl = mach->in(0); 249 if (ctrl != NULL && !(ctrl == not_null_block->head() || 250 get_block_for_node(ctrl)->dominates(not_null_block))) { 251 continue; 252 } 253 254 // check if the offset is not too high for implicit exception 255 { 256 intptr_t offset = 0; 257 const TypePtr *adr_type = NULL; // Do not need this return value here 258 const Node* base = mach->get_base_and_disp(offset, adr_type); 259 if (base == NULL || base == NodeSentinel) { 260 // Narrow oop address doesn't have base, only index. 261 // Give up if offset is beyond page size or if heap base is not protected. 262 if (val->bottom_type()->isa_narrowoop() && 263 (MacroAssembler::needs_explicit_null_check(offset) || 264 !Universe::narrow_oop_use_implicit_null_checks())) 265 continue; 266 // cannot reason about it; is probably not implicit null exception 267 } else { 268 const TypePtr* tptr; 269 if (UseCompressedOops && (Universe::narrow_oop_shift() == 0 || 270 Universe::narrow_klass_shift() == 0)) { 271 // 32-bits narrow oop can be the base of address expressions 272 tptr = base->get_ptr_type(); 273 } else { 274 // only regular oops are expected here 275 tptr = base->bottom_type()->is_ptr(); 276 } 277 // Give up if offset is not a compile-time constant. 278 if (offset == Type::OffsetBot || tptr->_offset == Type::OffsetBot) 279 continue; 280 offset += tptr->_offset; // correct if base is offseted 281 // Give up if reference is beyond page size. 282 if (MacroAssembler::needs_explicit_null_check(offset)) 283 continue; 284 // Give up if base is a decode node and the heap base is not protected. 285 if (base->is_Mach() && base->as_Mach()->ideal_Opcode() == Op_DecodeN && 286 !Universe::narrow_oop_use_implicit_null_checks()) 287 continue; 288 } 289 } 290 291 // Check ctrl input to see if the null-check dominates the memory op 292 Block *cb = get_block_for_node(mach); 293 cb = cb->_idom; // Always hoist at least 1 block 294 if( !was_store ) { // Stores can be hoisted only one block 295 while( cb->_dom_depth > (block->_dom_depth + 1)) 296 cb = cb->_idom; // Hoist loads as far as we want 297 // The non-null-block should dominate the memory op, too. Live 298 // range spilling will insert a spill in the non-null-block if it is 299 // needs to spill the memory op for an implicit null check. 300 if (cb->_dom_depth == (block->_dom_depth + 1)) { 301 if (cb != not_null_block) continue; 302 cb = cb->_idom; 303 } 304 } 305 if( cb != block ) continue; 306 307 // Found a memory user; see if it can be hoisted to check-block 308 uint vidx = 0; // Capture index of value into memop 309 uint j; 310 for( j = mach->req()-1; j > 0; j-- ) { 311 if( mach->in(j) == val ) { 312 vidx = j; 313 // Ignore DecodeN val which could be hoisted to where needed. 314 if( is_decoden ) continue; 315 } 316 // Block of memory-op input 317 Block *inb = get_block_for_node(mach->in(j)); 318 Block *b = block; // Start from nul check 319 while( b != inb && b->_dom_depth > inb->_dom_depth ) 320 b = b->_idom; // search upwards for input 321 // See if input dominates null check 322 if( b != inb ) 323 break; 324 } 325 if( j > 0 ) 326 continue; 327 Block *mb = get_block_for_node(mach); 328 // Hoisting stores requires more checks for the anti-dependence case. 329 // Give up hoisting if we have to move the store past any load. 330 if( was_store ) { 331 Block *b = mb; // Start searching here for a local load 332 // mach use (faulting) trying to hoist 333 // n might be blocker to hoisting 334 while( b != block ) { 335 uint k; 336 for( k = 1; k < b->number_of_nodes(); k++ ) { 337 Node *n = b->get_node(k); 338 if( n->needs_anti_dependence_check() && 339 n->in(LoadNode::Memory) == mach->in(StoreNode::Memory) ) 340 break; // Found anti-dependent load 341 } 342 if( k < b->number_of_nodes() ) 343 break; // Found anti-dependent load 344 // Make sure control does not do a merge (would have to check allpaths) 345 if( b->num_preds() != 2 ) break; 346 b = get_block_for_node(b->pred(1)); // Move up to predecessor block 347 } 348 if( b != block ) continue; 349 } 350 351 // Make sure this memory op is not already being used for a NullCheck 352 Node *e = mb->end(); 353 if( e->is_MachNullCheck() && e->in(1) == mach ) 354 continue; // Already being used as a NULL check 355 356 // Found a candidate! Pick one with least dom depth - the highest 357 // in the dom tree should be closest to the null check. 358 if (best == NULL || get_block_for_node(mach)->_dom_depth < get_block_for_node(best)->_dom_depth) { 359 best = mach; 360 bidx = vidx; 361 } 362 } 363 // No candidate! 364 if (best == NULL) { 365 return; 366 } 367 368 // ---- Found an implicit null check 369 #ifndef PRODUCT 370 extern int implicit_null_checks; 371 implicit_null_checks++; 372 #endif 373 374 if( is_decoden ) { 375 // Check if we need to hoist decodeHeapOop_not_null first. 376 Block *valb = get_block_for_node(val); 377 if( block != valb && block->_dom_depth < valb->_dom_depth ) { 378 // Hoist it up to the end of the test block. 379 valb->find_remove(val); 380 block->add_inst(val); 381 map_node_to_block(val, block); 382 // DecodeN on x86 may kill flags. Check for flag-killing projections 383 // that also need to be hoisted. 384 for (DUIterator_Fast jmax, j = val->fast_outs(jmax); j < jmax; j++) { 385 Node* n = val->fast_out(j); 386 if( n->is_MachProj() ) { 387 get_block_for_node(n)->find_remove(n); 388 block->add_inst(n); 389 map_node_to_block(n, block); 390 } 391 } 392 } 393 } 394 // Hoist the memory candidate up to the end of the test block. 395 Block *old_block = get_block_for_node(best); 396 old_block->find_remove(best); 397 block->add_inst(best); 398 map_node_to_block(best, block); 399 400 // Move the control dependence if it is pinned to not-null block. 401 // Don't change it in other cases: NULL or dominating control. 402 if (best->in(0) == not_null_block->head()) { 403 // Set it to control edge of null check. 404 best->set_req(0, proj->in(0)->in(0)); 405 } 406 407 // Check for flag-killing projections that also need to be hoisted 408 // Should be DU safe because no edge updates. 409 for (DUIterator_Fast jmax, j = best->fast_outs(jmax); j < jmax; j++) { 410 Node* n = best->fast_out(j); 411 if( n->is_MachProj() ) { 412 get_block_for_node(n)->find_remove(n); 413 block->add_inst(n); 414 map_node_to_block(n, block); 415 } 416 } 417 418 // proj==Op_True --> ne test; proj==Op_False --> eq test. 419 // One of two graph shapes got matched: 420 // (IfTrue (If (Bool NE (CmpP ptr NULL)))) 421 // (IfFalse (If (Bool EQ (CmpP ptr NULL)))) 422 // NULL checks are always branch-if-eq. If we see a IfTrue projection 423 // then we are replacing a 'ne' test with a 'eq' NULL check test. 424 // We need to flip the projections to keep the same semantics. 425 if( proj->Opcode() == Op_IfTrue ) { 426 // Swap order of projections in basic block to swap branch targets 427 Node *tmp1 = block->get_node(block->end_idx()+1); 428 Node *tmp2 = block->get_node(block->end_idx()+2); 429 block->map_node(tmp2, block->end_idx()+1); 430 block->map_node(tmp1, block->end_idx()+2); 431 Node *tmp = new Node(C->top()); // Use not NULL input 432 tmp1->replace_by(tmp); 433 tmp2->replace_by(tmp1); 434 tmp->replace_by(tmp2); 435 tmp->destruct(); 436 } 437 438 // Remove the existing null check; use a new implicit null check instead. 439 // Since schedule-local needs precise def-use info, we need to correct 440 // it as well. 441 Node *old_tst = proj->in(0); 442 MachNode *nul_chk = new MachNullCheckNode(old_tst->in(0),best,bidx); 443 block->map_node(nul_chk, block->end_idx()); 444 map_node_to_block(nul_chk, block); 445 // Redirect users of old_test to nul_chk 446 for (DUIterator_Last i2min, i2 = old_tst->last_outs(i2min); i2 >= i2min; --i2) 447 old_tst->last_out(i2)->set_req(0, nul_chk); 448 // Clean-up any dead code 449 for (uint i3 = 0; i3 < old_tst->req(); i3++) { 450 Node* in = old_tst->in(i3); 451 old_tst->set_req(i3, NULL); 452 if (in->outcnt() == 0) { 453 // Remove dead input node 454 in->disconnect_inputs(NULL, C); 455 block->find_remove(in); 456 } 457 } 458 459 latency_from_uses(nul_chk); 460 latency_from_uses(best); 461 462 // insert anti-dependences to defs in this block 463 if (! best->needs_anti_dependence_check()) { 464 for (uint k = 1; k < block->number_of_nodes(); k++) { 465 Node *n = block->get_node(k); 466 if (n->needs_anti_dependence_check() && 467 n->in(LoadNode::Memory) == best->in(StoreNode::Memory)) { 468 // Found anti-dependent load 469 insert_anti_dependences(block, n); 470 } 471 } 472 } 473 } 474 475 476 //------------------------------select----------------------------------------- 477 // Select a nice fellow from the worklist to schedule next. If there is only 478 // one choice, then use it. Projections take top priority for correctness 479 // reasons - if I see a projection, then it is next. There are a number of 480 // other special cases, for instructions that consume condition codes, et al. 481 // These are chosen immediately. Some instructions are required to immediately 482 // precede the last instruction in the block, and these are taken last. Of the 483 // remaining cases (most), choose the instruction with the greatest latency 484 // (that is, the most number of pseudo-cycles required to the end of the 485 // routine). If there is a tie, choose the instruction with the most inputs. 486 Node* PhaseCFG::select( 487 Block* block, 488 Node_List &worklist, 489 GrowableArray<int> &ready_cnt, 490 VectorSet &next_call, 491 uint sched_slot, 492 intptr_t* recalc_pressure_nodes) { 493 494 // If only a single entry on the stack, use it 495 uint cnt = worklist.size(); 496 if (cnt == 1) { 497 Node *n = worklist[0]; 498 worklist.map(0,worklist.pop()); 499 return n; 500 } 501 502 uint choice = 0; // Bigger is most important 503 uint latency = 0; // Bigger is scheduled first 504 uint score = 0; // Bigger is better 505 int idx = -1; // Index in worklist 506 int cand_cnt = 0; // Candidate count 507 bool block_size_threshold_ok = (block->number_of_nodes() > 10) ? true : false; 508 509 for( uint i=0; i<cnt; i++ ) { // Inspect entire worklist 510 // Order in worklist is used to break ties. 511 // See caller for how this is used to delay scheduling 512 // of induction variable increments to after the other 513 // uses of the phi are scheduled. 514 Node *n = worklist[i]; // Get Node on worklist 515 516 int iop = n->is_Mach() ? n->as_Mach()->ideal_Opcode() : 0; 517 if( n->is_Proj() || // Projections always win 518 n->Opcode()== Op_Con || // So does constant 'Top' 519 iop == Op_CreateEx || // Create-exception must start block 520 iop == Op_CheckCastPP 521 ) { 522 worklist.map(i,worklist.pop()); 523 return n; 524 } 525 526 // Final call in a block must be adjacent to 'catch' 527 Node *e = block->end(); 528 if( e->is_Catch() && e->in(0)->in(0) == n ) 529 continue; 530 531 // Memory op for an implicit null check has to be at the end of the block 532 if( e->is_MachNullCheck() && e->in(1) == n ) 533 continue; 534 535 // Schedule IV increment last. 536 if (e->is_Mach() && e->as_Mach()->ideal_Opcode() == Op_CountedLoopEnd) { 537 // Cmp might be matched into CountedLoopEnd node. 538 Node *cmp = (e->in(1)->ideal_reg() == Op_RegFlags) ? e->in(1) : e; 539 if (cmp->req() > 1 && cmp->in(1) == n && n->is_iteratively_computed()) { 540 continue; 541 } 542 } 543 544 uint n_choice = 2; 545 546 // See if this instruction is consumed by a branch. If so, then (as the 547 // branch is the last instruction in the basic block) force it to the 548 // end of the basic block 549 if ( must_clone[iop] ) { 550 // See if any use is a branch 551 bool found_machif = false; 552 553 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) { 554 Node* use = n->fast_out(j); 555 556 // The use is a conditional branch, make them adjacent 557 if (use->is_MachIf() && get_block_for_node(use) == block) { 558 found_machif = true; 559 break; 560 } 561 562 // More than this instruction pending for successor to be ready, 563 // don't choose this if other opportunities are ready 564 if (ready_cnt.at(use->_idx) > 1) 565 n_choice = 1; 566 } 567 568 // loop terminated, prefer not to use this instruction 569 if (found_machif) 570 continue; 571 } 572 573 // See if this has a predecessor that is "must_clone", i.e. sets the 574 // condition code. If so, choose this first 575 for (uint j = 0; j < n->req() ; j++) { 576 Node *inn = n->in(j); 577 if (inn) { 578 if (inn->is_Mach() && must_clone[inn->as_Mach()->ideal_Opcode()] ) { 579 n_choice = 3; 580 break; 581 } 582 } 583 } 584 585 // MachTemps should be scheduled last so they are near their uses 586 if (n->is_MachTemp()) { 587 n_choice = 1; 588 } 589 590 uint n_latency = get_latency_for_node(n); 591 uint n_score = n->req(); // Many inputs get high score to break ties 592 593 if (OptoRegScheduling && block_size_threshold_ok) { 594 if (recalc_pressure_nodes[n->_idx] == 0x7fff7fff) { 595 _regalloc->_scratch_int_pressure.init(_regalloc->_sched_int_pressure.high_pressure_limit()); 596 _regalloc->_scratch_float_pressure.init(_regalloc->_sched_float_pressure.high_pressure_limit()); 597 // simulate the notion that we just picked this node to schedule 598 n->add_flag(Node::Flag_is_scheduled); 599 // now caculate its effect upon the graph if we did 600 adjust_register_pressure(n, block, recalc_pressure_nodes, false); 601 // return its state for finalize in case somebody else wins 602 n->remove_flag(Node::Flag_is_scheduled); 603 // now save the two final pressure components of register pressure, limiting pressure calcs to short size 604 short int_pressure = (short)_regalloc->_scratch_int_pressure.current_pressure(); 605 short float_pressure = (short)_regalloc->_scratch_float_pressure.current_pressure(); 606 recalc_pressure_nodes[n->_idx] = int_pressure; 607 recalc_pressure_nodes[n->_idx] |= (float_pressure << 16); 608 } 609 610 if (_scheduling_for_pressure) { 611 latency = n_latency; 612 if (n_choice != 3) { 613 // Now evaluate each register pressure component based on threshold in the score. 614 // In general the defining register type will dominate the score, ergo we will not see register pressure grow on both banks 615 // on a single instruction, but we might see it shrink on both banks. 616 // For each use of register that has a register class that is over the high pressure limit, we build n_score up for 617 // live ranges that terminate on this instruction. 618 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) { 619 short int_pressure = (short)recalc_pressure_nodes[n->_idx]; 620 n_score = (int_pressure < 0) ? ((score + n_score) - int_pressure) : (int_pressure > 0) ? 1 : n_score; 621 } 622 if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) { 623 short float_pressure = (short)(recalc_pressure_nodes[n->_idx] >> 16); 624 n_score = (float_pressure < 0) ? ((score + n_score) - float_pressure) : (float_pressure > 0) ? 1 : n_score; 625 } 626 } else { 627 // make sure we choose these candidates 628 score = 0; 629 } 630 } 631 } 632 633 // Keep best latency found 634 cand_cnt++; 635 if (choice < n_choice || 636 (choice == n_choice && 637 ((StressLCM && Compile::randomized_select(cand_cnt)) || 638 (!StressLCM && 639 (latency < n_latency || 640 (latency == n_latency && 641 (score < n_score))))))) { 642 choice = n_choice; 643 latency = n_latency; 644 score = n_score; 645 idx = i; // Also keep index in worklist 646 } 647 } // End of for all ready nodes in worklist 648 649 assert(idx >= 0, "index should be set"); 650 Node *n = worklist[(uint)idx]; // Get the winner 651 652 worklist.map((uint)idx, worklist.pop()); // Compress worklist 653 return n; 654 } 655 656 //-------------------------adjust_register_pressure---------------------------- 657 void PhaseCFG::adjust_register_pressure(Node* n, Block* block, intptr_t* recalc_pressure_nodes, bool finalize_mode) { 658 PhaseLive* liveinfo = _regalloc->get_live(); 659 IndexSet* liveout = liveinfo->live(block); 660 // first adjust the register pressure for the sources 661 for (uint i = 1; i < n->req(); i++) { 662 bool lrg_ends = false; 663 Node *src_n = n->in(i); 664 if (src_n == NULL) continue; 665 if (!src_n->is_Mach()) continue; 666 uint src = _regalloc->_lrg_map.find(src_n); 667 if (src == 0) continue; 668 LRG& lrg_src = _regalloc->lrgs(src); 669 // detect if the live range ends or not 670 if (liveout->member(src) == false) { 671 lrg_ends = true; 672 for (DUIterator_Fast jmax, j = src_n->fast_outs(jmax); j < jmax; j++) { 673 Node* m = src_n->fast_out(j); // Get user 674 if (m == n) continue; 675 if (!m->is_Mach()) continue; 676 MachNode *mach = m->as_Mach(); 677 bool src_matches = false; 678 int iop = mach->ideal_Opcode(); 679 680 switch (iop) { 681 case Op_StoreB: 682 case Op_StoreC: 683 case Op_StoreCM: 684 case Op_StoreD: 685 case Op_StoreF: 686 case Op_StoreI: 687 case Op_StoreL: 688 case Op_StoreP: 689 case Op_StoreN: 690 case Op_StoreVector: 691 case Op_StoreNKlass: 692 for (uint k = 1; k < m->req(); k++) { 693 Node *in = m->in(k); 694 if (in == src_n) { 695 src_matches = true; 696 break; 697 } 698 } 699 break; 700 701 default: 702 src_matches = true; 703 break; 704 } 705 706 // If we have a store as our use, ignore the non source operands 707 if (src_matches == false) continue; 708 709 // Mark every unscheduled use which is not n with a recalculation 710 if ((get_block_for_node(m) == block) && (!m->is_scheduled())) { 711 if (finalize_mode && !m->is_Phi()) { 712 recalc_pressure_nodes[m->_idx] = 0x7fff7fff; 713 } 714 lrg_ends = false; 715 } 716 } 717 } 718 // if none, this live range ends and we can adjust register pressure 719 if (lrg_ends) { 720 if (finalize_mode) { 721 _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure); 722 } else { 723 _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure); 724 } 725 } 726 } 727 728 // now add the register pressure from the dest and evaluate which heuristic we should use: 729 // 1.) The default, latency scheduling 730 // 2.) Register pressure scheduling based on the high pressure limit threshold for int or float register stacks 731 uint dst = _regalloc->_lrg_map.find(n); 732 if (dst != 0) { 733 LRG& lrg_dst = _regalloc->lrgs(dst); 734 if (finalize_mode) { 735 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure); 736 // check to see if we fall over the register pressure cliff here 737 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) { 738 _scheduling_for_pressure = true; 739 } else if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) { 740 _scheduling_for_pressure = true; 741 } else { 742 // restore latency scheduling mode 743 _scheduling_for_pressure = false; 744 } 745 } else { 746 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure); 747 } 748 } 749 } 750 751 //------------------------------set_next_call---------------------------------- 752 void PhaseCFG::set_next_call(Block* block, Node* n, VectorSet& next_call) { 753 if( next_call.test_set(n->_idx) ) return; 754 for( uint i=0; i<n->len(); i++ ) { 755 Node *m = n->in(i); 756 if( !m ) continue; // must see all nodes in block that precede call 757 if (get_block_for_node(m) == block) { 758 set_next_call(block, m, next_call); 759 } 760 } 761 } 762 763 //------------------------------needed_for_next_call--------------------------- 764 // Set the flag 'next_call' for each Node that is needed for the next call to 765 // be scheduled. This flag lets me bias scheduling so Nodes needed for the 766 // next subroutine call get priority - basically it moves things NOT needed 767 // for the next call till after the call. This prevents me from trying to 768 // carry lots of stuff live across a call. 769 void PhaseCFG::needed_for_next_call(Block* block, Node* this_call, VectorSet& next_call) { 770 // Find the next control-defining Node in this block 771 Node* call = NULL; 772 for (DUIterator_Fast imax, i = this_call->fast_outs(imax); i < imax; i++) { 773 Node* m = this_call->fast_out(i); 774 if (get_block_for_node(m) == block && // Local-block user 775 m != this_call && // Not self-start node 776 m->is_MachCall()) { 777 call = m; 778 break; 779 } 780 } 781 if (call == NULL) return; // No next call (e.g., block end is near) 782 // Set next-call for all inputs to this call 783 set_next_call(block, call, next_call); 784 } 785 786 //------------------------------add_call_kills------------------------------------- 787 // helper function that adds caller save registers to MachProjNode 788 static void add_call_kills(MachProjNode *proj, RegMask& regs, const char* save_policy, bool exclude_soe) { 789 // Fill in the kill mask for the call 790 for( OptoReg::Name r = OptoReg::Name(0); r < _last_Mach_Reg; r=OptoReg::add(r,1) ) { 791 if( !regs.Member(r) ) { // Not already defined by the call 792 // Save-on-call register? 793 if ((save_policy[r] == 'C') || 794 (save_policy[r] == 'A') || 795 ((save_policy[r] == 'E') && exclude_soe)) { 796 proj->_rout.Insert(r); 797 } 798 } 799 } 800 } 801 802 803 //------------------------------sched_call------------------------------------- 804 uint PhaseCFG::sched_call(Block* block, uint node_cnt, Node_List& worklist, GrowableArray<int>& ready_cnt, MachCallNode* mcall, VectorSet& next_call) { 805 RegMask regs; 806 807 // Schedule all the users of the call right now. All the users are 808 // projection Nodes, so they must be scheduled next to the call. 809 // Collect all the defined registers. 810 for (DUIterator_Fast imax, i = mcall->fast_outs(imax); i < imax; i++) { 811 Node* n = mcall->fast_out(i); 812 assert( n->is_MachProj(), "" ); 813 int n_cnt = ready_cnt.at(n->_idx)-1; 814 ready_cnt.at_put(n->_idx, n_cnt); 815 assert( n_cnt == 0, "" ); 816 // Schedule next to call 817 block->map_node(n, node_cnt++); 818 // Collect defined registers 819 regs.OR(n->out_RegMask()); 820 // Check for scheduling the next control-definer 821 if( n->bottom_type() == Type::CONTROL ) 822 // Warm up next pile of heuristic bits 823 needed_for_next_call(block, n, next_call); 824 825 // Children of projections are now all ready 826 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) { 827 Node* m = n->fast_out(j); // Get user 828 if(get_block_for_node(m) != block) { 829 continue; 830 } 831 if( m->is_Phi() ) continue; 832 int m_cnt = ready_cnt.at(m->_idx) - 1; 833 ready_cnt.at_put(m->_idx, m_cnt); 834 if( m_cnt == 0 ) 835 worklist.push(m); 836 } 837 838 } 839 840 // Act as if the call defines the Frame Pointer. 841 // Certainly the FP is alive and well after the call. 842 regs.Insert(_matcher.c_frame_pointer()); 843 844 // Set all registers killed and not already defined by the call. 845 uint r_cnt = mcall->tf()->range()->cnt(); 846 int op = mcall->ideal_Opcode(); 847 MachProjNode *proj = new MachProjNode( mcall, r_cnt+1, RegMask::Empty, MachProjNode::fat_proj ); 848 map_node_to_block(proj, block); 849 block->insert_node(proj, node_cnt++); 850 851 // Select the right register save policy. 852 const char *save_policy = NULL; 853 switch (op) { 854 case Op_CallRuntime: 855 case Op_CallLeaf: 856 case Op_CallLeafNoFP: 857 // Calling C code so use C calling convention 858 save_policy = _matcher._c_reg_save_policy; 859 break; 860 861 case Op_CallStaticJava: 862 case Op_CallDynamicJava: 863 // Calling Java code so use Java calling convention 864 save_policy = _matcher._register_save_policy; 865 break; 866 867 default: 868 ShouldNotReachHere(); 869 } 870 871 // When using CallRuntime mark SOE registers as killed by the call 872 // so values that could show up in the RegisterMap aren't live in a 873 // callee saved register since the register wouldn't know where to 874 // find them. CallLeaf and CallLeafNoFP are ok because they can't 875 // have debug info on them. Strictly speaking this only needs to be 876 // done for oops since idealreg2debugmask takes care of debug info 877 // references but there no way to handle oops differently than other 878 // pointers as far as the kill mask goes. 879 bool exclude_soe = op == Op_CallRuntime; 880 881 // If the call is a MethodHandle invoke, we need to exclude the 882 // register which is used to save the SP value over MH invokes from 883 // the mask. Otherwise this register could be used for 884 // deoptimization information. 885 if (op == Op_CallStaticJava) { 886 MachCallStaticJavaNode* mcallstaticjava = (MachCallStaticJavaNode*) mcall; 887 if (mcallstaticjava->_method_handle_invoke) 888 proj->_rout.OR(Matcher::method_handle_invoke_SP_save_mask()); 889 } 890 891 add_call_kills(proj, regs, save_policy, exclude_soe); 892 893 return node_cnt; 894 } 895 896 897 //------------------------------schedule_local--------------------------------- 898 // Topological sort within a block. Someday become a real scheduler. 899 bool PhaseCFG::schedule_local(Block* block, GrowableArray<int>& ready_cnt, VectorSet& next_call, intptr_t *recalc_pressure_nodes) { 900 // Already "sorted" are the block start Node (as the first entry), and 901 // the block-ending Node and any trailing control projections. We leave 902 // these alone. PhiNodes and ParmNodes are made to follow the block start 903 // Node. Everything else gets topo-sorted. 904 905 #ifndef PRODUCT 906 if (trace_opto_pipelining()) { 907 tty->print_cr("# --- schedule_local B%d, before: ---", block->_pre_order); 908 for (uint i = 0;i < block->number_of_nodes(); i++) { 909 tty->print("# "); 910 block->get_node(i)->fast_dump(); 911 } 912 tty->print_cr("#"); 913 } 914 #endif 915 916 // RootNode is already sorted 917 if (block->number_of_nodes() == 1) { 918 return true; 919 } 920 921 bool block_size_threshold_ok = (block->number_of_nodes() > 10) ? true : false; 922 923 // We track the uses of local definitions as input dependences so that 924 // we know when a given instruction is avialable to be scheduled. 925 uint i; 926 if (OptoRegScheduling && block_size_threshold_ok) { 927 for (i = 1; i < block->number_of_nodes(); i++) { // setup nodes for pressure calc 928 Node *n = block->get_node(i); 929 n->remove_flag(Node::Flag_is_scheduled); 930 if (!n->is_Phi()) { 931 recalc_pressure_nodes[n->_idx] = 0x7fff7fff; 932 } 933 } 934 } 935 936 // Move PhiNodes and ParmNodes from 1 to cnt up to the start 937 uint node_cnt = block->end_idx(); 938 uint phi_cnt = 1; 939 for( i = 1; i<node_cnt; i++ ) { // Scan for Phi 940 Node *n = block->get_node(i); 941 if( n->is_Phi() || // Found a PhiNode or ParmNode 942 (n->is_Proj() && n->in(0) == block->head()) ) { 943 // Move guy at 'phi_cnt' to the end; makes a hole at phi_cnt 944 block->map_node(block->get_node(phi_cnt), i); 945 block->map_node(n, phi_cnt++); // swap Phi/Parm up front 946 if (OptoRegScheduling && block_size_threshold_ok) { 947 // mark n as scheduled 948 n->add_flag(Node::Flag_is_scheduled); 949 } 950 } else { // All others 951 // Count block-local inputs to 'n' 952 uint cnt = n->len(); // Input count 953 uint local = 0; 954 for( uint j=0; j<cnt; j++ ) { 955 Node *m = n->in(j); 956 if( m && get_block_for_node(m) == block && !m->is_top() ) 957 local++; // One more block-local input 958 } 959 ready_cnt.at_put(n->_idx, local); // Count em up 960 961 #ifdef ASSERT 962 if( UseConcMarkSweepGC || UseG1GC ) { 963 if( n->is_Mach() && n->as_Mach()->ideal_Opcode() == Op_StoreCM ) { 964 // Check the precedence edges 965 for (uint prec = n->req(); prec < n->len(); prec++) { 966 Node* oop_store = n->in(prec); 967 if (oop_store != NULL) { 968 assert(get_block_for_node(oop_store)->_dom_depth <= block->_dom_depth, "oop_store must dominate card-mark"); 969 } 970 } 971 } 972 } 973 #endif 974 975 // A few node types require changing a required edge to a precedence edge 976 // before allocation. 977 if( n->is_Mach() && n->req() > TypeFunc::Parms && 978 (n->as_Mach()->ideal_Opcode() == Op_MemBarAcquire || 979 n->as_Mach()->ideal_Opcode() == Op_MemBarVolatile) ) { 980 // MemBarAcquire could be created without Precedent edge. 981 // del_req() replaces the specified edge with the last input edge 982 // and then removes the last edge. If the specified edge > number of 983 // edges the last edge will be moved outside of the input edges array 984 // and the edge will be lost. This is why this code should be 985 // executed only when Precedent (== TypeFunc::Parms) edge is present. 986 Node *x = n->in(TypeFunc::Parms); 987 if (x != NULL && get_block_for_node(x) == block && n->find_prec_edge(x) != -1) { 988 // Old edge to node within same block will get removed, but no precedence 989 // edge will get added because it already exists. Update ready count. 990 int cnt = ready_cnt.at(n->_idx); 991 assert(cnt > 1, "MemBar node %d must not get ready here", n->_idx); 992 ready_cnt.at_put(n->_idx, cnt-1); 993 } 994 n->del_req(TypeFunc::Parms); 995 n->add_prec(x); 996 } 997 } 998 } 999 for(uint i2=i; i2< block->number_of_nodes(); i2++ ) // Trailing guys get zapped count 1000 ready_cnt.at_put(block->get_node(i2)->_idx, 0); 1001 1002 // All the prescheduled guys do not hold back internal nodes 1003 uint i3; 1004 for (i3 = 0; i3 < phi_cnt; i3++) { // For all pre-scheduled 1005 Node *n = block->get_node(i3); // Get pre-scheduled 1006 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) { 1007 Node* m = n->fast_out(j); 1008 if (get_block_for_node(m) == block) { // Local-block user 1009 int m_cnt = ready_cnt.at(m->_idx)-1; 1010 if (OptoRegScheduling && block_size_threshold_ok) { 1011 // mark m as scheduled 1012 if (m_cnt < 0) { 1013 m->add_flag(Node::Flag_is_scheduled); 1014 } 1015 } 1016 ready_cnt.at_put(m->_idx, m_cnt); // Fix ready count 1017 } 1018 } 1019 } 1020 1021 Node_List delay; 1022 // Make a worklist 1023 Node_List worklist; 1024 for(uint i4=i3; i4<node_cnt; i4++ ) { // Put ready guys on worklist 1025 Node *m = block->get_node(i4); 1026 if( !ready_cnt.at(m->_idx) ) { // Zero ready count? 1027 if (m->is_iteratively_computed()) { 1028 // Push induction variable increments last to allow other uses 1029 // of the phi to be scheduled first. The select() method breaks 1030 // ties in scheduling by worklist order. 1031 delay.push(m); 1032 } else if (m->is_Mach() && m->as_Mach()->ideal_Opcode() == Op_CreateEx) { 1033 // Force the CreateEx to the top of the list so it's processed 1034 // first and ends up at the start of the block. 1035 worklist.insert(0, m); 1036 } else { 1037 worklist.push(m); // Then on to worklist! 1038 } 1039 } 1040 } 1041 while (delay.size()) { 1042 Node* d = delay.pop(); 1043 worklist.push(d); 1044 } 1045 1046 if (OptoRegScheduling && block_size_threshold_ok) { 1047 // To stage register pressure calculations we need to examine the live set variables 1048 // breaking them up by register class to compartmentalize the calculations. 1049 uint float_pressure = Matcher::float_pressure(FLOATPRESSURE); 1050 _regalloc->_sched_int_pressure.init(INTPRESSURE); 1051 _regalloc->_sched_float_pressure.init(float_pressure); 1052 _regalloc->_scratch_int_pressure.init(INTPRESSURE); 1053 _regalloc->_scratch_float_pressure.init(float_pressure); 1054 1055 _regalloc->compute_entry_block_pressure(block); 1056 } 1057 1058 // Warm up the 'next_call' heuristic bits 1059 needed_for_next_call(block, block->head(), next_call); 1060 1061 #ifndef PRODUCT 1062 if (trace_opto_pipelining()) { 1063 for (uint j=0; j< block->number_of_nodes(); j++) { 1064 Node *n = block->get_node(j); 1065 int idx = n->_idx; 1066 tty->print("# ready cnt:%3d ", ready_cnt.at(idx)); 1067 tty->print("latency:%3d ", get_latency_for_node(n)); 1068 tty->print("%4d: %s\n", idx, n->Name()); 1069 } 1070 } 1071 #endif 1072 1073 uint max_idx = (uint)ready_cnt.length(); 1074 // Pull from worklist and schedule 1075 while( worklist.size() ) { // Worklist is not ready 1076 1077 #ifndef PRODUCT 1078 if (trace_opto_pipelining()) { 1079 tty->print("# ready list:"); 1080 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist 1081 Node *n = worklist[i]; // Get Node on worklist 1082 tty->print(" %d", n->_idx); 1083 } 1084 tty->cr(); 1085 } 1086 #endif 1087 1088 // Select and pop a ready guy from worklist 1089 Node* n = select(block, worklist, ready_cnt, next_call, phi_cnt, recalc_pressure_nodes); 1090 block->map_node(n, phi_cnt++); // Schedule him next 1091 1092 if (OptoRegScheduling && block_size_threshold_ok) { 1093 n->add_flag(Node::Flag_is_scheduled); 1094 1095 // Now adjust the resister pressure with the node we selected 1096 if (!n->is_Phi()) { 1097 adjust_register_pressure(n, block, recalc_pressure_nodes, true); 1098 } 1099 } 1100 1101 #ifndef PRODUCT 1102 if (trace_opto_pipelining()) { 1103 tty->print("# select %d: %s", n->_idx, n->Name()); 1104 tty->print(", latency:%d", get_latency_for_node(n)); 1105 n->dump(); 1106 if (Verbose) { 1107 tty->print("# ready list:"); 1108 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist 1109 Node *n = worklist[i]; // Get Node on worklist 1110 tty->print(" %d", n->_idx); 1111 } 1112 tty->cr(); 1113 } 1114 } 1115 1116 #endif 1117 if( n->is_MachCall() ) { 1118 MachCallNode *mcall = n->as_MachCall(); 1119 phi_cnt = sched_call(block, phi_cnt, worklist, ready_cnt, mcall, next_call); 1120 continue; 1121 } 1122 1123 if (n->is_Mach() && n->as_Mach()->has_call()) { 1124 RegMask regs; 1125 regs.Insert(_matcher.c_frame_pointer()); 1126 regs.OR(n->out_RegMask()); 1127 1128 MachProjNode *proj = new MachProjNode( n, 1, RegMask::Empty, MachProjNode::fat_proj ); 1129 map_node_to_block(proj, block); 1130 block->insert_node(proj, phi_cnt++); 1131 1132 add_call_kills(proj, regs, _matcher._c_reg_save_policy, false); 1133 } 1134 1135 // Children are now all ready 1136 for (DUIterator_Fast i5max, i5 = n->fast_outs(i5max); i5 < i5max; i5++) { 1137 Node* m = n->fast_out(i5); // Get user 1138 if (get_block_for_node(m) != block) { 1139 continue; 1140 } 1141 if( m->is_Phi() ) continue; 1142 if (m->_idx >= max_idx) { // new node, skip it 1143 assert(m->is_MachProj() && n->is_Mach() && n->as_Mach()->has_call(), "unexpected node types"); 1144 continue; 1145 } 1146 int m_cnt = ready_cnt.at(m->_idx) - 1; 1147 ready_cnt.at_put(m->_idx, m_cnt); 1148 if( m_cnt == 0 ) 1149 worklist.push(m); 1150 } 1151 } 1152 1153 if( phi_cnt != block->end_idx() ) { 1154 // did not schedule all. Retry, Bailout, or Die 1155 if (C->subsume_loads() == true && !C->failing()) { 1156 // Retry with subsume_loads == false 1157 // If this is the first failure, the sentinel string will "stick" 1158 // to the Compile object, and the C2Compiler will see it and retry. 1159 C->record_failure(C2Compiler::retry_no_subsuming_loads()); 1160 } else { 1161 assert(false, "graph should be schedulable"); 1162 } 1163 // assert( phi_cnt == end_idx(), "did not schedule all" ); 1164 return false; 1165 } 1166 1167 if (OptoRegScheduling && block_size_threshold_ok) { 1168 _regalloc->compute_exit_block_pressure(block); 1169 block->_reg_pressure = _regalloc->_sched_int_pressure.final_pressure(); 1170 block->_freg_pressure = _regalloc->_sched_float_pressure.final_pressure(); 1171 } 1172 1173 #ifndef PRODUCT 1174 if (trace_opto_pipelining()) { 1175 tty->print_cr("#"); 1176 tty->print_cr("# after schedule_local"); 1177 for (uint i = 0;i < block->number_of_nodes();i++) { 1178 tty->print("# "); 1179 block->get_node(i)->fast_dump(); 1180 } 1181 tty->print_cr("# "); 1182 1183 if (OptoRegScheduling && block_size_threshold_ok) { 1184 tty->print_cr("# pressure info : %d", block->_pre_order); 1185 _regalloc->print_pressure_info(_regalloc->_sched_int_pressure, "int register info"); 1186 _regalloc->print_pressure_info(_regalloc->_sched_float_pressure, "float register info"); 1187 } 1188 tty->cr(); 1189 } 1190 #endif 1191 1192 return true; 1193 } 1194 1195 //--------------------------catch_cleanup_fix_all_inputs----------------------- 1196 static void catch_cleanup_fix_all_inputs(Node *use, Node *old_def, Node *new_def) { 1197 for (uint l = 0; l < use->len(); l++) { 1198 if (use->in(l) == old_def) { 1199 if (l < use->req()) { 1200 use->set_req(l, new_def); 1201 } else { 1202 use->rm_prec(l); 1203 use->add_prec(new_def); 1204 l--; 1205 } 1206 } 1207 } 1208 } 1209 1210 //------------------------------catch_cleanup_find_cloned_def------------------ 1211 Node* PhaseCFG::catch_cleanup_find_cloned_def(Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) { 1212 assert( use_blk != def_blk, "Inter-block cleanup only"); 1213 1214 // The use is some block below the Catch. Find and return the clone of the def 1215 // that dominates the use. If there is no clone in a dominating block, then 1216 // create a phi for the def in a dominating block. 1217 1218 // Find which successor block dominates this use. The successor 1219 // blocks must all be single-entry (from the Catch only; I will have 1220 // split blocks to make this so), hence they all dominate. 1221 while( use_blk->_dom_depth > def_blk->_dom_depth+1 ) 1222 use_blk = use_blk->_idom; 1223 1224 // Find the successor 1225 Node *fixup = NULL; 1226 1227 uint j; 1228 for( j = 0; j < def_blk->_num_succs; j++ ) 1229 if( use_blk == def_blk->_succs[j] ) 1230 break; 1231 1232 if( j == def_blk->_num_succs ) { 1233 // Block at same level in dom-tree is not a successor. It needs a 1234 // PhiNode, the PhiNode uses from the def and IT's uses need fixup. 1235 Node_Array inputs = new Node_List(Thread::current()->resource_area()); 1236 for(uint k = 1; k < use_blk->num_preds(); k++) { 1237 Block* block = get_block_for_node(use_blk->pred(k)); 1238 inputs.map(k, catch_cleanup_find_cloned_def(block, def, def_blk, n_clone_idx)); 1239 } 1240 1241 // Check to see if the use_blk already has an identical phi inserted. 1242 // If it exists, it will be at the first position since all uses of a 1243 // def are processed together. 1244 Node *phi = use_blk->get_node(1); 1245 if( phi->is_Phi() ) { 1246 fixup = phi; 1247 for (uint k = 1; k < use_blk->num_preds(); k++) { 1248 if (phi->in(k) != inputs[k]) { 1249 // Not a match 1250 fixup = NULL; 1251 break; 1252 } 1253 } 1254 } 1255 1256 // If an existing PhiNode was not found, make a new one. 1257 if (fixup == NULL) { 1258 Node *new_phi = PhiNode::make(use_blk->head(), def); 1259 use_blk->insert_node(new_phi, 1); 1260 map_node_to_block(new_phi, use_blk); 1261 for (uint k = 1; k < use_blk->num_preds(); k++) { 1262 new_phi->set_req(k, inputs[k]); 1263 } 1264 fixup = new_phi; 1265 } 1266 1267 } else { 1268 // Found the use just below the Catch. Make it use the clone. 1269 fixup = use_blk->get_node(n_clone_idx); 1270 } 1271 1272 return fixup; 1273 } 1274 1275 //--------------------------catch_cleanup_intra_block-------------------------- 1276 // Fix all input edges in use that reference "def". The use is in the same 1277 // block as the def and both have been cloned in each successor block. 1278 static void catch_cleanup_intra_block(Node *use, Node *def, Block *blk, int beg, int n_clone_idx) { 1279 1280 // Both the use and def have been cloned. For each successor block, 1281 // get the clone of the use, and make its input the clone of the def 1282 // found in that block. 1283 1284 uint use_idx = blk->find_node(use); 1285 uint offset_idx = use_idx - beg; 1286 for( uint k = 0; k < blk->_num_succs; k++ ) { 1287 // Get clone in each successor block 1288 Block *sb = blk->_succs[k]; 1289 Node *clone = sb->get_node(offset_idx+1); 1290 assert( clone->Opcode() == use->Opcode(), "" ); 1291 1292 // Make use-clone reference the def-clone 1293 catch_cleanup_fix_all_inputs(clone, def, sb->get_node(n_clone_idx)); 1294 } 1295 } 1296 1297 //------------------------------catch_cleanup_inter_block--------------------- 1298 // Fix all input edges in use that reference "def". The use is in a different 1299 // block than the def. 1300 void PhaseCFG::catch_cleanup_inter_block(Node *use, Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) { 1301 if( !use_blk ) return; // Can happen if the use is a precedence edge 1302 1303 Node *new_def = catch_cleanup_find_cloned_def(use_blk, def, def_blk, n_clone_idx); 1304 catch_cleanup_fix_all_inputs(use, def, new_def); 1305 } 1306 1307 //------------------------------call_catch_cleanup----------------------------- 1308 // If we inserted any instructions between a Call and his CatchNode, 1309 // clone the instructions on all paths below the Catch. 1310 void PhaseCFG::call_catch_cleanup(Block* block) { 1311 1312 // End of region to clone 1313 uint end = block->end_idx(); 1314 if( !block->get_node(end)->is_Catch() ) return; 1315 // Start of region to clone 1316 uint beg = end; 1317 while(!block->get_node(beg-1)->is_MachProj() || 1318 !block->get_node(beg-1)->in(0)->is_MachCall() ) { 1319 beg--; 1320 assert(beg > 0,"Catch cleanup walking beyond block boundary"); 1321 } 1322 // Range of inserted instructions is [beg, end) 1323 if( beg == end ) return; 1324 1325 // Clone along all Catch output paths. Clone area between the 'beg' and 1326 // 'end' indices. 1327 for( uint i = 0; i < block->_num_succs; i++ ) { 1328 Block *sb = block->_succs[i]; 1329 // Clone the entire area; ignoring the edge fixup for now. 1330 for( uint j = end; j > beg; j-- ) { 1331 Node *clone = block->get_node(j-1)->clone(); 1332 sb->insert_node(clone, 1); 1333 map_node_to_block(clone, sb); 1334 if (clone->needs_anti_dependence_check()) { 1335 insert_anti_dependences(sb, clone); 1336 } 1337 } 1338 } 1339 1340 1341 // Fixup edges. Check the def-use info per cloned Node 1342 for(uint i2 = beg; i2 < end; i2++ ) { 1343 uint n_clone_idx = i2-beg+1; // Index of clone of n in each successor block 1344 Node *n = block->get_node(i2); // Node that got cloned 1345 // Need DU safe iterator because of edge manipulation in calls. 1346 Unique_Node_List *out = new Unique_Node_List(Thread::current()->resource_area()); 1347 for (DUIterator_Fast j1max, j1 = n->fast_outs(j1max); j1 < j1max; j1++) { 1348 out->push(n->fast_out(j1)); 1349 } 1350 uint max = out->size(); 1351 for (uint j = 0; j < max; j++) {// For all users 1352 Node *use = out->pop(); 1353 Block *buse = get_block_for_node(use); 1354 if( use->is_Phi() ) { 1355 for( uint k = 1; k < use->req(); k++ ) 1356 if( use->in(k) == n ) { 1357 Block* b = get_block_for_node(buse->pred(k)); 1358 Node *fixup = catch_cleanup_find_cloned_def(b, n, block, n_clone_idx); 1359 use->set_req(k, fixup); 1360 } 1361 } else { 1362 if (block == buse) { 1363 catch_cleanup_intra_block(use, n, block, beg, n_clone_idx); 1364 } else { 1365 catch_cleanup_inter_block(use, buse, n, block, n_clone_idx); 1366 } 1367 } 1368 } // End for all users 1369 1370 } // End of for all Nodes in cloned area 1371 1372 // Remove the now-dead cloned ops 1373 for(uint i3 = beg; i3 < end; i3++ ) { 1374 block->get_node(beg)->disconnect_inputs(NULL, C); 1375 block->remove_node(beg); 1376 } 1377 1378 // If the successor blocks have a CreateEx node, move it back to the top 1379 for(uint i4 = 0; i4 < block->_num_succs; i4++ ) { 1380 Block *sb = block->_succs[i4]; 1381 uint new_cnt = end - beg; 1382 // Remove any newly created, but dead, nodes. 1383 for( uint j = new_cnt; j > 0; j-- ) { 1384 Node *n = sb->get_node(j); 1385 if (n->outcnt() == 0 && 1386 (!n->is_Proj() || n->as_Proj()->in(0)->outcnt() == 1) ){ 1387 n->disconnect_inputs(NULL, C); 1388 sb->remove_node(j); 1389 new_cnt--; 1390 } 1391 } 1392 // If any newly created nodes remain, move the CreateEx node to the top 1393 if (new_cnt > 0) { 1394 Node *cex = sb->get_node(1+new_cnt); 1395 if( cex->is_Mach() && cex->as_Mach()->ideal_Opcode() == Op_CreateEx ) { 1396 sb->remove_node(1+new_cnt); 1397 sb->insert_node(cex, 1); 1398 } 1399 } 1400 } 1401 }