1 /*
2 * Copyright (c) 2005, 2018, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "c1/c1_Compilation.hpp"
27 #include "c1/c1_FrameMap.hpp"
28 #include "c1/c1_Instruction.hpp"
29 #include "c1/c1_LIRAssembler.hpp"
30 #include "c1/c1_LIRGenerator.hpp"
31 #include "c1/c1_Runtime1.hpp"
32 #include "c1/c1_ValueStack.hpp"
33 #include "ci/ciArray.hpp"
34 #include "ci/ciObjArrayKlass.hpp"
35 #include "ci/ciTypeArrayKlass.hpp"
36 #include "runtime/sharedRuntime.hpp"
37 #include "runtime/stubRoutines.hpp"
38 #include "vmreg_x86.inline.hpp"
39
40 #ifdef ASSERT
41 #define __ gen()->lir(__FILE__, __LINE__)->
42 #else
43 #define __ gen()->lir()->
44 #endif
45
46 // Item will be loaded into a byte register; Intel only
47 void LIRItem::load_byte_item() {
48 load_item();
49 LIR_Opr res = result();
50
51 if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
52 // make sure that it is a byte register
53 assert(!value()->type()->is_float() && !value()->type()->is_double(),
54 "can't load floats in byte register");
55 LIR_Opr reg = _gen->rlock_byte(T_BYTE);
56 __ move(res, reg);
57
58 _result = reg;
59 }
60 }
61
62
63 void LIRItem::load_nonconstant() {
64 LIR_Opr r = value()->operand();
65 if (r->is_constant()) {
66 _result = r;
67 } else {
68 load_item();
69 }
70 }
71
72 //--------------------------------------------------------------
73 // LIRGenerator
74 //--------------------------------------------------------------
75
76
77 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }
78 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; }
79 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; }
80 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; }
81 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; }
82 LIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; }
83 LIR_Opr LIRGenerator::syncLockOpr() { return new_register(T_INT); }
84 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; }
85 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; }
86
87
88 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
89 LIR_Opr opr;
90 switch (type->tag()) {
91 case intTag: opr = FrameMap::rax_opr; break;
92 case objectTag: opr = FrameMap::rax_oop_opr; break;
93 case longTag: opr = FrameMap::long0_opr; break;
94 case floatTag: opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr : FrameMap::fpu0_float_opr; break;
95 case doubleTag: opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr; break;
96
97 case addressTag:
98 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
99 }
100
101 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
102 return opr;
103 }
104
105
106 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
107 LIR_Opr reg = new_register(T_INT);
108 set_vreg_flag(reg, LIRGenerator::byte_reg);
109 return reg;
110 }
111
112
113 //--------- loading items into registers --------------------------------
114
115
116 // i486 instructions can inline constants
117 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
118 if (type == T_SHORT || type == T_CHAR) {
119 // there is no immediate move of word values in asembler_i486.?pp
120 return false;
121 }
122 Constant* c = v->as_Constant();
123 if (c && c->state_before() == NULL) {
124 // constants of any type can be stored directly, except for
125 // unloaded object constants.
126 return true;
127 }
128 return false;
129 }
130
131
132 bool LIRGenerator::can_inline_as_constant(Value v) const {
133 if (v->type()->tag() == longTag) return false;
134 return v->type()->tag() != objectTag ||
135 (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());
136 }
137
138
139 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
140 if (c->type() == T_LONG) return false;
141 return c->type() != T_OBJECT || c->as_jobject() == NULL;
142 }
143
144
145 LIR_Opr LIRGenerator::safepoint_poll_register() {
146 NOT_LP64( if (SafepointMechanism::uses_thread_local_poll()) { return new_register(T_ADDRESS); } )
147 return LIR_OprFact::illegalOpr;
148 }
149
150
151 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
152 int shift, int disp, BasicType type) {
153 assert(base->is_register(), "must be");
154 if (index->is_constant()) {
155 return new LIR_Address(base,
156 ((intx)(index->as_constant_ptr()->as_jint()) << shift) + disp,
157 type);
158 } else {
159 return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
160 }
161 }
162
163
164 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
165 BasicType type, bool needs_card_mark) {
166 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
167
168 LIR_Address* addr;
169 if (index_opr->is_constant()) {
170 int elem_size = type2aelembytes(type);
171 addr = new LIR_Address(array_opr,
172 offset_in_bytes + (intx)(index_opr->as_jint()) * elem_size, type);
173 } else {
174 #ifdef _LP64
175 if (index_opr->type() == T_INT) {
176 LIR_Opr tmp = new_register(T_LONG);
177 __ convert(Bytecodes::_i2l, index_opr, tmp);
178 index_opr = tmp;
179 }
180 #endif // _LP64
181 addr = new LIR_Address(array_opr,
182 index_opr,
183 LIR_Address::scale(type),
184 offset_in_bytes, type);
185 }
186 if (needs_card_mark) {
187 // This store will need a precise card mark, so go ahead and
188 // compute the full adddres instead of computing once for the
189 // store and again for the card mark.
190 LIR_Opr tmp = new_pointer_register();
191 __ leal(LIR_OprFact::address(addr), tmp);
192 return new LIR_Address(tmp, type);
193 } else {
194 return addr;
195 }
196 }
197
198
199 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
200 LIR_Opr r = NULL;
201 if (type == T_LONG) {
202 r = LIR_OprFact::longConst(x);
203 } else if (type == T_INT) {
204 r = LIR_OprFact::intConst(x);
205 } else {
206 ShouldNotReachHere();
207 }
208 return r;
209 }
210
211 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
212 LIR_Opr pointer = new_pointer_register();
213 __ move(LIR_OprFact::intptrConst(counter), pointer);
214 LIR_Address* addr = new LIR_Address(pointer, type);
215 increment_counter(addr, step);
216 }
217
218
219 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
220 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
221 }
222
223 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
224 __ cmp_mem_int(condition, base, disp, c, info);
225 }
226
227
228 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
229 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
230 }
231
232
233 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) {
234 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
235 }
236
237
238 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) {
239 if (tmp->is_valid() && c > 0 && c < max_jint) {
240 if (is_power_of_2(c + 1)) {
241 __ move(left, tmp);
242 __ shift_left(left, log2_intptr(c + 1), left);
243 __ sub(left, tmp, result);
244 return true;
245 } else if (is_power_of_2(c - 1)) {
246 __ move(left, tmp);
247 __ shift_left(left, log2_intptr(c - 1), left);
248 __ add(left, tmp, result);
249 return true;
250 }
251 }
252 return false;
253 }
254
255
256 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
257 BasicType type = item->type();
258 __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));
259 }
260
261 //----------------------------------------------------------------------
262 // visitor functions
263 //----------------------------------------------------------------------
264
265
266 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) {
267 assert(x->is_pinned(),"");
268 bool needs_range_check = x->compute_needs_range_check();
269 bool use_length = x->length() != NULL;
270 bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT;
271 bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL ||
272 !get_jobject_constant(x->value())->is_null_object() ||
273 x->should_profile());
274
275 LIRItem array(x->array(), this);
276 LIRItem index(x->index(), this);
277 LIRItem value(x->value(), this);
278 LIRItem length(this);
279
280 array.load_item();
281 index.load_nonconstant();
282
283 if (use_length && needs_range_check) {
284 length.set_instruction(x->length());
285 length.load_item();
286
287 }
288 if (needs_store_check || x->check_boolean()) {
289 value.load_item();
290 } else {
291 value.load_for_store(x->elt_type());
292 }
293
294 set_no_result(x);
295
296 // the CodeEmitInfo must be duplicated for each different
297 // LIR-instruction because spilling can occur anywhere between two
298 // instructions and so the debug information must be different
299 CodeEmitInfo* range_check_info = state_for(x);
300 CodeEmitInfo* null_check_info = NULL;
301 if (x->needs_null_check()) {
302 null_check_info = new CodeEmitInfo(range_check_info);
303 }
304
305 // emit array address setup early so it schedules better
306 LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);
307
308 if (GenerateRangeChecks && needs_range_check) {
309 if (use_length) {
310 __ cmp(lir_cond_belowEqual, length.result(), index.result());
311 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
312 } else {
313 array_range_check(array.result(), index.result(), null_check_info, range_check_info);
314 // range_check also does the null check
315 null_check_info = NULL;
316 }
317 }
318
319 if (GenerateArrayStoreCheck && needs_store_check) {
320 LIR_Opr tmp1 = new_register(objectType);
321 LIR_Opr tmp2 = new_register(objectType);
322 LIR_Opr tmp3 = new_register(objectType);
323
324 CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
325 __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info, x->profiled_method(), x->profiled_bci());
326 }
327
328 if (obj_store) {
329 // Needs GC write barriers.
330 pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */,
331 true /* do_load */, false /* patch */, NULL);
332 __ move(value.result(), array_addr, null_check_info);
333 // Seems to be a precise
334 post_barrier(LIR_OprFact::address(array_addr), value.result());
335 } else {
336 LIR_Opr result = maybe_mask_boolean(x, array.result(), value.result(), null_check_info);
337 __ move(result, array_addr, null_check_info);
338 }
339 }
340
341
342 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
343 assert(x->is_pinned(),"");
344 LIRItem obj(x->obj(), this);
345 obj.load_item();
346
347 set_no_result(x);
348
349 // "lock" stores the address of the monitor stack slot, so this is not an oop
350 LIR_Opr lock = new_register(T_INT);
351 // Need a scratch register for biased locking on x86
352 LIR_Opr scratch = LIR_OprFact::illegalOpr;
353 if (UseBiasedLocking) {
354 scratch = new_register(T_INT);
355 }
356
357 CodeEmitInfo* info_for_exception = NULL;
358 if (x->needs_null_check()) {
359 info_for_exception = state_for(x);
360 }
361 // this CodeEmitInfo must not have the xhandlers because here the
362 // object is already locked (xhandlers expect object to be unlocked)
363 CodeEmitInfo* info = state_for(x, x->state(), true);
364 monitor_enter(obj.result(), lock, syncTempOpr(), scratch,
365 x->monitor_no(), info_for_exception, info);
366 }
367
368
369 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
370 assert(x->is_pinned(),"");
371
372 LIRItem obj(x->obj(), this);
373 obj.dont_load_item();
374
375 LIR_Opr lock = new_register(T_INT);
376 LIR_Opr obj_temp = new_register(T_INT);
377 set_no_result(x);
378 monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no());
379 }
380
381
382 // _ineg, _lneg, _fneg, _dneg
383 void LIRGenerator::do_NegateOp(NegateOp* x) {
384 LIRItem value(x->x(), this);
385 value.set_destroys_register();
386 value.load_item();
387 LIR_Opr reg = rlock(x);
388 __ negate(value.result(), reg);
389
390 set_result(x, round_item(reg));
391 }
392
393
394 // for _fadd, _fmul, _fsub, _fdiv, _frem
395 // _dadd, _dmul, _dsub, _ddiv, _drem
396 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
397 LIRItem left(x->x(), this);
398 LIRItem right(x->y(), this);
399 LIRItem* left_arg = &left;
400 LIRItem* right_arg = &right;
401 assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");
402 bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);
403 if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {
404 left.load_item();
405 } else {
406 left.dont_load_item();
407 }
408
409 // do not load right operand if it is a constant. only 0 and 1 are
410 // loaded because there are special instructions for loading them
411 // without memory access (not needed for SSE2 instructions)
412 bool must_load_right = false;
413 if (right.is_constant()) {
414 LIR_Const* c = right.result()->as_constant_ptr();
415 assert(c != NULL, "invalid constant");
416 assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type");
417
418 if (c->type() == T_FLOAT) {
419 must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float());
420 } else {
421 must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double());
422 }
423 }
424
425 if (must_load_both) {
426 // frem and drem destroy also right operand, so move it to a new register
427 right.set_destroys_register();
428 right.load_item();
429 } else if (right.is_register() || must_load_right) {
430 right.load_item();
431 } else {
432 right.dont_load_item();
433 }
434 LIR_Opr reg = rlock(x);
435 LIR_Opr tmp = LIR_OprFact::illegalOpr;
436 if (x->is_strictfp() && (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv)) {
437 tmp = new_register(T_DOUBLE);
438 }
439
440 if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) {
441 // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots
442 LIR_Opr fpu0, fpu1;
443 if (x->op() == Bytecodes::_frem) {
444 fpu0 = LIR_OprFact::single_fpu(0);
445 fpu1 = LIR_OprFact::single_fpu(1);
446 } else {
447 fpu0 = LIR_OprFact::double_fpu(0);
448 fpu1 = LIR_OprFact::double_fpu(1);
449 }
450 __ move(right.result(), fpu1); // order of left and right operand is important!
451 __ move(left.result(), fpu0);
452 __ rem (fpu0, fpu1, fpu0);
453 __ move(fpu0, reg);
454
455 } else {
456 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp);
457 }
458
459 set_result(x, round_item(reg));
460 }
461
462
463 // for _ladd, _lmul, _lsub, _ldiv, _lrem
464 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
465 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) {
466 // long division is implemented as a direct call into the runtime
467 LIRItem left(x->x(), this);
468 LIRItem right(x->y(), this);
469
470 // the check for division by zero destroys the right operand
471 right.set_destroys_register();
472
473 BasicTypeList signature(2);
474 signature.append(T_LONG);
475 signature.append(T_LONG);
476 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
477
478 // check for division by zero (destroys registers of right operand!)
479 CodeEmitInfo* info = state_for(x);
480
481 const LIR_Opr result_reg = result_register_for(x->type());
482 left.load_item_force(cc->at(1));
483 right.load_item();
484
485 __ move(right.result(), cc->at(0));
486
487 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
488 __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info));
489
490 address entry = NULL;
491 switch (x->op()) {
492 case Bytecodes::_lrem:
493 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
494 break; // check if dividend is 0 is done elsewhere
495 case Bytecodes::_ldiv:
496 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
497 break; // check if dividend is 0 is done elsewhere
498 case Bytecodes::_lmul:
499 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul);
500 break;
501 default:
502 ShouldNotReachHere();
503 }
504
505 LIR_Opr result = rlock_result(x);
506 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
507 __ move(result_reg, result);
508 } else if (x->op() == Bytecodes::_lmul) {
509 // missing test if instr is commutative and if we should swap
510 LIRItem left(x->x(), this);
511 LIRItem right(x->y(), this);
512
513 // right register is destroyed by the long mul, so it must be
514 // copied to a new register.
515 right.set_destroys_register();
516
517 left.load_item();
518 right.load_item();
519
520 LIR_Opr reg = FrameMap::long0_opr;
521 arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL);
522 LIR_Opr result = rlock_result(x);
523 __ move(reg, result);
524 } else {
525 // missing test if instr is commutative and if we should swap
526 LIRItem left(x->x(), this);
527 LIRItem right(x->y(), this);
528
529 left.load_item();
530 // don't load constants to save register
531 right.load_nonconstant();
532 rlock_result(x);
533 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
534 }
535 }
536
537
538
539 // for: _iadd, _imul, _isub, _idiv, _irem
540 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
541 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
542 // The requirements for division and modulo
543 // input : rax,: dividend min_int
544 // reg: divisor (may not be rax,/rdx) -1
545 //
546 // output: rax,: quotient (= rax, idiv reg) min_int
547 // rdx: remainder (= rax, irem reg) 0
548
549 // rax, and rdx will be destroyed
550
551 // Note: does this invalidate the spec ???
552 LIRItem right(x->y(), this);
553 LIRItem left(x->x() , this); // visit left second, so that the is_register test is valid
554
555 // call state_for before load_item_force because state_for may
556 // force the evaluation of other instructions that are needed for
557 // correct debug info. Otherwise the live range of the fix
558 // register might be too long.
559 CodeEmitInfo* info = state_for(x);
560
561 left.load_item_force(divInOpr());
562
563 right.load_item();
564
565 LIR_Opr result = rlock_result(x);
566 LIR_Opr result_reg;
567 if (x->op() == Bytecodes::_idiv) {
568 result_reg = divOutOpr();
569 } else {
570 result_reg = remOutOpr();
571 }
572
573 if (!ImplicitDiv0Checks) {
574 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
575 __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info));
576 // Idiv/irem cannot trap (passing info would generate an assertion).
577 info = NULL;
578 }
579 LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation
580 if (x->op() == Bytecodes::_irem) {
581 __ irem(left.result(), right.result(), result_reg, tmp, info);
582 } else if (x->op() == Bytecodes::_idiv) {
583 __ idiv(left.result(), right.result(), result_reg, tmp, info);
584 } else {
585 ShouldNotReachHere();
586 }
587
588 __ move(result_reg, result);
589 } else {
590 // missing test if instr is commutative and if we should swap
591 LIRItem left(x->x(), this);
592 LIRItem right(x->y(), this);
593 LIRItem* left_arg = &left;
594 LIRItem* right_arg = &right;
595 if (x->is_commutative() && left.is_stack() && right.is_register()) {
596 // swap them if left is real stack (or cached) and right is real register(not cached)
597 left_arg = &right;
598 right_arg = &left;
599 }
600
601 left_arg->load_item();
602
603 // do not need to load right, as we can handle stack and constants
604 if (x->op() == Bytecodes::_imul ) {
605 // check if we can use shift instead
606 bool use_constant = false;
607 bool use_tmp = false;
608 if (right_arg->is_constant()) {
609 jint iconst = right_arg->get_jint_constant();
610 if (iconst > 0 && iconst < max_jint) {
611 if (is_power_of_2(iconst)) {
612 use_constant = true;
613 } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {
614 use_constant = true;
615 use_tmp = true;
616 }
617 }
618 }
619 if (use_constant) {
620 right_arg->dont_load_item();
621 } else {
622 right_arg->load_item();
623 }
624 LIR_Opr tmp = LIR_OprFact::illegalOpr;
625 if (use_tmp) {
626 tmp = new_register(T_INT);
627 }
628 rlock_result(x);
629
630 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
631 } else {
632 right_arg->dont_load_item();
633 rlock_result(x);
634 LIR_Opr tmp = LIR_OprFact::illegalOpr;
635 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
636 }
637 }
638 }
639
640
641 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
642 // when an operand with use count 1 is the left operand, then it is
643 // likely that no move for 2-operand-LIR-form is necessary
644 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
645 x->swap_operands();
646 }
647
648 ValueTag tag = x->type()->tag();
649 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
650 switch (tag) {
651 case floatTag:
652 case doubleTag: do_ArithmeticOp_FPU(x); return;
653 case longTag: do_ArithmeticOp_Long(x); return;
654 case intTag: do_ArithmeticOp_Int(x); return;
655 default: ShouldNotReachHere(); return;
656 }
657 }
658
659
660 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
661 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
662 // count must always be in rcx
663 LIRItem value(x->x(), this);
664 LIRItem count(x->y(), this);
665
666 ValueTag elemType = x->type()->tag();
667 bool must_load_count = !count.is_constant() || elemType == longTag;
668 if (must_load_count) {
669 // count for long must be in register
670 count.load_item_force(shiftCountOpr());
671 } else {
672 count.dont_load_item();
673 }
674 value.load_item();
675 LIR_Opr reg = rlock_result(x);
676
677 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
678 }
679
680
681 // _iand, _land, _ior, _lor, _ixor, _lxor
682 void LIRGenerator::do_LogicOp(LogicOp* x) {
683 // when an operand with use count 1 is the left operand, then it is
684 // likely that no move for 2-operand-LIR-form is necessary
685 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
686 x->swap_operands();
687 }
688
689 LIRItem left(x->x(), this);
690 LIRItem right(x->y(), this);
691
692 left.load_item();
693 right.load_nonconstant();
694 LIR_Opr reg = rlock_result(x);
695
696 logic_op(x->op(), reg, left.result(), right.result());
697 }
698
699
700
701 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
702 void LIRGenerator::do_CompareOp(CompareOp* x) {
703 LIRItem left(x->x(), this);
704 LIRItem right(x->y(), this);
705 ValueTag tag = x->x()->type()->tag();
706 if (tag == longTag) {
707 left.set_destroys_register();
708 }
709 left.load_item();
710 right.load_item();
711 LIR_Opr reg = rlock_result(x);
712
713 if (x->x()->type()->is_float_kind()) {
714 Bytecodes::Code code = x->op();
715 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
716 } else if (x->x()->type()->tag() == longTag) {
717 __ lcmp2int(left.result(), right.result(), reg);
718 } else {
719 Unimplemented();
720 }
721 }
722
723
724 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
725 assert(x->number_of_arguments() == 4, "wrong type");
726 LIRItem obj (x->argument_at(0), this); // object
727 LIRItem offset(x->argument_at(1), this); // offset of field
728 LIRItem cmp (x->argument_at(2), this); // value to compare with field
729 LIRItem val (x->argument_at(3), this); // replace field with val if matches cmp
730
731 assert(obj.type()->tag() == objectTag, "invalid type");
732
733 // In 64bit the type can be long, sparc doesn't have this assert
734 // assert(offset.type()->tag() == intTag, "invalid type");
735
736 assert(cmp.type()->tag() == type->tag(), "invalid type");
737 assert(val.type()->tag() == type->tag(), "invalid type");
738
739 // get address of field
740 obj.load_item();
741 offset.load_nonconstant();
742
743 LIR_Opr addr = new_pointer_register();
744 LIR_Address* a;
745 if(offset.result()->is_constant()) {
746 #ifdef _LP64
747 jlong c = offset.result()->as_jlong();
748 if ((jlong)((jint)c) == c) {
749 a = new LIR_Address(obj.result(),
750 (jint)c,
751 as_BasicType(type));
752 } else {
753 LIR_Opr tmp = new_register(T_LONG);
754 __ move(offset.result(), tmp);
755 a = new LIR_Address(obj.result(),
756 tmp,
757 as_BasicType(type));
758 }
759 #else
760 a = new LIR_Address(obj.result(),
761 offset.result()->as_jint(),
762 as_BasicType(type));
763 #endif
764 } else {
765 a = new LIR_Address(obj.result(),
766 offset.result(),
767 0,
768 as_BasicType(type));
769 }
770 __ leal(LIR_OprFact::address(a), addr);
771
772 if (type == objectType) { // Write-barrier needed for Object fields.
773 if (UseLoadBarrier) {
774 // Load barrier to make sure that cas_obj() sees a correct oop.
775 LIR_Opr pre_val = new_register(T_OBJECT);
776 __ load(new LIR_Address(addr, as_BasicType(type)), pre_val);
777 load_barrier(pre_val, addr);
778 }
779
780 // Do the pre-write barrier, if any.
781 pre_barrier(addr, LIR_OprFact::illegalOpr /* pre_val */,
782 true /* do_load */, false /* patch */, NULL);
783 }
784
785 if (type == objectType) {
786 cmp.load_item_force(FrameMap::rax_oop_opr);
787 val.load_item();
788 } else if (type == intType) {
789 cmp.load_item_force(FrameMap::rax_opr);
790 val.load_item();
791 } else if (type == longType) {
792 cmp.load_item_force(FrameMap::long0_opr);
793 val.load_item_force(FrameMap::long1_opr);
794 } else {
795 ShouldNotReachHere();
796 }
797
798 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience
799 if (type == objectType)
800 __ cas_obj(addr, cmp.result(), val.result(), ill, ill);
801 else if (type == intType)
802 __ cas_int(addr, cmp.result(), val.result(), ill, ill);
803 else if (type == longType)
804 __ cas_long(addr, cmp.result(), val.result(), ill, ill);
805 else {
806 ShouldNotReachHere();
807 }
808
809 // generate conditional move of boolean result
810 LIR_Opr result = rlock_result(x);
811 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
812 result, as_BasicType(type));
813 if (type == objectType) { // Write-barrier needed for Object fields.
814 // Seems to be precise
815 post_barrier(addr, val.result());
816 }
817 }
818
819 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
820 assert(x->number_of_arguments() == 3, "wrong type");
821 assert(UseFMA, "Needs FMA instructions support.");
822 LIRItem value(x->argument_at(0), this);
823 LIRItem value1(x->argument_at(1), this);
824 LIRItem value2(x->argument_at(2), this);
825
826 value2.set_destroys_register();
827
828 value.load_item();
829 value1.load_item();
830 value2.load_item();
831
832 LIR_Opr calc_input = value.result();
833 LIR_Opr calc_input1 = value1.result();
834 LIR_Opr calc_input2 = value2.result();
835 LIR_Opr calc_result = rlock_result(x);
836
837 switch (x->id()) {
838 case vmIntrinsics::_fmaD: __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
839 case vmIntrinsics::_fmaF: __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
840 default: ShouldNotReachHere();
841 }
842
843 }
844
845
846 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
847 assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type");
848
849 if (x->id() == vmIntrinsics::_dexp || x->id() == vmIntrinsics::_dlog ||
850 x->id() == vmIntrinsics::_dpow || x->id() == vmIntrinsics::_dcos ||
851 x->id() == vmIntrinsics::_dsin || x->id() == vmIntrinsics::_dtan ||
852 x->id() == vmIntrinsics::_dlog10) {
853 do_LibmIntrinsic(x);
854 return;
855 }
856
857 LIRItem value(x->argument_at(0), this);
858
859 bool use_fpu = false;
860 if (UseSSE < 2) {
861 value.set_destroys_register();
862 }
863 value.load_item();
864
865 LIR_Opr calc_input = value.result();
866 LIR_Opr calc_result = rlock_result(x);
867
868 switch(x->id()) {
869 case vmIntrinsics::_dabs: __ abs (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
870 case vmIntrinsics::_dsqrt: __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
871 default: ShouldNotReachHere();
872 }
873
874 if (use_fpu) {
875 __ move(calc_result, x->operand());
876 }
877 }
878
879 void LIRGenerator::do_LibmIntrinsic(Intrinsic* x) {
880 LIRItem value(x->argument_at(0), this);
881 value.set_destroys_register();
882
883 LIR_Opr calc_result = rlock_result(x);
884 LIR_Opr result_reg = result_register_for(x->type());
885
886 CallingConvention* cc = NULL;
887
888 if (x->id() == vmIntrinsics::_dpow) {
889 LIRItem value1(x->argument_at(1), this);
890
891 value1.set_destroys_register();
892
893 BasicTypeList signature(2);
894 signature.append(T_DOUBLE);
895 signature.append(T_DOUBLE);
896 cc = frame_map()->c_calling_convention(&signature);
897 value.load_item_force(cc->at(0));
898 value1.load_item_force(cc->at(1));
899 } else {
900 BasicTypeList signature(1);
901 signature.append(T_DOUBLE);
902 cc = frame_map()->c_calling_convention(&signature);
903 value.load_item_force(cc->at(0));
904 }
905
906 #ifndef _LP64
907 LIR_Opr tmp = FrameMap::fpu0_double_opr;
908 result_reg = tmp;
909 switch(x->id()) {
910 case vmIntrinsics::_dexp:
911 if (StubRoutines::dexp() != NULL) {
912 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
913 } else {
914 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
915 }
916 break;
917 case vmIntrinsics::_dlog:
918 if (StubRoutines::dlog() != NULL) {
919 __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
920 } else {
921 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
922 }
923 break;
924 case vmIntrinsics::_dlog10:
925 if (StubRoutines::dlog10() != NULL) {
926 __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
927 } else {
928 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
929 }
930 break;
931 case vmIntrinsics::_dpow:
932 if (StubRoutines::dpow() != NULL) {
933 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
934 } else {
935 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
936 }
937 break;
938 case vmIntrinsics::_dsin:
939 if (VM_Version::supports_sse2() && StubRoutines::dsin() != NULL) {
940 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
941 } else {
942 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
943 }
944 break;
945 case vmIntrinsics::_dcos:
946 if (VM_Version::supports_sse2() && StubRoutines::dcos() != NULL) {
947 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
948 } else {
949 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
950 }
951 break;
952 case vmIntrinsics::_dtan:
953 if (StubRoutines::dtan() != NULL) {
954 __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
955 } else {
956 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
957 }
958 break;
959 default: ShouldNotReachHere();
960 }
961 #else
962 switch (x->id()) {
963 case vmIntrinsics::_dexp:
964 if (StubRoutines::dexp() != NULL) {
965 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
966 } else {
967 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
968 }
969 break;
970 case vmIntrinsics::_dlog:
971 if (StubRoutines::dlog() != NULL) {
972 __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
973 } else {
974 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
975 }
976 break;
977 case vmIntrinsics::_dlog10:
978 if (StubRoutines::dlog10() != NULL) {
979 __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
980 } else {
981 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
982 }
983 break;
984 case vmIntrinsics::_dpow:
985 if (StubRoutines::dpow() != NULL) {
986 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
987 } else {
988 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
989 }
990 break;
991 case vmIntrinsics::_dsin:
992 if (StubRoutines::dsin() != NULL) {
993 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
994 } else {
995 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
996 }
997 break;
998 case vmIntrinsics::_dcos:
999 if (StubRoutines::dcos() != NULL) {
1000 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
1001 } else {
1002 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
1003 }
1004 break;
1005 case vmIntrinsics::_dtan:
1006 if (StubRoutines::dtan() != NULL) {
1007 __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
1008 } else {
1009 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
1010 }
1011 break;
1012 default: ShouldNotReachHere();
1013 }
1014 #endif // _LP64
1015 __ move(result_reg, calc_result);
1016 }
1017
1018 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
1019 assert(x->number_of_arguments() == 5, "wrong type");
1020
1021 // Make all state_for calls early since they can emit code
1022 CodeEmitInfo* info = state_for(x, x->state());
1023
1024 LIRItem src(x->argument_at(0), this);
1025 LIRItem src_pos(x->argument_at(1), this);
1026 LIRItem dst(x->argument_at(2), this);
1027 LIRItem dst_pos(x->argument_at(3), this);
1028 LIRItem length(x->argument_at(4), this);
1029
1030 // operands for arraycopy must use fixed registers, otherwise
1031 // LinearScan will fail allocation (because arraycopy always needs a
1032 // call)
1033
1034 #ifndef _LP64
1035 src.load_item_force (FrameMap::rcx_oop_opr);
1036 src_pos.load_item_force (FrameMap::rdx_opr);
1037 dst.load_item_force (FrameMap::rax_oop_opr);
1038 dst_pos.load_item_force (FrameMap::rbx_opr);
1039 length.load_item_force (FrameMap::rdi_opr);
1040 LIR_Opr tmp = (FrameMap::rsi_opr);
1041 #else
1042
1043 // The java calling convention will give us enough registers
1044 // so that on the stub side the args will be perfect already.
1045 // On the other slow/special case side we call C and the arg
1046 // positions are not similar enough to pick one as the best.
1047 // Also because the java calling convention is a "shifted" version
1048 // of the C convention we can process the java args trivially into C
1049 // args without worry of overwriting during the xfer
1050
1051 src.load_item_force (FrameMap::as_oop_opr(j_rarg0));
1052 src_pos.load_item_force (FrameMap::as_opr(j_rarg1));
1053 dst.load_item_force (FrameMap::as_oop_opr(j_rarg2));
1054 dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));
1055 length.load_item_force (FrameMap::as_opr(j_rarg4));
1056
1057 LIR_Opr tmp = FrameMap::as_opr(j_rarg5);
1058 #endif // LP64
1059
1060 set_no_result(x);
1061
1062 int flags;
1063 ciArrayKlass* expected_type;
1064 arraycopy_helper(x, &flags, &expected_type);
1065
1066 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
1067 }
1068
1069 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
1070 assert(UseCRC32Intrinsics, "need AVX and LCMUL instructions support");
1071 // Make all state_for calls early since they can emit code
1072 LIR_Opr result = rlock_result(x);
1073 int flags = 0;
1074 switch (x->id()) {
1075 case vmIntrinsics::_updateCRC32: {
1076 LIRItem crc(x->argument_at(0), this);
1077 LIRItem val(x->argument_at(1), this);
1078 // val is destroyed by update_crc32
1079 val.set_destroys_register();
1080 crc.load_item();
1081 val.load_item();
1082 __ update_crc32(crc.result(), val.result(), result);
1083 break;
1084 }
1085 case vmIntrinsics::_updateBytesCRC32:
1086 case vmIntrinsics::_updateByteBufferCRC32: {
1087 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
1088
1089 LIRItem crc(x->argument_at(0), this);
1090 LIRItem buf(x->argument_at(1), this);
1091 LIRItem off(x->argument_at(2), this);
1092 LIRItem len(x->argument_at(3), this);
1093 buf.load_item();
1094 off.load_nonconstant();
1095
1096 LIR_Opr index = off.result();
1097 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1098 if(off.result()->is_constant()) {
1099 index = LIR_OprFact::illegalOpr;
1100 offset += off.result()->as_jint();
1101 }
1102 LIR_Opr base_op = buf.result();
1103
1104 #ifndef _LP64
1105 if (!is_updateBytes) { // long b raw address
1106 base_op = new_register(T_INT);
1107 __ convert(Bytecodes::_l2i, buf.result(), base_op);
1108 }
1109 #else
1110 if (index->is_valid()) {
1111 LIR_Opr tmp = new_register(T_LONG);
1112 __ convert(Bytecodes::_i2l, index, tmp);
1113 index = tmp;
1114 }
1115 #endif
1116
1117 LIR_Address* a = new LIR_Address(base_op,
1118 index,
1119 offset,
1120 T_BYTE);
1121 BasicTypeList signature(3);
1122 signature.append(T_INT);
1123 signature.append(T_ADDRESS);
1124 signature.append(T_INT);
1125 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1126 const LIR_Opr result_reg = result_register_for(x->type());
1127
1128 LIR_Opr addr = new_pointer_register();
1129 __ leal(LIR_OprFact::address(a), addr);
1130
1131 crc.load_item_force(cc->at(0));
1132 __ move(addr, cc->at(1));
1133 len.load_item_force(cc->at(2));
1134
1135 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args());
1136 __ move(result_reg, result);
1137
1138 break;
1139 }
1140 default: {
1141 ShouldNotReachHere();
1142 }
1143 }
1144 }
1145
1146 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1147 Unimplemented();
1148 }
1149
1150 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1151 assert(UseVectorizedMismatchIntrinsic, "need AVX instruction support");
1152
1153 // Make all state_for calls early since they can emit code
1154 LIR_Opr result = rlock_result(x);
1155
1156 LIRItem a(x->argument_at(0), this); // Object
1157 LIRItem aOffset(x->argument_at(1), this); // long
1158 LIRItem b(x->argument_at(2), this); // Object
1159 LIRItem bOffset(x->argument_at(3), this); // long
1160 LIRItem length(x->argument_at(4), this); // int
1161 LIRItem log2ArrayIndexScale(x->argument_at(5), this); // int
1162
1163 a.load_item();
1164 aOffset.load_nonconstant();
1165 b.load_item();
1166 bOffset.load_nonconstant();
1167
1168 long constant_aOffset = 0;
1169 LIR_Opr result_aOffset = aOffset.result();
1170 if (result_aOffset->is_constant()) {
1171 constant_aOffset = result_aOffset->as_jlong();
1172 result_aOffset = LIR_OprFact::illegalOpr;
1173 }
1174 LIR_Opr result_a = a.result();
1175
1176 long constant_bOffset = 0;
1177 LIR_Opr result_bOffset = bOffset.result();
1178 if (result_bOffset->is_constant()) {
1179 constant_bOffset = result_bOffset->as_jlong();
1180 result_bOffset = LIR_OprFact::illegalOpr;
1181 }
1182 LIR_Opr result_b = b.result();
1183
1184 #ifndef _LP64
1185 result_a = new_register(T_INT);
1186 __ convert(Bytecodes::_l2i, a.result(), result_a);
1187 result_b = new_register(T_INT);
1188 __ convert(Bytecodes::_l2i, b.result(), result_b);
1189 #endif
1190
1191
1192 LIR_Address* addr_a = new LIR_Address(result_a,
1193 result_aOffset,
1194 constant_aOffset,
1195 T_BYTE);
1196
1197 LIR_Address* addr_b = new LIR_Address(result_b,
1198 result_bOffset,
1199 constant_bOffset,
1200 T_BYTE);
1201
1202 BasicTypeList signature(4);
1203 signature.append(T_ADDRESS);
1204 signature.append(T_ADDRESS);
1205 signature.append(T_INT);
1206 signature.append(T_INT);
1207 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1208 const LIR_Opr result_reg = result_register_for(x->type());
1209
1210 LIR_Opr ptr_addr_a = new_pointer_register();
1211 __ leal(LIR_OprFact::address(addr_a), ptr_addr_a);
1212
1213 LIR_Opr ptr_addr_b = new_pointer_register();
1214 __ leal(LIR_OprFact::address(addr_b), ptr_addr_b);
1215
1216 __ move(ptr_addr_a, cc->at(0));
1217 __ move(ptr_addr_b, cc->at(1));
1218 length.load_item_force(cc->at(2));
1219 log2ArrayIndexScale.load_item_force(cc->at(3));
1220
1221 __ call_runtime_leaf(StubRoutines::vectorizedMismatch(), getThreadTemp(), result_reg, cc->args());
1222 __ move(result_reg, result);
1223 }
1224
1225 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
1226 // _i2b, _i2c, _i2s
1227 LIR_Opr fixed_register_for(BasicType type) {
1228 switch (type) {
1229 case T_FLOAT: return FrameMap::fpu0_float_opr;
1230 case T_DOUBLE: return FrameMap::fpu0_double_opr;
1231 case T_INT: return FrameMap::rax_opr;
1232 case T_LONG: return FrameMap::long0_opr;
1233 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
1234 }
1235 }
1236
1237 void LIRGenerator::do_Convert(Convert* x) {
1238 // flags that vary for the different operations and different SSE-settings
1239 bool fixed_input = false, fixed_result = false, round_result = false, needs_stub = false;
1240
1241 switch (x->op()) {
1242 case Bytecodes::_i2l: // fall through
1243 case Bytecodes::_l2i: // fall through
1244 case Bytecodes::_i2b: // fall through
1245 case Bytecodes::_i2c: // fall through
1246 case Bytecodes::_i2s: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
1247
1248 case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false; round_result = false; needs_stub = false; break;
1249 case Bytecodes::_d2f: fixed_input = false; fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break;
1250 case Bytecodes::_i2f: fixed_input = false; fixed_result = false; round_result = UseSSE < 1; needs_stub = false; break;
1251 case Bytecodes::_i2d: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
1252 case Bytecodes::_f2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
1253 case Bytecodes::_d2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
1254 case Bytecodes::_l2f: fixed_input = false; fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break;
1255 case Bytecodes::_l2d: fixed_input = false; fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break;
1256 case Bytecodes::_f2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;
1257 case Bytecodes::_d2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;
1258 default: ShouldNotReachHere();
1259 }
1260
1261 LIRItem value(x->value(), this);
1262 value.load_item();
1263 LIR_Opr input = value.result();
1264 LIR_Opr result = rlock(x);
1265
1266 // arguments of lir_convert
1267 LIR_Opr conv_input = input;
1268 LIR_Opr conv_result = result;
1269 ConversionStub* stub = NULL;
1270
1271 if (fixed_input) {
1272 conv_input = fixed_register_for(input->type());
1273 __ move(input, conv_input);
1274 }
1275
1276 assert(fixed_result == false || round_result == false, "cannot set both");
1277 if (fixed_result) {
1278 conv_result = fixed_register_for(result->type());
1279 } else if (round_result) {
1280 result = new_register(result->type());
1281 set_vreg_flag(result, must_start_in_memory);
1282 }
1283
1284 if (needs_stub) {
1285 stub = new ConversionStub(x->op(), conv_input, conv_result);
1286 }
1287
1288 __ convert(x->op(), conv_input, conv_result, stub);
1289
1290 if (result != conv_result) {
1291 __ move(conv_result, result);
1292 }
1293
1294 assert(result->is_virtual(), "result must be virtual register");
1295 set_result(x, result);
1296 }
1297
1298
1299 void LIRGenerator::do_NewInstance(NewInstance* x) {
1300 print_if_not_loaded(x);
1301
1302 CodeEmitInfo* info = state_for(x, x->state());
1303 LIR_Opr reg = result_register_for(x->type());
1304 new_instance(reg, x->klass(), x->is_unresolved(),
1305 FrameMap::rcx_oop_opr,
1306 FrameMap::rdi_oop_opr,
1307 FrameMap::rsi_oop_opr,
1308 LIR_OprFact::illegalOpr,
1309 FrameMap::rdx_metadata_opr, info);
1310 LIR_Opr result = rlock_result(x);
1311 __ move(reg, result);
1312 }
1313
1314
1315 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
1316 CodeEmitInfo* info = state_for(x, x->state());
1317
1318 LIRItem length(x->length(), this);
1319 length.load_item_force(FrameMap::rbx_opr);
1320
1321 LIR_Opr reg = result_register_for(x->type());
1322 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1323 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1324 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1325 LIR_Opr tmp4 = reg;
1326 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1327 LIR_Opr len = length.result();
1328 BasicType elem_type = x->elt_type();
1329
1330 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
1331
1332 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
1333 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
1334
1335 LIR_Opr result = rlock_result(x);
1336 __ move(reg, result);
1337 }
1338
1339
1340 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1341 LIRItem length(x->length(), this);
1342 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
1343 // and therefore provide the state before the parameters have been consumed
1344 CodeEmitInfo* patching_info = NULL;
1345 if (!x->klass()->is_loaded() || PatchALot) {
1346 patching_info = state_for(x, x->state_before());
1347 }
1348
1349 CodeEmitInfo* info = state_for(x, x->state());
1350
1351 const LIR_Opr reg = result_register_for(x->type());
1352 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1353 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1354 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1355 LIR_Opr tmp4 = reg;
1356 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1357
1358 length.load_item_force(FrameMap::rbx_opr);
1359 LIR_Opr len = length.result();
1360
1361 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
1362 ciKlass* obj = (ciKlass*) ciObjArrayKlass::make(x->klass());
1363 if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1364 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1365 }
1366 klass2reg_with_patching(klass_reg, obj, patching_info);
1367 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
1368
1369 LIR_Opr result = rlock_result(x);
1370 __ move(reg, result);
1371 }
1372
1373
1374 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1375 Values* dims = x->dims();
1376 int i = dims->length();
1377 LIRItemList* items = new LIRItemList(i, i, NULL);
1378 while (i-- > 0) {
1379 LIRItem* size = new LIRItem(dims->at(i), this);
1380 items->at_put(i, size);
1381 }
1382
1383 // Evaluate state_for early since it may emit code.
1384 CodeEmitInfo* patching_info = NULL;
1385 if (!x->klass()->is_loaded() || PatchALot) {
1386 patching_info = state_for(x, x->state_before());
1387
1388 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1389 // clone all handlers (NOTE: Usually this is handled transparently
1390 // by the CodeEmitInfo cloning logic in CodeStub constructors but
1391 // is done explicitly here because a stub isn't being used).
1392 x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1393 }
1394 CodeEmitInfo* info = state_for(x, x->state());
1395
1396 i = dims->length();
1397 while (i-- > 0) {
1398 LIRItem* size = items->at(i);
1399 size->load_nonconstant();
1400
1401 store_stack_parameter(size->result(), in_ByteSize(i*4));
1402 }
1403
1404 LIR_Opr klass_reg = FrameMap::rax_metadata_opr;
1405 klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1406
1407 LIR_Opr rank = FrameMap::rbx_opr;
1408 __ move(LIR_OprFact::intConst(x->rank()), rank);
1409 LIR_Opr varargs = FrameMap::rcx_opr;
1410 __ move(FrameMap::rsp_opr, varargs);
1411 LIR_OprList* args = new LIR_OprList(3);
1412 args->append(klass_reg);
1413 args->append(rank);
1414 args->append(varargs);
1415 LIR_Opr reg = result_register_for(x->type());
1416 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1417 LIR_OprFact::illegalOpr,
1418 reg, args, info);
1419
1420 LIR_Opr result = rlock_result(x);
1421 __ move(reg, result);
1422 }
1423
1424
1425 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1426 // nothing to do for now
1427 }
1428
1429
1430 void LIRGenerator::do_CheckCast(CheckCast* x) {
1431 LIRItem obj(x->obj(), this);
1432
1433 CodeEmitInfo* patching_info = NULL;
1434 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) {
1435 // must do this before locking the destination register as an oop register,
1436 // and before the obj is loaded (the latter is for deoptimization)
1437 patching_info = state_for(x, x->state_before());
1438 }
1439 obj.load_item();
1440
1441 // info for exceptions
1442 CodeEmitInfo* info_for_exception =
1443 (x->needs_exception_state() ? state_for(x) :
1444 state_for(x, x->state_before(), true /*ignore_xhandler*/));
1445
1446 CodeStub* stub;
1447 if (x->is_incompatible_class_change_check()) {
1448 assert(patching_info == NULL, "can't patch this");
1449 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1450 } else if (x->is_invokespecial_receiver_check()) {
1451 assert(patching_info == NULL, "can't patch this");
1452 stub = new DeoptimizeStub(info_for_exception, Deoptimization::Reason_class_check, Deoptimization::Action_none);
1453 } else {
1454 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1455 }
1456 LIR_Opr reg = rlock_result(x);
1457 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1458 if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1459 tmp3 = new_register(objectType);
1460 }
1461 __ checkcast(reg, obj.result(), x->klass(),
1462 new_register(objectType), new_register(objectType), tmp3,
1463 x->direct_compare(), info_for_exception, patching_info, stub,
1464 x->profiled_method(), x->profiled_bci());
1465 }
1466
1467
1468 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1469 LIRItem obj(x->obj(), this);
1470
1471 // result and test object may not be in same register
1472 LIR_Opr reg = rlock_result(x);
1473 CodeEmitInfo* patching_info = NULL;
1474 if ((!x->klass()->is_loaded() || PatchALot)) {
1475 // must do this before locking the destination register as an oop register
1476 patching_info = state_for(x, x->state_before());
1477 }
1478 obj.load_item();
1479 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1480 if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1481 tmp3 = new_register(objectType);
1482 }
1483 __ instanceof(reg, obj.result(), x->klass(),
1484 new_register(objectType), new_register(objectType), tmp3,
1485 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci());
1486 }
1487
1488
1489 void LIRGenerator::do_If(If* x) {
1490 assert(x->number_of_sux() == 2, "inconsistency");
1491 ValueTag tag = x->x()->type()->tag();
1492 bool is_safepoint = x->is_safepoint();
1493
1494 If::Condition cond = x->cond();
1495
1496 LIRItem xitem(x->x(), this);
1497 LIRItem yitem(x->y(), this);
1498 LIRItem* xin = &xitem;
1499 LIRItem* yin = &yitem;
1500
1501 if (tag == longTag) {
1502 // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1503 // mirror for other conditions
1504 if (cond == If::gtr || cond == If::leq) {
1505 cond = Instruction::mirror(cond);
1506 xin = &yitem;
1507 yin = &xitem;
1508 }
1509 xin->set_destroys_register();
1510 }
1511 xin->load_item();
1512 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
1513 // inline long zero
1514 yin->dont_load_item();
1515 } else if (tag == longTag || tag == floatTag || tag == doubleTag) {
1516 // longs cannot handle constants at right side
1517 yin->load_item();
1518 } else {
1519 yin->dont_load_item();
1520 }
1521
1522 // add safepoint before generating condition code so it can be recomputed
1523 if (x->is_safepoint()) {
1524 // increment backedge counter if needed
1525 increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci());
1526 __ safepoint(safepoint_poll_register(), state_for(x, x->state_before()));
1527 }
1528 set_no_result(x);
1529
1530 LIR_Opr left = xin->result();
1531 LIR_Opr right = yin->result();
1532 __ cmp(lir_cond(cond), left, right);
1533 // Generate branch profiling. Profiling code doesn't kill flags.
1534 profile_branch(x, cond);
1535 move_to_phi(x->state());
1536 if (x->x()->type()->is_float_kind()) {
1537 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
1538 } else {
1539 __ branch(lir_cond(cond), right->type(), x->tsux());
1540 }
1541 assert(x->default_sux() == x->fsux(), "wrong destination above");
1542 __ jump(x->default_sux());
1543 }
1544
1545
1546 LIR_Opr LIRGenerator::getThreadPointer() {
1547 #ifdef _LP64
1548 return FrameMap::as_pointer_opr(r15_thread);
1549 #else
1550 LIR_Opr result = new_register(T_INT);
1551 __ get_thread(result);
1552 return result;
1553 #endif //
1554 }
1555
1556 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1557 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
1558 LIR_OprList* args = new LIR_OprList();
1559 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1560 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1561 }
1562
1563
1564 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1565 CodeEmitInfo* info) {
1566 if (address->type() == T_LONG) {
1567 address = new LIR_Address(address->base(),
1568 address->index(), address->scale(),
1569 address->disp(), T_DOUBLE);
1570 // Transfer the value atomically by using FP moves. This means
1571 // the value has to be moved between CPU and FPU registers. It
1572 // always has to be moved through spill slot since there's no
1573 // quick way to pack the value into an SSE register.
1574 LIR_Opr temp_double = new_register(T_DOUBLE);
1575 LIR_Opr spill = new_register(T_LONG);
1576 set_vreg_flag(spill, must_start_in_memory);
1577 __ move(value, spill);
1578 __ volatile_move(spill, temp_double, T_LONG);
1579 __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info);
1580 } else {
1581 __ store(value, address, info);
1582 }
1583 }
1584
1585
1586
1587 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1588 CodeEmitInfo* info) {
1589 if (address->type() == T_LONG) {
1590 address = new LIR_Address(address->base(),
1591 address->index(), address->scale(),
1592 address->disp(), T_DOUBLE);
1593 // Transfer the value atomically by using FP moves. This means
1594 // the value has to be moved between CPU and FPU registers. In
1595 // SSE0 and SSE1 mode it has to be moved through spill slot but in
1596 // SSE2+ mode it can be moved directly.
1597 LIR_Opr temp_double = new_register(T_DOUBLE);
1598 __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info);
1599 __ volatile_move(temp_double, result, T_LONG);
1600 if (UseSSE < 2) {
1601 // no spill slot needed in SSE2 mode because xmm->cpu register move is possible
1602 set_vreg_flag(result, must_start_in_memory);
1603 }
1604 } else {
1605 __ load(address, result, info);
1606 }
1607 }
1608
1609 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
1610 BasicType type, bool is_volatile) {
1611 if (is_volatile && type == T_LONG) {
1612 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
1613 LIR_Opr tmp = new_register(T_DOUBLE);
1614 __ load(addr, tmp);
1615 LIR_Opr spill = new_register(T_LONG);
1616 set_vreg_flag(spill, must_start_in_memory);
1617 __ move(tmp, spill);
1618 __ move(spill, dst);
1619 } else {
1620 LIR_Address* addr = new LIR_Address(src, offset, type);
1621 __ load(addr, dst);
1622 if (type == T_OBJECT && UseLoadBarrier) {
1623 load_barrier(dst, LIR_OprFact::address(addr));
1624 }
1625 }
1626 }
1627
1628
1629 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
1630 BasicType type, bool is_volatile) {
1631 if (is_volatile && type == T_LONG) {
1632 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
1633 LIR_Opr tmp = new_register(T_DOUBLE);
1634 LIR_Opr spill = new_register(T_DOUBLE);
1635 set_vreg_flag(spill, must_start_in_memory);
1636 __ move(data, spill);
1637 __ move(spill, tmp);
1638 __ move(tmp, addr);
1639 } else {
1640 LIR_Address* addr = new LIR_Address(src, offset, type);
1641 bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1642 if (is_obj) {
1643 // Do the pre-write barrier, if any.
1644 pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1645 true /* do_load */, false /* patch */, NULL);
1646 __ move(data, addr);
1647 assert(src->is_register(), "must be register");
1648 // Seems to be a precise address
1649 post_barrier(LIR_OprFact::address(addr), data);
1650 } else {
1651 __ move(data, addr);
1652 }
1653 }
1654 }
1655
1656 void LIRGenerator::do_UnsafeGetAndSetObject(UnsafeGetAndSetObject* x) {
1657 BasicType type = x->basic_type();
1658 LIRItem src(x->object(), this);
1659 LIRItem off(x->offset(), this);
1660 LIRItem value(x->value(), this);
1661
1662 src.load_item();
1663 value.load_item();
1664 off.load_nonconstant();
1665
1666 LIR_Opr dst = rlock_result(x, type);
1667 LIR_Opr data = value.result();
1668 bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1669 LIR_Opr offset = off.result();
1670
1671 assert (type == T_INT || (!x->is_add() && is_obj) LP64_ONLY( || type == T_LONG ), "unexpected type");
1672 LIR_Address* addr;
1673 if (offset->is_constant()) {
1674 #ifdef _LP64
1675 jlong c = offset->as_jlong();
1676 if ((jlong)((jint)c) == c) {
1677 addr = new LIR_Address(src.result(), (jint)c, type);
1678 } else {
1679 LIR_Opr tmp = new_register(T_LONG);
1680 __ move(offset, tmp);
1681 addr = new LIR_Address(src.result(), tmp, type);
1682 }
1683 #else
1684 addr = new LIR_Address(src.result(), offset->as_jint(), type);
1685 #endif
1686 } else {
1687 addr = new LIR_Address(src.result(), offset, type);
1688 }
1689
1690 // Because we want a 2-arg form of xchg and xadd
1691 __ move(data, dst);
1692
1693 if (x->is_add()) {
1694 __ xadd(LIR_OprFact::address(addr), dst, dst, LIR_OprFact::illegalOpr);
1695 } else {
1696 if (is_obj) {
1697 // Do the pre-write barrier, if any.
1698 pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1699 true /* do_load */, false /* patch */, NULL);
1700 }
1701 __ xchg(LIR_OprFact::address(addr), dst, dst, LIR_OprFact::illegalOpr);
1702 if (is_obj) {
1703 if (UseLoadBarrier) {
1704 load_barrier(dst);
1705 }
1706
1707 // Seems to be a precise address
1708 post_barrier(LIR_OprFact::address(addr), data);
1709 }
1710 }
1711 }