1734     _new2old_map.map(ex->_idx, s->_leaf);
1735 #endif
1736   }
1737 
1738   // PhaseChaitin::fixup_spills will sometimes generate spill code
1739   // via the matcher.  By the time, nodes have been wired into the CFG,
1740   // and any further nodes generated by expand rules will be left hanging
1741   // in space, and will not get emitted as output code.  Catch this.
1742   // Also, catch any new register allocation constraints ("projections")
1743   // generated belatedly during spill code generation.
1744   if (_allocation_started) {
1745     guarantee(ex == mach, "no expand rules during spill generation");
1746     guarantee(number_of_projections_prior == number_of_projections(), "no allocation during spill generation");
1747   }
1748 
1749   if (leaf->is_Con() || leaf->is_DecodeNarrowPtr()) {
1750     // Record the con for sharing
1751     _shared_nodes.map(leaf->_idx, ex);
1752   }
1753 







1754   return ex;
1755 }
1756 
1757 void Matcher::handle_precedence_edges(Node* n, MachNode *mach) {
1758   for (uint i = n->req(); i < n->len(); i++) {
1759     if (n->in(i) != NULL) {
1760       mach->add_prec(n->in(i));
1761     }
1762   }
1763 }
1764 
1765 void Matcher::ReduceInst_Chain_Rule( State *s, int rule, Node *&mem, MachNode *mach ) {
1766   // 'op' is what I am expecting to receive
1767   int op = _leftOp[rule];
1768   // Operand type to catch childs result
1769   // This is what my child will give me.
1770   int opnd_class_instance = s->_rule[op];
1771   // Choose between operand class or not.
1772   // This is what I will receive.
1773   int catch_op = (FIRST_OPERAND_CLASS <= op && op < NUM_OPERANDS) ? opnd_class_instance : op;

1734     _new2old_map.map(ex->_idx, s->_leaf);
1735 #endif
1736   }
1737 
1738   // PhaseChaitin::fixup_spills will sometimes generate spill code
1739   // via the matcher.  By the time, nodes have been wired into the CFG,
1740   // and any further nodes generated by expand rules will be left hanging
1741   // in space, and will not get emitted as output code.  Catch this.
1742   // Also, catch any new register allocation constraints ("projections")
1743   // generated belatedly during spill code generation.
1744   if (_allocation_started) {
1745     guarantee(ex == mach, "no expand rules during spill generation");
1746     guarantee(number_of_projections_prior == number_of_projections(), "no allocation during spill generation");
1747   }
1748 
1749   if (leaf->is_Con() || leaf->is_DecodeNarrowPtr()) {
1750     // Record the con for sharing
1751     _shared_nodes.map(leaf->_idx, ex);
1752   }
1753 
1754   // Have mach nodes inherit GC barrier data
1755   if (leaf->is_LoadStore()) {
1756     mach->set_barrier_data(leaf->as_LoadStore()->barrier_data());
1757   } else if (leaf->is_Mem()) {
1758     mach->set_barrier_data(leaf->as_Mem()->barrier_data());
1759   }
1760 
1761   return ex;
1762 }
1763 
1764 void Matcher::handle_precedence_edges(Node* n, MachNode *mach) {
1765   for (uint i = n->req(); i < n->len(); i++) {
1766     if (n->in(i) != NULL) {
1767       mach->add_prec(n->in(i));
1768     }
1769   }
1770 }
1771 
1772 void Matcher::ReduceInst_Chain_Rule( State *s, int rule, Node *&mem, MachNode *mach ) {
1773   // 'op' is what I am expecting to receive
1774   int op = _leftOp[rule];
1775   // Operand type to catch childs result
1776   // This is what my child will give me.
1777   int opnd_class_instance = s->_rule[op];
1778   // Choose between operand class or not.
1779   // This is what I will receive.
1780   int catch_op = (FIRST_OPERAND_CLASS <= op && op < NUM_OPERANDS) ? opnd_class_instance : op;