src/cpu/x86/vm/x86_32.ad

*** 233,242 ****
--- 233,247 ----
  
  
  //----------SOURCE BLOCK-------------------------------------------------------
  // This is a block of C++ code which provides values, functions, and
  // definitions necessary in the rest of the architecture description
+ source_hpp %{
+ // Must be visible to the DFA in dfa_x86_32.cpp
+ extern bool is_mulL_operand_hi32_zero(MulLNode* n, bool isLeft);
+ %}
+ 
  source %{
  #define   RELOC_IMM32    Assembler::imm_operand
  #define   RELOC_DISP32   Assembler::disp32_operand
  
  #define __ _masm.
*** 1483,1492 ****
--- 1488,1513 ----
  
  const RegMask Matcher::method_handle_invoke_SP_save_mask() {
    return EBP_REG_mask;
  }
  
+ // Returns true if the high 32 bits of the left (when isLeft==true) or the
+ // right (when isLeft==false) operand is known to be zero.
+ bool is_mulL_operand_hi32_zero(MulLNode* n, bool isLeft) {
+   Node* o = isLeft ? n->in(1) : n->in(2);
+   if (o->Opcode() == Op_LoadUI2L) {
+     return true;
+   }
+   if (o->Opcode() == Op_AndL) {
+     Node* o2 = o->in(2);
+     if (o2->is_Con() && (o2->get_long() & 0xFFFFFFFF00000000LL) == 0LL) {
+       return true;
+     }
+   }
+   return false;
+ }
+ 
  %}
  
  //----------ENCODING BLOCK-----------------------------------------------------
  // This block specifies the encoding classes used by the compiler to output
  // byte streams.  Encoding classes generate functions which are called by
*** 8597,8606 ****
--- 8618,8684 ----
              "ADD    EDX,$tmp" %}
    ins_encode( long_multiply( dst, src, tmp ) );
    ins_pipe( pipe_slow );
  %}
  
+ // Multiply Register Long where the left operand's high 32 bits are zero
+ instruct mulL_eReg_lhi0(eADXRegL dst, eRegL src, eRegI tmp, eFlagsReg cr) %{
+   predicate(is_mulL_operand_hi32_zero((MulLNode*)n, true));
+   match(Set dst (MulL dst src));
+   effect(KILL cr, TEMP tmp);
+   ins_cost(2*100+2*400);
+ // Basic idea: lo(result) = lo(x_lo * y_lo)
+ //             hi(result) = hi(x_lo * y_lo) + lo(x_lo * y_hi) where lo(x_hi * y_lo) = 0 because x_hi = 0
+   format %{ "MOV    $tmp,$src.hi\n\t"
+             "IMUL   $tmp,EAX\n\t"
+             "MUL    EDX:EAX,$src.lo\n\t"
+             "ADD    EDX,$tmp" %}
+   ins_encode %{
+     __ movl($tmp$$Register, HIGH_FROM_LOW($src$$Register));
+     __ imull($tmp$$Register, rax);
+     __ mull($src$$Register);
+     __ addl(rdx, $tmp$$Register);
+   %}
+   ins_pipe( pipe_slow );
+ %}
+ 
+ // Multiply Register Long where the right operand's high 32 bits are zero
+ instruct mulL_eReg_rhi0(eADXRegL dst, eRegL src, eRegI tmp, eFlagsReg cr) %{
+   predicate(is_mulL_operand_hi32_zero((MulLNode*)n, false));
+   match(Set dst (MulL dst src));
+   effect(KILL cr, TEMP tmp);
+   ins_cost(2*100+2*400);
+ // Basic idea: lo(result) = lo(x_lo * y_lo)
+ //             hi(result) = hi(x_lo * y_lo) + lo(x_hi * y_lo) where lo(x_lo * y_hi) = 0 because y_hi = 0
+   format %{ "MOV    $tmp,$src.lo\n\t"
+             "IMUL   $tmp,EDX\n\t"
+             "MUL    EDX:EAX,$src.lo\n\t"
+             "ADD    EDX,$tmp" %}
+   ins_encode %{
+     __ movl($tmp$$Register, $src$$Register);
+     __ imull($tmp$$Register, rdx);
+     __ mull($src$$Register);
+     __ addl(rdx, $tmp$$Register);
+   %}
+   ins_pipe( pipe_slow );
+ %}
+ 
+ // Multiply Register Long where the left and the right operands' high 32 bits are zero
+ instruct mulL_eReg_hi0(eADXRegL dst, eRegL src, eFlagsReg cr) %{
+   predicate(is_mulL_operand_hi32_zero((MulLNode*)n, true) && is_mulL_operand_hi32_zero((MulLNode*)n, false));
+   match(Set dst (MulL dst src));
+   effect(KILL cr);
+   ins_cost(1*400);
+ // Basic idea: lo(result) = lo(x_lo * y_lo)
+ //             hi(result) = hi(x_lo * y_lo) where lo(x_hi * y_lo) = 0 and lo(x_lo * y_hi) = 0 because x_hi = 0 and y_hi = 0
+   format %{ "MUL    EDX:EAX,$src.lo\n\t" %}
+   ins_encode %{
+     __ mull($src$$Register);
+   %}
+   ins_pipe( pipe_slow );
+ %}
+ 
  // Multiply Register Long by small constant
  instruct mulL_eReg_con(eADXRegL dst, immL_127 src, eRegI tmp, eFlagsReg cr) %{
    match(Set dst (MulL dst src));
    effect(KILL cr, TEMP tmp);
    ins_cost(2*100+2*400);