1 /* 2 * Copyright (c) 1999, 2017, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "precompiled.hpp" 26 #include "asm/assembler.hpp" 27 #include "c1/c1_Defs.hpp" 28 #include "c1/c1_MacroAssembler.hpp" 29 #include "c1/c1_Runtime1.hpp" 30 #include "interpreter/interpreter.hpp" 31 #include "nativeInst_x86.hpp" 32 #include "oops/compiledICHolder.hpp" 33 #include "oops/oop.inline.hpp" 34 #include "prims/jvmtiExport.hpp" 35 #include "register_x86.hpp" 36 #include "runtime/sharedRuntime.hpp" 37 #include "runtime/signature.hpp" 38 #include "runtime/vframeArray.hpp" 39 #include "utilities/macros.hpp" 40 #include "vmreg_x86.inline.hpp" 41 #if INCLUDE_ALL_GCS 42 #include "gc/g1/g1SATBCardTableModRefBS.hpp" 43 #endif 44 45 46 // Implementation of StubAssembler 47 48 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, int args_size) { 49 // setup registers 50 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); // is callee-saved register (Visual C++ calling conventions) 51 assert(!(oop_result1->is_valid() || metadata_result->is_valid()) || oop_result1 != metadata_result, "registers must be different"); 52 assert(oop_result1 != thread && metadata_result != thread, "registers must be different"); 53 assert(args_size >= 0, "illegal args_size"); 54 bool align_stack = false; 55 #ifdef _LP64 56 // At a method handle call, the stack may not be properly aligned 57 // when returning with an exception. 58 align_stack = (stub_id() == Runtime1::handle_exception_from_callee_id); 59 #endif 60 61 #ifdef _LP64 62 mov(c_rarg0, thread); 63 set_num_rt_args(0); // Nothing on stack 64 #else 65 set_num_rt_args(1 + args_size); 66 67 // push java thread (becomes first argument of C function) 68 get_thread(thread); 69 push(thread); 70 #endif // _LP64 71 72 int call_offset; 73 if (!align_stack) { 74 set_last_Java_frame(thread, noreg, rbp, NULL); 75 } else { 76 address the_pc = pc(); 77 call_offset = offset(); 78 set_last_Java_frame(thread, noreg, rbp, the_pc); 79 andptr(rsp, -(StackAlignmentInBytes)); // Align stack 80 } 81 82 // do the call 83 call(RuntimeAddress(entry)); 84 if (!align_stack) { 85 call_offset = offset(); 86 } 87 // verify callee-saved register 88 #ifdef ASSERT 89 guarantee(thread != rax, "change this code"); 90 push(rax); 91 { Label L; 92 get_thread(rax); 93 cmpptr(thread, rax); 94 jcc(Assembler::equal, L); 95 int3(); 96 stop("StubAssembler::call_RT: rdi not callee saved?"); 97 bind(L); 98 } 99 pop(rax); 100 #endif 101 reset_last_Java_frame(thread, true); 102 103 // discard thread and arguments 104 NOT_LP64(addptr(rsp, num_rt_args()*BytesPerWord)); 105 106 // check for pending exceptions 107 { Label L; 108 cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); 109 jcc(Assembler::equal, L); 110 // exception pending => remove activation and forward to exception handler 111 movptr(rax, Address(thread, Thread::pending_exception_offset())); 112 // make sure that the vm_results are cleared 113 if (oop_result1->is_valid()) { 114 movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); 115 } 116 if (metadata_result->is_valid()) { 117 movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD); 118 } 119 if (frame_size() == no_frame_size) { 120 leave(); 121 jump(RuntimeAddress(StubRoutines::forward_exception_entry())); 122 } else if (_stub_id == Runtime1::forward_exception_id) { 123 should_not_reach_here(); 124 } else { 125 jump(RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id))); 126 } 127 bind(L); 128 } 129 // get oop results if there are any and reset the values in the thread 130 if (oop_result1->is_valid()) { 131 get_vm_result(oop_result1, thread); 132 } 133 if (metadata_result->is_valid()) { 134 get_vm_result_2(metadata_result, thread); 135 } 136 return call_offset; 137 } 138 139 140 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1) { 141 #ifdef _LP64 142 mov(c_rarg1, arg1); 143 #else 144 push(arg1); 145 #endif // _LP64 146 return call_RT(oop_result1, metadata_result, entry, 1); 147 } 148 149 150 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2) { 151 #ifdef _LP64 152 if (c_rarg1 == arg2) { 153 if (c_rarg2 == arg1) { 154 xchgq(arg1, arg2); 155 } else { 156 mov(c_rarg2, arg2); 157 mov(c_rarg1, arg1); 158 } 159 } else { 160 mov(c_rarg1, arg1); 161 mov(c_rarg2, arg2); 162 } 163 #else 164 push(arg2); 165 push(arg1); 166 #endif // _LP64 167 return call_RT(oop_result1, metadata_result, entry, 2); 168 } 169 170 171 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2, Register arg3) { 172 #ifdef _LP64 173 // if there is any conflict use the stack 174 if (arg1 == c_rarg2 || arg1 == c_rarg3 || 175 arg2 == c_rarg1 || arg1 == c_rarg3 || 176 arg3 == c_rarg1 || arg1 == c_rarg2) { 177 push(arg3); 178 push(arg2); 179 push(arg1); 180 pop(c_rarg1); 181 pop(c_rarg2); 182 pop(c_rarg3); 183 } else { 184 mov(c_rarg1, arg1); 185 mov(c_rarg2, arg2); 186 mov(c_rarg3, arg3); 187 } 188 #else 189 push(arg3); 190 push(arg2); 191 push(arg1); 192 #endif // _LP64 193 return call_RT(oop_result1, metadata_result, entry, 3); 194 } 195 196 197 // Implementation of StubFrame 198 199 class StubFrame: public StackObj { 200 private: 201 StubAssembler* _sasm; 202 203 public: 204 StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments); 205 void load_argument(int offset_in_words, Register reg); 206 207 ~StubFrame(); 208 }; 209 210 211 #define __ _sasm-> 212 213 StubFrame::StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments) { 214 _sasm = sasm; 215 __ set_info(name, must_gc_arguments); 216 __ enter(); 217 } 218 219 // load parameters that were stored with LIR_Assembler::store_parameter 220 // Note: offsets for store_parameter and load_argument must match 221 void StubFrame::load_argument(int offset_in_words, Register reg) { 222 // rbp, + 0: link 223 // + 1: return address 224 // + 2: argument with offset 0 225 // + 3: argument with offset 1 226 // + 4: ... 227 228 __ movptr(reg, Address(rbp, (offset_in_words + 2) * BytesPerWord)); 229 } 230 231 232 StubFrame::~StubFrame() { 233 __ leave(); 234 __ ret(0); 235 } 236 237 #undef __ 238 239 240 // Implementation of Runtime1 241 242 #define __ sasm-> 243 244 const int float_regs_as_doubles_size_in_slots = pd_nof_fpu_regs_frame_map * 2; 245 const int xmm_regs_as_doubles_size_in_slots = FrameMap::nof_xmm_regs * 2; 246 247 // Stack layout for saving/restoring all the registers needed during a runtime 248 // call (this includes deoptimization) 249 // Note: note that users of this frame may well have arguments to some runtime 250 // while these values are on the stack. These positions neglect those arguments 251 // but the code in save_live_registers will take the argument count into 252 // account. 253 // 254 #ifdef _LP64 255 #define SLOT2(x) x, 256 #define SLOT_PER_WORD 2 257 #else 258 #define SLOT2(x) 259 #define SLOT_PER_WORD 1 260 #endif // _LP64 261 262 enum reg_save_layout { 263 // 64bit needs to keep stack 16 byte aligned. So we add some alignment dummies to make that 264 // happen and will assert if the stack size we create is misaligned 265 #ifdef _LP64 266 align_dummy_0, align_dummy_1, 267 #endif // _LP64 268 #ifdef _WIN64 269 // Windows always allocates space for it's argument registers (see 270 // frame::arg_reg_save_area_bytes). 271 arg_reg_save_1, arg_reg_save_1H, // 0, 4 272 arg_reg_save_2, arg_reg_save_2H, // 8, 12 273 arg_reg_save_3, arg_reg_save_3H, // 16, 20 274 arg_reg_save_4, arg_reg_save_4H, // 24, 28 275 #endif // _WIN64 276 xmm_regs_as_doubles_off, // 32 277 float_regs_as_doubles_off = xmm_regs_as_doubles_off + xmm_regs_as_doubles_size_in_slots, // 160 278 fpu_state_off = float_regs_as_doubles_off + float_regs_as_doubles_size_in_slots, // 224 279 // fpu_state_end_off is exclusive 280 fpu_state_end_off = fpu_state_off + (FPUStateSizeInWords / SLOT_PER_WORD), // 352 281 marker = fpu_state_end_off, SLOT2(markerH) // 352, 356 282 extra_space_offset, // 360 283 #ifdef _LP64 284 r15_off = extra_space_offset, r15H_off, // 360, 364 285 r14_off, r14H_off, // 368, 372 286 r13_off, r13H_off, // 376, 380 287 r12_off, r12H_off, // 384, 388 288 r11_off, r11H_off, // 392, 396 289 r10_off, r10H_off, // 400, 404 290 r9_off, r9H_off, // 408, 412 291 r8_off, r8H_off, // 416, 420 292 rdi_off, rdiH_off, // 424, 428 293 #else 294 rdi_off = extra_space_offset, 295 #endif // _LP64 296 rsi_off, SLOT2(rsiH_off) // 432, 436 297 rbp_off, SLOT2(rbpH_off) // 440, 444 298 rsp_off, SLOT2(rspH_off) // 448, 452 299 rbx_off, SLOT2(rbxH_off) // 456, 460 300 rdx_off, SLOT2(rdxH_off) // 464, 468 301 rcx_off, SLOT2(rcxH_off) // 472, 476 302 rax_off, SLOT2(raxH_off) // 480, 484 303 saved_rbp_off, SLOT2(saved_rbpH_off) // 488, 492 304 return_off, SLOT2(returnH_off) // 496, 500 305 reg_save_frame_size // As noted: neglects any parameters to runtime // 504 306 }; 307 308 309 310 // Save off registers which might be killed by calls into the runtime. 311 // Tries to smart of about FP registers. In particular we separate 312 // saving and describing the FPU registers for deoptimization since we 313 // have to save the FPU registers twice if we describe them and on P4 314 // saving FPU registers which don't contain anything appears 315 // expensive. The deopt blob is the only thing which needs to 316 // describe FPU registers. In all other cases it should be sufficient 317 // to simply save their current value. 318 319 static OopMap* generate_oop_map(StubAssembler* sasm, int num_rt_args, 320 bool save_fpu_registers = true) { 321 322 // In 64bit all the args are in regs so there are no additional stack slots 323 LP64_ONLY(num_rt_args = 0); 324 LP64_ONLY(assert((reg_save_frame_size * VMRegImpl::stack_slot_size) % 16 == 0, "must be 16 byte aligned");) 325 int frame_size_in_slots = reg_save_frame_size + num_rt_args; // args + thread 326 sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word); 327 328 // record saved value locations in an OopMap 329 // locations are offsets from sp after runtime call; num_rt_args is number of arguments in call, including thread 330 OopMap* map = new OopMap(frame_size_in_slots, 0); 331 map->set_callee_saved(VMRegImpl::stack2reg(rax_off + num_rt_args), rax->as_VMReg()); 332 map->set_callee_saved(VMRegImpl::stack2reg(rcx_off + num_rt_args), rcx->as_VMReg()); 333 map->set_callee_saved(VMRegImpl::stack2reg(rdx_off + num_rt_args), rdx->as_VMReg()); 334 map->set_callee_saved(VMRegImpl::stack2reg(rbx_off + num_rt_args), rbx->as_VMReg()); 335 map->set_callee_saved(VMRegImpl::stack2reg(rsi_off + num_rt_args), rsi->as_VMReg()); 336 map->set_callee_saved(VMRegImpl::stack2reg(rdi_off + num_rt_args), rdi->as_VMReg()); 337 #ifdef _LP64 338 map->set_callee_saved(VMRegImpl::stack2reg(r8_off + num_rt_args), r8->as_VMReg()); 339 map->set_callee_saved(VMRegImpl::stack2reg(r9_off + num_rt_args), r9->as_VMReg()); 340 map->set_callee_saved(VMRegImpl::stack2reg(r10_off + num_rt_args), r10->as_VMReg()); 341 map->set_callee_saved(VMRegImpl::stack2reg(r11_off + num_rt_args), r11->as_VMReg()); 342 map->set_callee_saved(VMRegImpl::stack2reg(r12_off + num_rt_args), r12->as_VMReg()); 343 map->set_callee_saved(VMRegImpl::stack2reg(r13_off + num_rt_args), r13->as_VMReg()); 344 map->set_callee_saved(VMRegImpl::stack2reg(r14_off + num_rt_args), r14->as_VMReg()); 345 map->set_callee_saved(VMRegImpl::stack2reg(r15_off + num_rt_args), r15->as_VMReg()); 346 347 // This is stupid but needed. 348 map->set_callee_saved(VMRegImpl::stack2reg(raxH_off + num_rt_args), rax->as_VMReg()->next()); 349 map->set_callee_saved(VMRegImpl::stack2reg(rcxH_off + num_rt_args), rcx->as_VMReg()->next()); 350 map->set_callee_saved(VMRegImpl::stack2reg(rdxH_off + num_rt_args), rdx->as_VMReg()->next()); 351 map->set_callee_saved(VMRegImpl::stack2reg(rbxH_off + num_rt_args), rbx->as_VMReg()->next()); 352 map->set_callee_saved(VMRegImpl::stack2reg(rsiH_off + num_rt_args), rsi->as_VMReg()->next()); 353 map->set_callee_saved(VMRegImpl::stack2reg(rdiH_off + num_rt_args), rdi->as_VMReg()->next()); 354 355 map->set_callee_saved(VMRegImpl::stack2reg(r8H_off + num_rt_args), r8->as_VMReg()->next()); 356 map->set_callee_saved(VMRegImpl::stack2reg(r9H_off + num_rt_args), r9->as_VMReg()->next()); 357 map->set_callee_saved(VMRegImpl::stack2reg(r10H_off + num_rt_args), r10->as_VMReg()->next()); 358 map->set_callee_saved(VMRegImpl::stack2reg(r11H_off + num_rt_args), r11->as_VMReg()->next()); 359 map->set_callee_saved(VMRegImpl::stack2reg(r12H_off + num_rt_args), r12->as_VMReg()->next()); 360 map->set_callee_saved(VMRegImpl::stack2reg(r13H_off + num_rt_args), r13->as_VMReg()->next()); 361 map->set_callee_saved(VMRegImpl::stack2reg(r14H_off + num_rt_args), r14->as_VMReg()->next()); 362 map->set_callee_saved(VMRegImpl::stack2reg(r15H_off + num_rt_args), r15->as_VMReg()->next()); 363 #endif // _LP64 364 365 int xmm_bypass_limit = FrameMap::nof_xmm_regs; 366 #ifdef _LP64 367 if (UseAVX < 3) { 368 xmm_bypass_limit = xmm_bypass_limit / 2; 369 } 370 #endif 371 372 if (save_fpu_registers) { 373 if (UseSSE < 2) { 374 int fpu_off = float_regs_as_doubles_off; 375 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) { 376 VMReg fpu_name_0 = FrameMap::fpu_regname(n); 377 map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + num_rt_args), fpu_name_0); 378 // %%% This is really a waste but we'll keep things as they were for now 379 if (true) { 380 map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + 1 + num_rt_args), fpu_name_0->next()); 381 } 382 fpu_off += 2; 383 } 384 assert(fpu_off == fpu_state_off, "incorrect number of fpu stack slots"); 385 } 386 387 if (UseSSE >= 2) { 388 int xmm_off = xmm_regs_as_doubles_off; 389 for (int n = 0; n < FrameMap::nof_xmm_regs; n++) { 390 if (n < xmm_bypass_limit) { 391 VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg(); 392 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0); 393 // %%% This is really a waste but we'll keep things as they were for now 394 if (true) { 395 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + 1 + num_rt_args), xmm_name_0->next()); 396 } 397 } 398 xmm_off += 2; 399 } 400 assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers"); 401 402 } else if (UseSSE == 1) { 403 int xmm_off = xmm_regs_as_doubles_off; 404 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) { 405 VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg(); 406 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0); 407 xmm_off += 2; 408 } 409 assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers"); 410 } 411 } 412 413 return map; 414 } 415 416 static OopMap* save_live_registers(StubAssembler* sasm, int num_rt_args, 417 bool save_fpu_registers = true, 418 bool do_generate_oop_map = true) { 419 __ block_comment("save_live_registers"); 420 421 __ pusha(); // integer registers 422 423 // assert(float_regs_as_doubles_off % 2 == 0, "misaligned offset"); 424 // assert(xmm_regs_as_doubles_off % 2 == 0, "misaligned offset"); 425 426 __ subptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size); 427 428 #ifdef ASSERT 429 __ movptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef); 430 #endif 431 432 if (save_fpu_registers) { 433 if (UseSSE < 2) { 434 // save FPU stack 435 __ fnsave(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size)); 436 __ fwait(); 437 438 #ifdef ASSERT 439 Label ok; 440 __ cmpw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std()); 441 __ jccb(Assembler::equal, ok); 442 __ stop("corrupted control word detected"); 443 __ bind(ok); 444 #endif 445 446 // Reset the control word to guard against exceptions being unmasked 447 // since fstp_d can cause FPU stack underflow exceptions. Write it 448 // into the on stack copy and then reload that to make sure that the 449 // current and future values are correct. 450 __ movw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std()); 451 __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size)); 452 453 // Save the FPU registers in de-opt-able form 454 int offset = 0; 455 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) { 456 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset)); 457 offset += 8; 458 } 459 } 460 461 if (UseSSE >= 2) { 462 // save XMM registers 463 // XMM registers can contain float or double values, but this is not known here, 464 // so always save them as doubles. 465 // note that float values are _not_ converted automatically, so for float values 466 // the second word contains only garbage data. 467 int xmm_bypass_limit = FrameMap::nof_xmm_regs; 468 int offset = 0; 469 #ifdef _LP64 470 if (UseAVX < 3) { 471 xmm_bypass_limit = xmm_bypass_limit / 2; 472 } 473 #endif 474 for (int n = 0; n < xmm_bypass_limit; n++) { 475 XMMRegister xmm_name = as_XMMRegister(n); 476 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset), xmm_name); 477 offset += 8; 478 } 479 } else if (UseSSE == 1) { 480 // save XMM registers as float because double not supported without SSE2(num MMX == num fpu) 481 int offset = 0; 482 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) { 483 XMMRegister xmm_name = as_XMMRegister(n); 484 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset), xmm_name); 485 offset += 8; 486 } 487 } 488 } 489 490 // FPU stack must be empty now 491 __ verify_FPU(0, "save_live_registers"); 492 493 return do_generate_oop_map 494 ? generate_oop_map(sasm, num_rt_args, save_fpu_registers) 495 : NULL; 496 } 497 498 499 static void restore_fpu(StubAssembler* sasm, bool restore_fpu_registers = true) { 500 if (restore_fpu_registers) { 501 if (UseSSE >= 2) { 502 // restore XMM registers 503 int xmm_bypass_limit = FrameMap::nof_xmm_regs; 504 #ifdef _LP64 505 if (UseAVX < 3) { 506 xmm_bypass_limit = xmm_bypass_limit / 2; 507 } 508 #endif 509 int offset = 0; 510 for (int n = 0; n < xmm_bypass_limit; n++) { 511 XMMRegister xmm_name = as_XMMRegister(n); 512 __ movdbl(xmm_name, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset)); 513 offset += 8; 514 } 515 } else if (UseSSE == 1) { 516 // restore XMM registers(num MMX == num fpu) 517 int offset = 0; 518 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) { 519 XMMRegister xmm_name = as_XMMRegister(n); 520 __ movflt(xmm_name, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset)); 521 offset += 8; 522 } 523 } 524 525 if (UseSSE < 2) { 526 __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size)); 527 } else { 528 // check that FPU stack is really empty 529 __ verify_FPU(0, "restore_live_registers"); 530 } 531 532 } else { 533 // check that FPU stack is really empty 534 __ verify_FPU(0, "restore_live_registers"); 535 } 536 537 #ifdef ASSERT 538 { 539 Label ok; 540 __ cmpptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef); 541 __ jcc(Assembler::equal, ok); 542 __ stop("bad offsets in frame"); 543 __ bind(ok); 544 } 545 #endif // ASSERT 546 547 __ addptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size); 548 } 549 550 551 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) { 552 __ block_comment("restore_live_registers"); 553 554 restore_fpu(sasm, restore_fpu_registers); 555 __ popa(); 556 } 557 558 559 static void restore_live_registers_except_rax(StubAssembler* sasm, bool restore_fpu_registers = true) { 560 __ block_comment("restore_live_registers_except_rax"); 561 562 restore_fpu(sasm, restore_fpu_registers); 563 564 #ifdef _LP64 565 __ movptr(r15, Address(rsp, 0)); 566 __ movptr(r14, Address(rsp, wordSize)); 567 __ movptr(r13, Address(rsp, 2 * wordSize)); 568 __ movptr(r12, Address(rsp, 3 * wordSize)); 569 __ movptr(r11, Address(rsp, 4 * wordSize)); 570 __ movptr(r10, Address(rsp, 5 * wordSize)); 571 __ movptr(r9, Address(rsp, 6 * wordSize)); 572 __ movptr(r8, Address(rsp, 7 * wordSize)); 573 __ movptr(rdi, Address(rsp, 8 * wordSize)); 574 __ movptr(rsi, Address(rsp, 9 * wordSize)); 575 __ movptr(rbp, Address(rsp, 10 * wordSize)); 576 // skip rsp 577 __ movptr(rbx, Address(rsp, 12 * wordSize)); 578 __ movptr(rdx, Address(rsp, 13 * wordSize)); 579 __ movptr(rcx, Address(rsp, 14 * wordSize)); 580 581 __ addptr(rsp, 16 * wordSize); 582 #else 583 584 __ pop(rdi); 585 __ pop(rsi); 586 __ pop(rbp); 587 __ pop(rbx); // skip this value 588 __ pop(rbx); 589 __ pop(rdx); 590 __ pop(rcx); 591 __ addptr(rsp, BytesPerWord); 592 #endif // _LP64 593 } 594 595 596 void Runtime1::initialize_pd() { 597 // nothing to do 598 } 599 600 601 // target: the entry point of the method that creates and posts the exception oop 602 // has_argument: true if the exception needs an argument (passed on stack because registers must be preserved) 603 604 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) { 605 // preserve all registers 606 int num_rt_args = has_argument ? 2 : 1; 607 OopMap* oop_map = save_live_registers(sasm, num_rt_args); 608 609 // now all registers are saved and can be used freely 610 // verify that no old value is used accidentally 611 __ invalidate_registers(true, true, true, true, true, true); 612 613 // registers used by this stub 614 const Register temp_reg = rbx; 615 616 // load argument for exception that is passed as an argument into the stub 617 if (has_argument) { 618 #ifdef _LP64 619 __ movptr(c_rarg1, Address(rbp, 2*BytesPerWord)); 620 #else 621 __ movptr(temp_reg, Address(rbp, 2*BytesPerWord)); 622 __ push(temp_reg); 623 #endif // _LP64 624 } 625 int call_offset = __ call_RT(noreg, noreg, target, num_rt_args - 1); 626 627 OopMapSet* oop_maps = new OopMapSet(); 628 oop_maps->add_gc_map(call_offset, oop_map); 629 630 __ stop("should not reach here"); 631 632 return oop_maps; 633 } 634 635 636 OopMapSet* Runtime1::generate_handle_exception(StubID id, StubAssembler *sasm) { 637 __ block_comment("generate_handle_exception"); 638 639 // incoming parameters 640 const Register exception_oop = rax; 641 const Register exception_pc = rdx; 642 // other registers used in this stub 643 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); 644 645 // Save registers, if required. 646 OopMapSet* oop_maps = new OopMapSet(); 647 OopMap* oop_map = NULL; 648 switch (id) { 649 case forward_exception_id: 650 // We're handling an exception in the context of a compiled frame. 651 // The registers have been saved in the standard places. Perform 652 // an exception lookup in the caller and dispatch to the handler 653 // if found. Otherwise unwind and dispatch to the callers 654 // exception handler. 655 oop_map = generate_oop_map(sasm, 1 /*thread*/); 656 657 // load and clear pending exception oop into RAX 658 __ movptr(exception_oop, Address(thread, Thread::pending_exception_offset())); 659 __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD); 660 661 // load issuing PC (the return address for this stub) into rdx 662 __ movptr(exception_pc, Address(rbp, 1*BytesPerWord)); 663 664 // make sure that the vm_results are cleared (may be unnecessary) 665 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); 666 __ movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD); 667 break; 668 case handle_exception_nofpu_id: 669 case handle_exception_id: 670 // At this point all registers MAY be live. 671 oop_map = save_live_registers(sasm, 1 /*thread*/, id != handle_exception_nofpu_id); 672 break; 673 case handle_exception_from_callee_id: { 674 // At this point all registers except exception oop (RAX) and 675 // exception pc (RDX) are dead. 676 const int frame_size = 2 /*BP, return address*/ NOT_LP64(+ 1 /*thread*/) WIN64_ONLY(+ frame::arg_reg_save_area_bytes / BytesPerWord); 677 oop_map = new OopMap(frame_size * VMRegImpl::slots_per_word, 0); 678 sasm->set_frame_size(frame_size); 679 WIN64_ONLY(__ subq(rsp, frame::arg_reg_save_area_bytes)); 680 break; 681 } 682 default: ShouldNotReachHere(); 683 } 684 685 #ifdef TIERED 686 // C2 can leave the fpu stack dirty 687 if (UseSSE < 2) { 688 __ empty_FPU_stack(); 689 } 690 #endif // TIERED 691 692 // verify that only rax, and rdx is valid at this time 693 __ invalidate_registers(false, true, true, false, true, true); 694 // verify that rax, contains a valid exception 695 __ verify_not_null_oop(exception_oop); 696 697 // load address of JavaThread object for thread-local data 698 NOT_LP64(__ get_thread(thread);) 699 700 #ifdef ASSERT 701 // check that fields in JavaThread for exception oop and issuing pc are 702 // empty before writing to them 703 Label oop_empty; 704 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t) NULL_WORD); 705 __ jcc(Assembler::equal, oop_empty); 706 __ stop("exception oop already set"); 707 __ bind(oop_empty); 708 709 Label pc_empty; 710 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0); 711 __ jcc(Assembler::equal, pc_empty); 712 __ stop("exception pc already set"); 713 __ bind(pc_empty); 714 #endif 715 716 // save exception oop and issuing pc into JavaThread 717 // (exception handler will load it from here) 718 __ movptr(Address(thread, JavaThread::exception_oop_offset()), exception_oop); 719 __ movptr(Address(thread, JavaThread::exception_pc_offset()), exception_pc); 720 721 // patch throwing pc into return address (has bci & oop map) 722 __ movptr(Address(rbp, 1*BytesPerWord), exception_pc); 723 724 // compute the exception handler. 725 // the exception oop and the throwing pc are read from the fields in JavaThread 726 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc)); 727 oop_maps->add_gc_map(call_offset, oop_map); 728 729 // rax: handler address 730 // will be the deopt blob if nmethod was deoptimized while we looked up 731 // handler regardless of whether handler existed in the nmethod. 732 733 // only rax, is valid at this time, all other registers have been destroyed by the runtime call 734 __ invalidate_registers(false, true, true, true, true, true); 735 736 // patch the return address, this stub will directly return to the exception handler 737 __ movptr(Address(rbp, 1*BytesPerWord), rax); 738 739 switch (id) { 740 case forward_exception_id: 741 case handle_exception_nofpu_id: 742 case handle_exception_id: 743 // Restore the registers that were saved at the beginning. 744 restore_live_registers(sasm, id != handle_exception_nofpu_id); 745 break; 746 case handle_exception_from_callee_id: 747 // WIN64_ONLY: No need to add frame::arg_reg_save_area_bytes to SP 748 // since we do a leave anyway. 749 750 // Pop the return address. 751 __ leave(); 752 __ pop(rcx); 753 __ jmp(rcx); // jump to exception handler 754 break; 755 default: ShouldNotReachHere(); 756 } 757 758 return oop_maps; 759 } 760 761 762 void Runtime1::generate_unwind_exception(StubAssembler *sasm) { 763 // incoming parameters 764 const Register exception_oop = rax; 765 // callee-saved copy of exception_oop during runtime call 766 const Register exception_oop_callee_saved = NOT_LP64(rsi) LP64_ONLY(r14); 767 // other registers used in this stub 768 const Register exception_pc = rdx; 769 const Register handler_addr = rbx; 770 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); 771 772 // verify that only rax, is valid at this time 773 __ invalidate_registers(false, true, true, true, true, true); 774 775 #ifdef ASSERT 776 // check that fields in JavaThread for exception oop and issuing pc are empty 777 NOT_LP64(__ get_thread(thread);) 778 Label oop_empty; 779 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), 0); 780 __ jcc(Assembler::equal, oop_empty); 781 __ stop("exception oop must be empty"); 782 __ bind(oop_empty); 783 784 Label pc_empty; 785 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0); 786 __ jcc(Assembler::equal, pc_empty); 787 __ stop("exception pc must be empty"); 788 __ bind(pc_empty); 789 #endif 790 791 // clear the FPU stack in case any FPU results are left behind 792 __ empty_FPU_stack(); 793 794 // save exception_oop in callee-saved register to preserve it during runtime calls 795 __ verify_not_null_oop(exception_oop); 796 __ movptr(exception_oop_callee_saved, exception_oop); 797 798 NOT_LP64(__ get_thread(thread);) 799 // Get return address (is on top of stack after leave). 800 __ movptr(exception_pc, Address(rsp, 0)); 801 802 // search the exception handler address of the caller (using the return address) 803 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), thread, exception_pc); 804 // rax: exception handler address of the caller 805 806 // Only RAX and RSI are valid at this time, all other registers have been destroyed by the call. 807 __ invalidate_registers(false, true, true, true, false, true); 808 809 // move result of call into correct register 810 __ movptr(handler_addr, rax); 811 812 // Restore exception oop to RAX (required convention of exception handler). 813 __ movptr(exception_oop, exception_oop_callee_saved); 814 815 // verify that there is really a valid exception in rax 816 __ verify_not_null_oop(exception_oop); 817 818 // get throwing pc (= return address). 819 // rdx has been destroyed by the call, so it must be set again 820 // the pop is also necessary to simulate the effect of a ret(0) 821 __ pop(exception_pc); 822 823 // continue at exception handler (return address removed) 824 // note: do *not* remove arguments when unwinding the 825 // activation since the caller assumes having 826 // all arguments on the stack when entering the 827 // runtime to determine the exception handler 828 // (GC happens at call site with arguments!) 829 // rax: exception oop 830 // rdx: throwing pc 831 // rbx: exception handler 832 __ jmp(handler_addr); 833 } 834 835 836 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) { 837 // use the maximum number of runtime-arguments here because it is difficult to 838 // distinguish each RT-Call. 839 // Note: This number affects also the RT-Call in generate_handle_exception because 840 // the oop-map is shared for all calls. 841 const int num_rt_args = 2; // thread + dummy 842 843 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob(); 844 assert(deopt_blob != NULL, "deoptimization blob must have been created"); 845 846 OopMap* oop_map = save_live_registers(sasm, num_rt_args); 847 848 #ifdef _LP64 849 const Register thread = r15_thread; 850 // No need to worry about dummy 851 __ mov(c_rarg0, thread); 852 #else 853 __ push(rax); // push dummy 854 855 const Register thread = rdi; // is callee-saved register (Visual C++ calling conventions) 856 // push java thread (becomes first argument of C function) 857 __ get_thread(thread); 858 __ push(thread); 859 #endif // _LP64 860 __ set_last_Java_frame(thread, noreg, rbp, NULL); 861 // do the call 862 __ call(RuntimeAddress(target)); 863 OopMapSet* oop_maps = new OopMapSet(); 864 oop_maps->add_gc_map(__ offset(), oop_map); 865 // verify callee-saved register 866 #ifdef ASSERT 867 guarantee(thread != rax, "change this code"); 868 __ push(rax); 869 { Label L; 870 __ get_thread(rax); 871 __ cmpptr(thread, rax); 872 __ jcc(Assembler::equal, L); 873 __ stop("StubAssembler::call_RT: rdi/r15 not callee saved?"); 874 __ bind(L); 875 } 876 __ pop(rax); 877 #endif 878 __ reset_last_Java_frame(thread, true); 879 #ifndef _LP64 880 __ pop(rcx); // discard thread arg 881 __ pop(rcx); // discard dummy 882 #endif // _LP64 883 884 // check for pending exceptions 885 { Label L; 886 __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); 887 __ jcc(Assembler::equal, L); 888 // exception pending => remove activation and forward to exception handler 889 890 __ testptr(rax, rax); // have we deoptimized? 891 __ jump_cc(Assembler::equal, 892 RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id))); 893 894 // the deopt blob expects exceptions in the special fields of 895 // JavaThread, so copy and clear pending exception. 896 897 // load and clear pending exception 898 __ movptr(rax, Address(thread, Thread::pending_exception_offset())); 899 __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD); 900 901 // check that there is really a valid exception 902 __ verify_not_null_oop(rax); 903 904 // load throwing pc: this is the return address of the stub 905 __ movptr(rdx, Address(rsp, return_off * VMRegImpl::stack_slot_size)); 906 907 #ifdef ASSERT 908 // check that fields in JavaThread for exception oop and issuing pc are empty 909 Label oop_empty; 910 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD); 911 __ jcc(Assembler::equal, oop_empty); 912 __ stop("exception oop must be empty"); 913 __ bind(oop_empty); 914 915 Label pc_empty; 916 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); 917 __ jcc(Assembler::equal, pc_empty); 918 __ stop("exception pc must be empty"); 919 __ bind(pc_empty); 920 #endif 921 922 // store exception oop and throwing pc to JavaThread 923 __ movptr(Address(thread, JavaThread::exception_oop_offset()), rax); 924 __ movptr(Address(thread, JavaThread::exception_pc_offset()), rdx); 925 926 restore_live_registers(sasm); 927 928 __ leave(); 929 __ addptr(rsp, BytesPerWord); // remove return address from stack 930 931 // Forward the exception directly to deopt blob. We can blow no 932 // registers and must leave throwing pc on the stack. A patch may 933 // have values live in registers so the entry point with the 934 // exception in tls. 935 __ jump(RuntimeAddress(deopt_blob->unpack_with_exception_in_tls())); 936 937 __ bind(L); 938 } 939 940 941 // Runtime will return true if the nmethod has been deoptimized during 942 // the patching process. In that case we must do a deopt reexecute instead. 943 944 Label reexecuteEntry, cont; 945 946 __ testptr(rax, rax); // have we deoptimized? 947 __ jcc(Assembler::equal, cont); // no 948 949 // Will reexecute. Proper return address is already on the stack we just restore 950 // registers, pop all of our frame but the return address and jump to the deopt blob 951 restore_live_registers(sasm); 952 __ leave(); 953 __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution())); 954 955 __ bind(cont); 956 restore_live_registers(sasm); 957 __ leave(); 958 __ ret(0); 959 960 return oop_maps; 961 } 962 963 static void heap_support_stub(StubAssembler* sasm, Register obj, 964 Register size_in_bytes, int con_size_in_bytes, 965 Register t1, Register t2) { 966 // Usually, when we invoke the sampling methods from within the client 967 // compiler, we do so in a stub. However, sometimes, we are already in a stub 968 // when we want to call these things, and stack trace gathering gets confused 969 // when you call a stub inside another stub. 970 HEAP_MONITORING(sasm, noreg, size_in_bytes, con_size_in_bytes, obj, t1, t2, \ 971 { \ 972 save_live_registers(sasm, 1, true, false); \ 973 __ NOT_LP64(push(rax)) LP64_ONLY(mov(c_rarg0, rax)); \ 974 __ call(RuntimeAddress( 975 CAST_FROM_FN_PTR(address, \ 976 HeapMonitoring::object_alloc_unsized))); \ 977 NOT_LP64(__ pop(rax)); \ 978 restore_live_registers(sasm); \ 979 }); 980 } 981 982 OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) { 983 984 // for better readability 985 const bool must_gc_arguments = true; 986 const bool dont_gc_arguments = false; 987 988 // default value; overwritten for some optimized stubs that are called from methods that do not use the fpu 989 bool save_fpu_registers = true; 990 991 // stub code & info for the different stubs 992 OopMapSet* oop_maps = NULL; 993 switch (id) { 994 case forward_exception_id: 995 { 996 oop_maps = generate_handle_exception(id, sasm); 997 __ leave(); 998 __ ret(0); 999 } 1000 break; 1001 1002 case new_instance_id: 1003 case fast_new_instance_id: 1004 case fast_new_instance_init_check_id: 1005 { 1006 Register klass = rdx; // Incoming 1007 Register obj = rax; // Result 1008 1009 if (id == new_instance_id) { 1010 __ set_info("new_instance", dont_gc_arguments); 1011 } else if (id == fast_new_instance_id) { 1012 __ set_info("fast new_instance", dont_gc_arguments); 1013 } else { 1014 assert(id == fast_new_instance_init_check_id, "bad StubID"); 1015 __ set_info("fast new_instance init check", dont_gc_arguments); 1016 } 1017 1018 if ((id == fast_new_instance_id || id == fast_new_instance_init_check_id) && 1019 UseTLAB && FastTLABRefill) { 1020 Label slow_path; 1021 Register obj_size = rcx; 1022 Register t1 = rbx; 1023 Register t2 = rsi; 1024 assert_different_registers(klass, obj, obj_size, t1, t2); 1025 1026 __ push(rdi); 1027 __ push(rbx); 1028 1029 if (id == fast_new_instance_init_check_id) { 1030 // make sure the klass is initialized 1031 __ cmpb(Address(klass, InstanceKlass::init_state_offset()), InstanceKlass::fully_initialized); 1032 __ jcc(Assembler::notEqual, slow_path); 1033 } 1034 1035 #ifdef ASSERT 1036 // assert object can be fast path allocated 1037 { 1038 Label ok, not_ok; 1039 __ movl(obj_size, Address(klass, Klass::layout_helper_offset())); 1040 __ cmpl(obj_size, 0); // make sure it's an instance (LH > 0) 1041 __ jcc(Assembler::lessEqual, not_ok); 1042 __ testl(obj_size, Klass::_lh_instance_slow_path_bit); 1043 __ jcc(Assembler::zero, ok); 1044 __ bind(not_ok); 1045 __ stop("assert(can be fast path allocated)"); 1046 __ should_not_reach_here(); 1047 __ bind(ok); 1048 } 1049 #endif // ASSERT 1050 1051 // if we got here then the TLAB allocation failed, so try 1052 // refilling the TLAB or allocating directly from eden. 1053 Label retry_tlab, try_eden; 1054 const Register thread = 1055 __ tlab_refill(retry_tlab, try_eden, slow_path); // does not destroy rdx (klass), returns rdi 1056 1057 __ bind(retry_tlab); 1058 1059 // get the instance size (size is postive so movl is fine for 64bit) 1060 __ movl(obj_size, Address(klass, Klass::layout_helper_offset())); 1061 1062 __ tlab_allocate(obj, obj_size, 0, t1, t2, slow_path); 1063 1064 __ initialize_object(obj, klass, obj_size, 0, t1, t2, /* is_tlab_allocated */ true); 1065 __ verify_oop(obj); 1066 heap_support_stub(sasm, obj, obj_size, 0, t1, t2); 1067 __ pop(rbx); 1068 __ pop(rdi); 1069 __ ret(0); 1070 1071 __ bind(try_eden); 1072 // get the instance size (size is postive so movl is fine for 64bit) 1073 __ movl(obj_size, Address(klass, Klass::layout_helper_offset())); 1074 1075 __ eden_allocate(obj, obj_size, 0, t1, slow_path); 1076 __ incr_allocated_bytes(thread, obj_size, 0); 1077 1078 __ initialize_object(obj, klass, obj_size, 0, t1, t2, /* is_tlab_allocated */ false); 1079 __ verify_oop(obj); 1080 __ pop(rbx); 1081 __ pop(rdi); 1082 __ ret(0); 1083 1084 __ bind(slow_path); 1085 __ pop(rbx); 1086 __ pop(rdi); 1087 } 1088 1089 __ enter(); 1090 OopMap* map = save_live_registers(sasm, 2); 1091 int call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_instance), klass); 1092 oop_maps = new OopMapSet(); 1093 oop_maps->add_gc_map(call_offset, map); 1094 restore_live_registers_except_rax(sasm); 1095 __ verify_oop(obj); 1096 __ leave(); 1097 __ ret(0); 1098 1099 // rax,: new instance 1100 } 1101 1102 break; 1103 1104 case counter_overflow_id: 1105 { 1106 Register bci = rax, method = rbx; 1107 __ enter(); 1108 OopMap* map = save_live_registers(sasm, 3); 1109 // Retrieve bci 1110 __ movl(bci, Address(rbp, 2*BytesPerWord)); 1111 // And a pointer to the Method* 1112 __ movptr(method, Address(rbp, 3*BytesPerWord)); 1113 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci, method); 1114 oop_maps = new OopMapSet(); 1115 oop_maps->add_gc_map(call_offset, map); 1116 restore_live_registers(sasm); 1117 __ leave(); 1118 __ ret(0); 1119 } 1120 break; 1121 1122 case new_type_array_id: 1123 case new_object_array_id: 1124 { 1125 Register length = rbx; // Incoming 1126 Register klass = rdx; // Incoming 1127 Register obj = rax; // Result 1128 1129 if (id == new_type_array_id) { 1130 __ set_info("new_type_array", dont_gc_arguments); 1131 } else { 1132 __ set_info("new_object_array", dont_gc_arguments); 1133 } 1134 1135 #ifdef ASSERT 1136 // assert object type is really an array of the proper kind 1137 { 1138 Label ok; 1139 Register t0 = obj; 1140 __ movl(t0, Address(klass, Klass::layout_helper_offset())); 1141 __ sarl(t0, Klass::_lh_array_tag_shift); 1142 int tag = ((id == new_type_array_id) 1143 ? Klass::_lh_array_tag_type_value 1144 : Klass::_lh_array_tag_obj_value); 1145 __ cmpl(t0, tag); 1146 __ jcc(Assembler::equal, ok); 1147 __ stop("assert(is an array klass)"); 1148 __ should_not_reach_here(); 1149 __ bind(ok); 1150 } 1151 #endif // ASSERT 1152 1153 if (UseTLAB && FastTLABRefill) { 1154 Register arr_size = rsi; 1155 Register t1 = rcx; // must be rcx for use as shift count 1156 Register t2 = rdi; 1157 Label slow_path; 1158 assert_different_registers(length, klass, obj, arr_size, t1, t2); 1159 1160 // check that array length is small enough for fast path. 1161 __ cmpl(length, C1_MacroAssembler::max_array_allocation_length); 1162 __ jcc(Assembler::above, slow_path); 1163 1164 // if we got here then the TLAB allocation failed, so try 1165 // refilling the TLAB or allocating directly from eden. 1166 Label retry_tlab, try_eden; 1167 const Register thread = 1168 __ tlab_refill(retry_tlab, try_eden, slow_path); // preserves rbx & rdx, returns rdi 1169 1170 __ bind(retry_tlab); 1171 1172 // get the allocation size: round_up(hdr + length << (layout_helper & 0x1F)) 1173 // since size is positive movl does right thing on 64bit 1174 __ movl(t1, Address(klass, Klass::layout_helper_offset())); 1175 // since size is postive movl does right thing on 64bit 1176 __ movl(arr_size, length); 1177 assert(t1 == rcx, "fixed register usage"); 1178 __ shlptr(arr_size /* by t1=rcx, mod 32 */); 1179 __ shrptr(t1, Klass::_lh_header_size_shift); 1180 __ andptr(t1, Klass::_lh_header_size_mask); 1181 __ addptr(arr_size, t1); 1182 __ addptr(arr_size, MinObjAlignmentInBytesMask); // align up 1183 __ andptr(arr_size, ~MinObjAlignmentInBytesMask); 1184 1185 __ tlab_allocate(obj, arr_size, 0, t1, t2, slow_path); // preserves arr_size 1186 1187 __ initialize_header(obj, klass, length, t1, t2); 1188 __ movb(t1, Address(klass, in_bytes(Klass::layout_helper_offset()) + (Klass::_lh_header_size_shift / BitsPerByte))); 1189 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise"); 1190 assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise"); 1191 __ andptr(t1, Klass::_lh_header_size_mask); 1192 __ subptr(arr_size, t1); // body length 1193 __ addptr(t1, obj); // body start 1194 if (!ZeroTLAB) { 1195 // Initialize body destroys arr_size so remember it. 1196 __ push(arr_size); 1197 __ initialize_body(t1, arr_size, 0, t2); 1198 __ pop(arr_size); 1199 } 1200 heap_support_stub(sasm, obj, arr_size, 0, t1, t2); 1201 __ verify_oop(obj); 1202 __ ret(0); 1203 1204 __ bind(try_eden); 1205 // get the allocation size: round_up(hdr + length << (layout_helper & 0x1F)) 1206 // since size is positive movl does right thing on 64bit 1207 __ movl(t1, Address(klass, Klass::layout_helper_offset())); 1208 // since size is postive movl does right thing on 64bit 1209 __ movl(arr_size, length); 1210 assert(t1 == rcx, "fixed register usage"); 1211 __ shlptr(arr_size /* by t1=rcx, mod 32 */); 1212 __ shrptr(t1, Klass::_lh_header_size_shift); 1213 __ andptr(t1, Klass::_lh_header_size_mask); 1214 __ addptr(arr_size, t1); 1215 __ addptr(arr_size, MinObjAlignmentInBytesMask); // align up 1216 __ andptr(arr_size, ~MinObjAlignmentInBytesMask); 1217 1218 __ eden_allocate(obj, arr_size, 0, t1, slow_path); // preserves arr_size 1219 __ incr_allocated_bytes(thread, arr_size, 0); 1220 1221 __ initialize_header(obj, klass, length, t1, t2); 1222 __ movb(t1, Address(klass, in_bytes(Klass::layout_helper_offset()) + (Klass::_lh_header_size_shift / BitsPerByte))); 1223 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise"); 1224 assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise"); 1225 __ andptr(t1, Klass::_lh_header_size_mask); 1226 __ subptr(arr_size, t1); // body length 1227 __ addptr(t1, obj); // body start 1228 __ initialize_body(t1, arr_size, 0, t2); 1229 __ verify_oop(obj); 1230 __ ret(0); 1231 1232 __ bind(slow_path); 1233 } 1234 1235 __ enter(); 1236 OopMap* map = save_live_registers(sasm, 3); 1237 int call_offset; 1238 if (id == new_type_array_id) { 1239 call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_type_array), klass, length); 1240 } else { 1241 call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_object_array), klass, length); 1242 } 1243 1244 oop_maps = new OopMapSet(); 1245 oop_maps->add_gc_map(call_offset, map); 1246 restore_live_registers_except_rax(sasm); 1247 1248 __ verify_oop(obj); 1249 __ leave(); 1250 __ ret(0); 1251 1252 // rax,: new array 1253 } 1254 break; 1255 1256 case new_multi_array_id: 1257 { StubFrame f(sasm, "new_multi_array", dont_gc_arguments); 1258 // rax,: klass 1259 // rbx,: rank 1260 // rcx: address of 1st dimension 1261 OopMap* map = save_live_registers(sasm, 4); 1262 int call_offset = __ call_RT(rax, noreg, CAST_FROM_FN_PTR(address, new_multi_array), rax, rbx, rcx); 1263 1264 oop_maps = new OopMapSet(); 1265 oop_maps->add_gc_map(call_offset, map); 1266 restore_live_registers_except_rax(sasm); 1267 1268 // rax,: new multi array 1269 __ verify_oop(rax); 1270 } 1271 break; 1272 1273 case register_finalizer_id: 1274 { 1275 __ set_info("register_finalizer", dont_gc_arguments); 1276 1277 // This is called via call_runtime so the arguments 1278 // will be place in C abi locations 1279 1280 #ifdef _LP64 1281 __ verify_oop(c_rarg0); 1282 __ mov(rax, c_rarg0); 1283 #else 1284 // The object is passed on the stack and we haven't pushed a 1285 // frame yet so it's one work away from top of stack. 1286 __ movptr(rax, Address(rsp, 1 * BytesPerWord)); 1287 __ verify_oop(rax); 1288 #endif // _LP64 1289 1290 // load the klass and check the has finalizer flag 1291 Label register_finalizer; 1292 Register t = rsi; 1293 __ load_klass(t, rax); 1294 __ movl(t, Address(t, Klass::access_flags_offset())); 1295 __ testl(t, JVM_ACC_HAS_FINALIZER); 1296 __ jcc(Assembler::notZero, register_finalizer); 1297 __ ret(0); 1298 1299 __ bind(register_finalizer); 1300 __ enter(); 1301 OopMap* oop_map = save_live_registers(sasm, 2 /*num_rt_args */); 1302 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), rax); 1303 oop_maps = new OopMapSet(); 1304 oop_maps->add_gc_map(call_offset, oop_map); 1305 1306 // Now restore all the live registers 1307 restore_live_registers(sasm); 1308 1309 __ leave(); 1310 __ ret(0); 1311 } 1312 break; 1313 1314 case throw_range_check_failed_id: 1315 { StubFrame f(sasm, "range_check_failed", dont_gc_arguments); 1316 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true); 1317 } 1318 break; 1319 1320 case throw_index_exception_id: 1321 { StubFrame f(sasm, "index_range_check_failed", dont_gc_arguments); 1322 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true); 1323 } 1324 break; 1325 1326 case throw_div0_exception_id: 1327 { StubFrame f(sasm, "throw_div0_exception", dont_gc_arguments); 1328 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false); 1329 } 1330 break; 1331 1332 case throw_null_pointer_exception_id: 1333 { StubFrame f(sasm, "throw_null_pointer_exception", dont_gc_arguments); 1334 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false); 1335 } 1336 break; 1337 1338 case handle_exception_nofpu_id: 1339 case handle_exception_id: 1340 { StubFrame f(sasm, "handle_exception", dont_gc_arguments); 1341 oop_maps = generate_handle_exception(id, sasm); 1342 } 1343 break; 1344 1345 case handle_exception_from_callee_id: 1346 { StubFrame f(sasm, "handle_exception_from_callee", dont_gc_arguments); 1347 oop_maps = generate_handle_exception(id, sasm); 1348 } 1349 break; 1350 1351 case unwind_exception_id: 1352 { __ set_info("unwind_exception", dont_gc_arguments); 1353 // note: no stubframe since we are about to leave the current 1354 // activation and we are calling a leaf VM function only. 1355 generate_unwind_exception(sasm); 1356 } 1357 break; 1358 1359 case throw_array_store_exception_id: 1360 { StubFrame f(sasm, "throw_array_store_exception", dont_gc_arguments); 1361 // tos + 0: link 1362 // + 1: return address 1363 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), true); 1364 } 1365 break; 1366 1367 case throw_class_cast_exception_id: 1368 { StubFrame f(sasm, "throw_class_cast_exception", dont_gc_arguments); 1369 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true); 1370 } 1371 break; 1372 1373 case throw_incompatible_class_change_error_id: 1374 { StubFrame f(sasm, "throw_incompatible_class_cast_exception", dont_gc_arguments); 1375 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false); 1376 } 1377 break; 1378 1379 case slow_subtype_check_id: 1380 { 1381 // Typical calling sequence: 1382 // __ push(klass_RInfo); // object klass or other subclass 1383 // __ push(sup_k_RInfo); // array element klass or other superclass 1384 // __ call(slow_subtype_check); 1385 // Note that the subclass is pushed first, and is therefore deepest. 1386 // Previous versions of this code reversed the names 'sub' and 'super'. 1387 // This was operationally harmless but made the code unreadable. 1388 enum layout { 1389 rax_off, SLOT2(raxH_off) 1390 rcx_off, SLOT2(rcxH_off) 1391 rsi_off, SLOT2(rsiH_off) 1392 rdi_off, SLOT2(rdiH_off) 1393 // saved_rbp_off, SLOT2(saved_rbpH_off) 1394 return_off, SLOT2(returnH_off) 1395 sup_k_off, SLOT2(sup_kH_off) 1396 klass_off, SLOT2(superH_off) 1397 framesize, 1398 result_off = klass_off // deepest argument is also the return value 1399 }; 1400 1401 __ set_info("slow_subtype_check", dont_gc_arguments); 1402 __ push(rdi); 1403 __ push(rsi); 1404 __ push(rcx); 1405 __ push(rax); 1406 1407 // This is called by pushing args and not with C abi 1408 __ movptr(rsi, Address(rsp, (klass_off) * VMRegImpl::stack_slot_size)); // subclass 1409 __ movptr(rax, Address(rsp, (sup_k_off) * VMRegImpl::stack_slot_size)); // superclass 1410 1411 Label miss; 1412 __ check_klass_subtype_slow_path(rsi, rax, rcx, rdi, NULL, &miss); 1413 1414 // fallthrough on success: 1415 __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), 1); // result 1416 __ pop(rax); 1417 __ pop(rcx); 1418 __ pop(rsi); 1419 __ pop(rdi); 1420 __ ret(0); 1421 1422 __ bind(miss); 1423 __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), NULL_WORD); // result 1424 __ pop(rax); 1425 __ pop(rcx); 1426 __ pop(rsi); 1427 __ pop(rdi); 1428 __ ret(0); 1429 } 1430 break; 1431 1432 case monitorenter_nofpu_id: 1433 save_fpu_registers = false; 1434 // fall through 1435 case monitorenter_id: 1436 { 1437 StubFrame f(sasm, "monitorenter", dont_gc_arguments); 1438 OopMap* map = save_live_registers(sasm, 3, save_fpu_registers); 1439 1440 // Called with store_parameter and not C abi 1441 1442 f.load_argument(1, rax); // rax,: object 1443 f.load_argument(0, rbx); // rbx,: lock address 1444 1445 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), rax, rbx); 1446 1447 oop_maps = new OopMapSet(); 1448 oop_maps->add_gc_map(call_offset, map); 1449 restore_live_registers(sasm, save_fpu_registers); 1450 } 1451 break; 1452 1453 case monitorexit_nofpu_id: 1454 save_fpu_registers = false; 1455 // fall through 1456 case monitorexit_id: 1457 { 1458 StubFrame f(sasm, "monitorexit", dont_gc_arguments); 1459 OopMap* map = save_live_registers(sasm, 2, save_fpu_registers); 1460 1461 // Called with store_parameter and not C abi 1462 1463 f.load_argument(0, rax); // rax,: lock address 1464 1465 // note: really a leaf routine but must setup last java sp 1466 // => use call_RT for now (speed can be improved by 1467 // doing last java sp setup manually) 1468 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), rax); 1469 1470 oop_maps = new OopMapSet(); 1471 oop_maps->add_gc_map(call_offset, map); 1472 restore_live_registers(sasm, save_fpu_registers); 1473 } 1474 break; 1475 1476 case deoptimize_id: 1477 { 1478 StubFrame f(sasm, "deoptimize", dont_gc_arguments); 1479 const int num_rt_args = 2; // thread, trap_request 1480 OopMap* oop_map = save_live_registers(sasm, num_rt_args); 1481 f.load_argument(0, rax); 1482 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, deoptimize), rax); 1483 oop_maps = new OopMapSet(); 1484 oop_maps->add_gc_map(call_offset, oop_map); 1485 restore_live_registers(sasm); 1486 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob(); 1487 assert(deopt_blob != NULL, "deoptimization blob must have been created"); 1488 __ leave(); 1489 __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution())); 1490 } 1491 break; 1492 1493 case access_field_patching_id: 1494 { StubFrame f(sasm, "access_field_patching", dont_gc_arguments); 1495 // we should set up register map 1496 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching)); 1497 } 1498 break; 1499 1500 case load_klass_patching_id: 1501 { StubFrame f(sasm, "load_klass_patching", dont_gc_arguments); 1502 // we should set up register map 1503 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching)); 1504 } 1505 break; 1506 1507 case load_mirror_patching_id: 1508 { StubFrame f(sasm, "load_mirror_patching", dont_gc_arguments); 1509 // we should set up register map 1510 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_mirror_patching)); 1511 } 1512 break; 1513 1514 case load_appendix_patching_id: 1515 { StubFrame f(sasm, "load_appendix_patching", dont_gc_arguments); 1516 // we should set up register map 1517 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_appendix_patching)); 1518 } 1519 break; 1520 1521 case dtrace_object_alloc_id: 1522 { // rax,: object 1523 StubFrame f(sasm, "dtrace_object_alloc", dont_gc_arguments); 1524 // we can't gc here so skip the oopmap but make sure that all 1525 // the live registers get saved. 1526 save_live_registers(sasm, 1); 1527 1528 __ NOT_LP64(push(rax)) LP64_ONLY(mov(c_rarg0, rax)); 1529 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_object_alloc))); 1530 NOT_LP64(__ pop(rax)); 1531 1532 restore_live_registers(sasm); 1533 } 1534 break; 1535 1536 case heap_object_sample_id: 1537 { // rax,: object 1538 StubFrame f(sasm, "heap_object_sample", dont_gc_arguments); 1539 // We can't gc here so skip the oopmap but make sure that all 1540 // the live registers get saved 1541 save_live_registers(sasm, 1); 1542 1543 __ NOT_LP64(push(rax)) LP64_ONLY(mov(c_rarg0, rax)); 1544 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, 1545 HeapMonitoring::object_alloc))); 1546 NOT_LP64(__ pop(rax)); 1547 1548 restore_live_registers(sasm); 1549 } 1550 break; 1551 1552 case fpu2long_stub_id: 1553 { 1554 // rax, and rdx are destroyed, but should be free since the result is returned there 1555 // preserve rsi,ecx 1556 __ push(rsi); 1557 __ push(rcx); 1558 LP64_ONLY(__ push(rdx);) 1559 1560 // check for NaN 1561 Label return0, do_return, return_min_jlong, do_convert; 1562 1563 Address value_high_word(rsp, wordSize + 4); 1564 Address value_low_word(rsp, wordSize); 1565 Address result_high_word(rsp, 3*wordSize + 4); 1566 Address result_low_word(rsp, 3*wordSize); 1567 1568 __ subptr(rsp, 32); // more than enough on 32bit 1569 __ fst_d(value_low_word); 1570 __ movl(rax, value_high_word); 1571 __ andl(rax, 0x7ff00000); 1572 __ cmpl(rax, 0x7ff00000); 1573 __ jcc(Assembler::notEqual, do_convert); 1574 __ movl(rax, value_high_word); 1575 __ andl(rax, 0xfffff); 1576 __ orl(rax, value_low_word); 1577 __ jcc(Assembler::notZero, return0); 1578 1579 __ bind(do_convert); 1580 __ fnstcw(Address(rsp, 0)); 1581 __ movzwl(rax, Address(rsp, 0)); 1582 __ orl(rax, 0xc00); 1583 __ movw(Address(rsp, 2), rax); 1584 __ fldcw(Address(rsp, 2)); 1585 __ fwait(); 1586 __ fistp_d(result_low_word); 1587 __ fldcw(Address(rsp, 0)); 1588 __ fwait(); 1589 // This gets the entire long in rax on 64bit 1590 __ movptr(rax, result_low_word); 1591 // testing of high bits 1592 __ movl(rdx, result_high_word); 1593 __ mov(rcx, rax); 1594 // What the heck is the point of the next instruction??? 1595 __ xorl(rcx, 0x0); 1596 __ movl(rsi, 0x80000000); 1597 __ xorl(rsi, rdx); 1598 __ orl(rcx, rsi); 1599 __ jcc(Assembler::notEqual, do_return); 1600 __ fldz(); 1601 __ fcomp_d(value_low_word); 1602 __ fnstsw_ax(); 1603 #ifdef _LP64 1604 __ testl(rax, 0x4100); // ZF & CF == 0 1605 __ jcc(Assembler::equal, return_min_jlong); 1606 #else 1607 __ sahf(); 1608 __ jcc(Assembler::above, return_min_jlong); 1609 #endif // _LP64 1610 // return max_jlong 1611 #ifndef _LP64 1612 __ movl(rdx, 0x7fffffff); 1613 __ movl(rax, 0xffffffff); 1614 #else 1615 __ mov64(rax, CONST64(0x7fffffffffffffff)); 1616 #endif // _LP64 1617 __ jmp(do_return); 1618 1619 __ bind(return_min_jlong); 1620 #ifndef _LP64 1621 __ movl(rdx, 0x80000000); 1622 __ xorl(rax, rax); 1623 #else 1624 __ mov64(rax, UCONST64(0x8000000000000000)); 1625 #endif // _LP64 1626 __ jmp(do_return); 1627 1628 __ bind(return0); 1629 __ fpop(); 1630 #ifndef _LP64 1631 __ xorptr(rdx,rdx); 1632 __ xorptr(rax,rax); 1633 #else 1634 __ xorptr(rax, rax); 1635 #endif // _LP64 1636 1637 __ bind(do_return); 1638 __ addptr(rsp, 32); 1639 LP64_ONLY(__ pop(rdx);) 1640 __ pop(rcx); 1641 __ pop(rsi); 1642 __ ret(0); 1643 } 1644 break; 1645 1646 #if INCLUDE_ALL_GCS 1647 case g1_pre_barrier_slow_id: 1648 { 1649 StubFrame f(sasm, "g1_pre_barrier", dont_gc_arguments); 1650 // arg0 : previous value of memory 1651 1652 BarrierSet* bs = Universe::heap()->barrier_set(); 1653 if (bs->kind() != BarrierSet::G1SATBCTLogging) { 1654 __ movptr(rax, (int)id); 1655 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax); 1656 __ should_not_reach_here(); 1657 break; 1658 } 1659 __ push(rax); 1660 __ push(rdx); 1661 1662 const Register pre_val = rax; 1663 const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread); 1664 const Register tmp = rdx; 1665 1666 NOT_LP64(__ get_thread(thread);) 1667 1668 Address queue_active(thread, in_bytes(JavaThread::satb_mark_queue_offset() + 1669 SATBMarkQueue::byte_offset_of_active())); 1670 Address queue_index(thread, in_bytes(JavaThread::satb_mark_queue_offset() + 1671 SATBMarkQueue::byte_offset_of_index())); 1672 Address buffer(thread, in_bytes(JavaThread::satb_mark_queue_offset() + 1673 SATBMarkQueue::byte_offset_of_buf())); 1674 1675 Label done; 1676 Label runtime; 1677 1678 // Is marking still active? 1679 if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) { 1680 __ cmpl(queue_active, 0); 1681 } else { 1682 assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption"); 1683 __ cmpb(queue_active, 0); 1684 } 1685 __ jcc(Assembler::equal, done); 1686 1687 // Can we store original value in the thread's buffer? 1688 1689 __ movptr(tmp, queue_index); 1690 __ testptr(tmp, tmp); 1691 __ jcc(Assembler::zero, runtime); 1692 __ subptr(tmp, wordSize); 1693 __ movptr(queue_index, tmp); 1694 __ addptr(tmp, buffer); 1695 1696 // prev_val (rax) 1697 f.load_argument(0, pre_val); 1698 __ movptr(Address(tmp, 0), pre_val); 1699 __ jmp(done); 1700 1701 __ bind(runtime); 1702 1703 save_live_registers(sasm, 3); 1704 1705 // load the pre-value 1706 f.load_argument(0, rcx); 1707 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), rcx, thread); 1708 1709 restore_live_registers(sasm); 1710 1711 __ bind(done); 1712 1713 __ pop(rdx); 1714 __ pop(rax); 1715 } 1716 break; 1717 1718 case g1_post_barrier_slow_id: 1719 { 1720 StubFrame f(sasm, "g1_post_barrier", dont_gc_arguments); 1721 1722 1723 // arg0: store_address 1724 Address store_addr(rbp, 2*BytesPerWord); 1725 1726 CardTableModRefBS* ct = 1727 barrier_set_cast<CardTableModRefBS>(Universe::heap()->barrier_set()); 1728 assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code"); 1729 1730 Label done; 1731 Label enqueued; 1732 Label runtime; 1733 1734 // At this point we know new_value is non-NULL and the new_value crosses regions. 1735 // Must check to see if card is already dirty 1736 1737 const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread); 1738 1739 Address queue_index(thread, in_bytes(JavaThread::dirty_card_queue_offset() + 1740 DirtyCardQueue::byte_offset_of_index())); 1741 Address buffer(thread, in_bytes(JavaThread::dirty_card_queue_offset() + 1742 DirtyCardQueue::byte_offset_of_buf())); 1743 1744 __ push(rax); 1745 __ push(rcx); 1746 1747 const Register cardtable = rax; 1748 const Register card_addr = rcx; 1749 1750 f.load_argument(0, card_addr); 1751 __ shrptr(card_addr, CardTableModRefBS::card_shift); 1752 // Do not use ExternalAddress to load 'byte_map_base', since 'byte_map_base' is NOT 1753 // a valid address and therefore is not properly handled by the relocation code. 1754 __ movptr(cardtable, (intptr_t)ct->byte_map_base); 1755 __ addptr(card_addr, cardtable); 1756 1757 NOT_LP64(__ get_thread(thread);) 1758 1759 __ cmpb(Address(card_addr, 0), (int)G1SATBCardTableModRefBS::g1_young_card_val()); 1760 __ jcc(Assembler::equal, done); 1761 1762 __ membar(Assembler::Membar_mask_bits(Assembler::StoreLoad)); 1763 __ cmpb(Address(card_addr, 0), (int)CardTableModRefBS::dirty_card_val()); 1764 __ jcc(Assembler::equal, done); 1765 1766 // storing region crossing non-NULL, card is clean. 1767 // dirty card and log. 1768 1769 __ movb(Address(card_addr, 0), (int)CardTableModRefBS::dirty_card_val()); 1770 1771 const Register tmp = rdx; 1772 __ push(rdx); 1773 1774 __ movptr(tmp, queue_index); 1775 __ testptr(tmp, tmp); 1776 __ jcc(Assembler::zero, runtime); 1777 __ subptr(tmp, wordSize); 1778 __ movptr(queue_index, tmp); 1779 __ addptr(tmp, buffer); 1780 __ movptr(Address(tmp, 0), card_addr); 1781 __ jmp(enqueued); 1782 1783 __ bind(runtime); 1784 1785 save_live_registers(sasm, 3); 1786 1787 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), card_addr, thread); 1788 1789 restore_live_registers(sasm); 1790 1791 __ bind(enqueued); 1792 __ pop(rdx); 1793 1794 __ bind(done); 1795 __ pop(rcx); 1796 __ pop(rax); 1797 } 1798 break; 1799 #endif // INCLUDE_ALL_GCS 1800 1801 case predicate_failed_trap_id: 1802 { 1803 StubFrame f(sasm, "predicate_failed_trap", dont_gc_arguments); 1804 1805 OopMap* map = save_live_registers(sasm, 1); 1806 1807 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, predicate_failed_trap)); 1808 oop_maps = new OopMapSet(); 1809 oop_maps->add_gc_map(call_offset, map); 1810 restore_live_registers(sasm); 1811 __ leave(); 1812 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob(); 1813 assert(deopt_blob != NULL, "deoptimization blob must have been created"); 1814 1815 __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution())); 1816 } 1817 break; 1818 1819 default: 1820 { StubFrame f(sasm, "unimplemented entry", dont_gc_arguments); 1821 __ movptr(rax, (int)id); 1822 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax); 1823 __ should_not_reach_here(); 1824 } 1825 break; 1826 } 1827 return oop_maps; 1828 } 1829 1830 #undef __ 1831 1832 const char *Runtime1::pd_name_for_address(address entry) { 1833 return "<unknown function>"; 1834 }