src/cpu/x86/vm/x86_32.ad

*** 6270,6279 ****
--- 6270,6303 ----
    ins_cost(125);
    ins_encode( bswap_long_bytes(dst) );
    ins_pipe( ialu_reg_reg);
  %}
  
+ instruct bytes_reverse_char(eRegI dst) %{
+   match(Set dst (ReverseBytesC dst));
+ 
+   format %{ "BSWAP  $dst\n\t" 
+             "SHR    $dst,16\n\t" %}
+   ins_encode %{
+     __ bswapl($dst$$Register);
+     __ shrl($dst$$Register, 16); 
+   %}
+   ins_pipe( ialu_reg );
+ %}
+ 
+ instruct bytes_reverse_short(eRegI dst) %{
+   match(Set dst (ReverseBytesS dst));
+ 
+   format %{ "BSWAP  $dst\n\t" 
+             "SAR    $dst,16\n\t" %}
+   ins_encode %{
+     __ bswapl($dst$$Register);
+     __ sarl($dst$$Register, 16); 
+   %}
+   ins_pipe( ialu_reg );
+ %}
+ 
  
  //---------- Zeros Count Instructions ------------------------------------------
  
  instruct countLeadingZerosI(eRegI dst, eRegI src, eFlagsReg cr) %{
    predicate(UseCountLeadingZerosInstruction);