src/cpu/x86/vm/x86_64.ad
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@@ -7369,10 +7369,34 @@
opcode(0x0F, 0xC8); /* Opcode 0F /C8 */
ins_encode( REX_reg_wide(dst), OpcP, opc2_reg(dst) );
ins_pipe( ialu_reg);
%}
+instruct bytes_reverse_char(rRegI dst) %{
+ match(Set dst (ReverseBytesC dst));
+
+ format %{ "bswapl $dst\n\t"
+ "shrl $dst,16\n\t" %}
+ ins_encode %{
+ __ bswapl($dst$$Register);
+ __ shrl($dst$$Register, 16);
+ %}
+ ins_pipe( ialu_reg );
+%}
+
+instruct bytes_reverse_short(rRegI dst) %{
+ match(Set dst (ReverseBytesS dst));
+
+ format %{ "bswapl $dst\n\t"
+ "sar $dst,16\n\t" %}
+ ins_encode %{
+ __ bswapl($dst$$Register);
+ __ sarl($dst$$Register, 16);
+ %}
+ ins_pipe( ialu_reg );
+%}
+
instruct loadI_reversed(rRegI dst, memory src) %{
match(Set dst (ReverseBytesI (LoadI src)));
format %{ "bswap_movl $dst, $src" %}
opcode(0x8B, 0x0F, 0xC8); /* Opcode 8B 0F C8 */