1 /*
2 * Copyright (c) 1998, 2016, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "memory/allocation.inline.hpp"
27 #include "opto/ad.hpp"
28 #include "opto/block.hpp"
29 #include "opto/c2compiler.hpp"
30 #include "opto/callnode.hpp"
31 #include "opto/cfgnode.hpp"
32 #include "opto/machnode.hpp"
33 #include "opto/runtime.hpp"
34 #include "opto/chaitin.hpp"
35 #include "runtime/sharedRuntime.hpp"
36
37 // Optimization - Graph Style
38
39 // Check whether val is not-null-decoded compressed oop,
40 // i.e. will grab into the base of the heap if it represents NULL.
41 static bool accesses_heap_base_zone(Node *val) {
42 if (Universe::narrow_oop_base() > 0) { // Implies UseCompressedOops.
43 if (val && val->is_Mach()) {
44 if (val->as_Mach()->ideal_Opcode() == Op_DecodeN) {
45 // This assumes all Decodes with TypePtr::NotNull are matched to nodes that
46 // decode NULL to point to the heap base (Decode_NN).
47 if (val->bottom_type()->is_oopptr()->ptr() == TypePtr::NotNull) {
48 return true;
49 }
50 }
51 // Must recognize load operation with Decode matched in memory operand.
52 // We should not reach here exept for PPC/AIX, as os::zero_page_read_protected()
53 // returns true everywhere else. On PPC, no such memory operands
54 // exist, therefore we did not yet implement a check for such operands.
55 NOT_AIX(Unimplemented());
56 }
57 }
58 return false;
59 }
60
61 static bool needs_explicit_null_check_for_read(Node *val) {
62 // On some OSes (AIX) the page at address 0 is only write protected.
63 // If so, only Store operations will trap.
64 if (os::zero_page_read_protected()) {
65 return false; // Implicit null check will work.
66 }
67 // Also a read accessing the base of a heap-based compressed heap will trap.
68 if (accesses_heap_base_zone(val) && // Hits the base zone page.
69 Universe::narrow_oop_use_implicit_null_checks()) { // Base zone page is protected.
70 return false;
71 }
72
73 return true;
74 }
75
76 //------------------------------implicit_null_check----------------------------
77 // Detect implicit-null-check opportunities. Basically, find NULL checks
78 // with suitable memory ops nearby. Use the memory op to do the NULL check.
79 // I can generate a memory op if there is not one nearby.
80 // The proj is the control projection for the not-null case.
81 // The val is the pointer being checked for nullness or
82 // decodeHeapOop_not_null node if it did not fold into address.
83 void PhaseCFG::implicit_null_check(Block* block, Node *proj, Node *val, int allowed_reasons) {
84 // Assume if null check need for 0 offset then always needed
85 // Intel solaris doesn't support any null checks yet and no
86 // mechanism exists (yet) to set the switches at an os_cpu level
87 if( !ImplicitNullChecks || MacroAssembler::needs_explicit_null_check(0)) return;
88
89 // Make sure the ptr-is-null path appears to be uncommon!
90 float f = block->end()->as_MachIf()->_prob;
91 if( proj->Opcode() == Op_IfTrue ) f = 1.0f - f;
92 if( f > PROB_UNLIKELY_MAG(4) ) return;
93
94 uint bidx = 0; // Capture index of value into memop
95 bool was_store; // Memory op is a store op
96
97 // Get the successor block for if the test ptr is non-null
98 Block* not_null_block; // this one goes with the proj
99 Block* null_block;
100 if (block->get_node(block->number_of_nodes()-1) == proj) {
101 null_block = block->_succs[0];
102 not_null_block = block->_succs[1];
103 } else {
104 assert(block->get_node(block->number_of_nodes()-2) == proj, "proj is one or the other");
105 not_null_block = block->_succs[0];
106 null_block = block->_succs[1];
107 }
108 while (null_block->is_Empty() == Block::empty_with_goto) {
109 null_block = null_block->_succs[0];
110 }
111
112 // Search the exception block for an uncommon trap.
113 // (See Parse::do_if and Parse::do_ifnull for the reason
114 // we need an uncommon trap. Briefly, we need a way to
115 // detect failure of this optimization, as in 6366351.)
116 {
117 bool found_trap = false;
118 for (uint i1 = 0; i1 < null_block->number_of_nodes(); i1++) {
119 Node* nn = null_block->get_node(i1);
120 if (nn->is_MachCall() &&
121 nn->as_MachCall()->entry_point() == SharedRuntime::uncommon_trap_blob()->entry_point()) {
122 const Type* trtype = nn->in(TypeFunc::Parms)->bottom_type();
123 if (trtype->isa_int() && trtype->is_int()->is_con()) {
124 jint tr_con = trtype->is_int()->get_con();
125 Deoptimization::DeoptReason reason = Deoptimization::trap_request_reason(tr_con);
126 Deoptimization::DeoptAction action = Deoptimization::trap_request_action(tr_con);
127 assert((int)reason < (int)BitsPerInt, "recode bit map");
128 if (is_set_nth_bit(allowed_reasons, (int) reason)
129 && action != Deoptimization::Action_none) {
130 // This uncommon trap is sure to recompile, eventually.
131 // When that happens, C->too_many_traps will prevent
132 // this transformation from happening again.
133 found_trap = true;
134 }
135 }
136 break;
137 }
138 }
139 if (!found_trap) {
140 // We did not find an uncommon trap.
141 return;
142 }
143 }
144
145 // Check for decodeHeapOop_not_null node which did not fold into address
146 bool is_decoden = ((intptr_t)val) & 1;
147 val = (Node*)(((intptr_t)val) & ~1);
148
149 assert(!is_decoden || (val->in(0) == NULL) && val->is_Mach() &&
150 (val->as_Mach()->ideal_Opcode() == Op_DecodeN), "sanity");
151
152 // Search the successor block for a load or store who's base value is also
153 // the tested value. There may be several.
154 Node_List *out = new Node_List(Thread::current()->resource_area());
155 MachNode *best = NULL; // Best found so far
156 for (DUIterator i = val->outs(); val->has_out(i); i++) {
157 Node *m = val->out(i);
158 if( !m->is_Mach() ) continue;
159 MachNode *mach = m->as_Mach();
160 was_store = false;
161 int iop = mach->ideal_Opcode();
162 switch( iop ) {
163 case Op_LoadB:
164 case Op_LoadUB:
165 case Op_LoadUS:
166 case Op_LoadD:
167 case Op_LoadF:
168 case Op_LoadI:
169 case Op_LoadL:
170 case Op_LoadP:
171 case Op_LoadN:
172 case Op_LoadS:
173 case Op_LoadKlass:
174 case Op_LoadNKlass:
175 case Op_LoadRange:
176 case Op_LoadD_unaligned:
177 case Op_LoadL_unaligned:
178 assert(mach->in(2) == val, "should be address");
179 break;
180 case Op_StoreB:
181 case Op_StoreC:
182 case Op_StoreCM:
183 case Op_StoreD:
184 case Op_StoreF:
185 case Op_StoreI:
186 case Op_StoreL:
187 case Op_StoreP:
188 case Op_StoreN:
189 case Op_StoreNKlass:
190 was_store = true; // Memory op is a store op
191 // Stores will have their address in slot 2 (memory in slot 1).
192 // If the value being nul-checked is in another slot, it means we
193 // are storing the checked value, which does NOT check the value!
194 if( mach->in(2) != val ) continue;
195 break; // Found a memory op?
196 case Op_StrComp:
197 case Op_StrEquals:
198 case Op_StrIndexOf:
199 case Op_StrIndexOfChar:
200 case Op_AryEq:
201 case Op_StrInflatedCopy:
202 case Op_StrCompressedCopy:
203 case Op_EncodeISOArray:
204 case Op_HasNegatives:
205 // Not a legit memory op for implicit null check regardless of
206 // embedded loads
207 continue;
208 default: // Also check for embedded loads
209 if( !mach->needs_anti_dependence_check() )
210 continue; // Not an memory op; skip it
211 if( must_clone[iop] ) {
212 // Do not move nodes which produce flags because
213 // RA will try to clone it to place near branch and
214 // it will cause recompilation, see clone_node().
215 continue;
216 }
217 {
218 // Check that value is used in memory address in
219 // instructions with embedded load (CmpP val1,(val2+off)).
220 Node* base;
221 Node* index;
222 const MachOper* oper = mach->memory_inputs(base, index);
223 if (oper == NULL || oper == (MachOper*)-1) {
224 continue; // Not an memory op; skip it
225 }
226 if (val == base ||
227 val == index && val->bottom_type()->isa_narrowoop()) {
228 break; // Found it
229 } else {
230 continue; // Skip it
231 }
232 }
233 break;
234 }
235
236 // On some OSes (AIX) the page at address 0 is only write protected.
237 // If so, only Store operations will trap.
238 // But a read accessing the base of a heap-based compressed heap will trap.
239 if (!was_store && needs_explicit_null_check_for_read(val)) {
240 continue;
241 }
242
243 // check if the offset is not too high for implicit exception
244 {
245 intptr_t offset = 0;
246 const TypePtr *adr_type = NULL; // Do not need this return value here
247 const Node* base = mach->get_base_and_disp(offset, adr_type);
248 if (base == NULL || base == NodeSentinel) {
249 // Narrow oop address doesn't have base, only index
250 if( val->bottom_type()->isa_narrowoop() &&
251 MacroAssembler::needs_explicit_null_check(offset) )
252 continue; // Give up if offset is beyond page size
253 // cannot reason about it; is probably not implicit null exception
254 } else {
255 const TypePtr* tptr;
256 if (UseCompressedOops && (Universe::narrow_oop_shift() == 0 ||
257 Universe::narrow_klass_shift() == 0)) {
258 // 32-bits narrow oop can be the base of address expressions
259 tptr = base->get_ptr_type();
260 } else {
261 // only regular oops are expected here
262 tptr = base->bottom_type()->is_ptr();
263 }
264 // Give up if offset is not a compile-time constant
265 if( offset == Type::OffsetBot || tptr->_offset == Type::OffsetBot )
266 continue;
267 offset += tptr->_offset; // correct if base is offseted
268 if( MacroAssembler::needs_explicit_null_check(offset) )
269 continue; // Give up is reference is beyond 4K page size
270 }
271 }
272
273 // Check ctrl input to see if the null-check dominates the memory op
274 Block *cb = get_block_for_node(mach);
275 cb = cb->_idom; // Always hoist at least 1 block
276 if( !was_store ) { // Stores can be hoisted only one block
277 while( cb->_dom_depth > (block->_dom_depth + 1))
278 cb = cb->_idom; // Hoist loads as far as we want
279 // The non-null-block should dominate the memory op, too. Live
280 // range spilling will insert a spill in the non-null-block if it is
281 // needs to spill the memory op for an implicit null check.
282 if (cb->_dom_depth == (block->_dom_depth + 1)) {
283 if (cb != not_null_block) continue;
284 cb = cb->_idom;
285 }
286 }
287 if( cb != block ) continue;
288
289 // Found a memory user; see if it can be hoisted to check-block
290 uint vidx = 0; // Capture index of value into memop
291 uint j;
292 for( j = mach->req()-1; j > 0; j-- ) {
293 if( mach->in(j) == val ) {
294 vidx = j;
295 // Ignore DecodeN val which could be hoisted to where needed.
296 if( is_decoden ) continue;
297 }
298 // Block of memory-op input
299 Block *inb = get_block_for_node(mach->in(j));
300 Block *b = block; // Start from nul check
301 while( b != inb && b->_dom_depth > inb->_dom_depth )
302 b = b->_idom; // search upwards for input
303 // See if input dominates null check
304 if( b != inb )
305 break;
306 }
307 if( j > 0 )
308 continue;
309 Block *mb = get_block_for_node(mach);
310 // Hoisting stores requires more checks for the anti-dependence case.
311 // Give up hoisting if we have to move the store past any load.
312 if( was_store ) {
313 Block *b = mb; // Start searching here for a local load
314 // mach use (faulting) trying to hoist
315 // n might be blocker to hoisting
316 while( b != block ) {
317 uint k;
318 for( k = 1; k < b->number_of_nodes(); k++ ) {
319 Node *n = b->get_node(k);
320 if( n->needs_anti_dependence_check() &&
321 n->in(LoadNode::Memory) == mach->in(StoreNode::Memory) )
322 break; // Found anti-dependent load
323 }
324 if( k < b->number_of_nodes() )
325 break; // Found anti-dependent load
326 // Make sure control does not do a merge (would have to check allpaths)
327 if( b->num_preds() != 2 ) break;
328 b = get_block_for_node(b->pred(1)); // Move up to predecessor block
329 }
330 if( b != block ) continue;
331 }
332
333 // Make sure this memory op is not already being used for a NullCheck
334 Node *e = mb->end();
335 if( e->is_MachNullCheck() && e->in(1) == mach )
336 continue; // Already being used as a NULL check
337
338 // Found a candidate! Pick one with least dom depth - the highest
339 // in the dom tree should be closest to the null check.
340 if (best == NULL || get_block_for_node(mach)->_dom_depth < get_block_for_node(best)->_dom_depth) {
341 best = mach;
342 bidx = vidx;
343 }
344 }
345 // No candidate!
346 if (best == NULL) {
347 return;
348 }
349
350 // ---- Found an implicit null check
351 extern int implicit_null_checks;
352 implicit_null_checks++;
353
354 if( is_decoden ) {
355 // Check if we need to hoist decodeHeapOop_not_null first.
356 Block *valb = get_block_for_node(val);
357 if( block != valb && block->_dom_depth < valb->_dom_depth ) {
358 // Hoist it up to the end of the test block.
359 valb->find_remove(val);
360 block->add_inst(val);
361 map_node_to_block(val, block);
362 // DecodeN on x86 may kill flags. Check for flag-killing projections
363 // that also need to be hoisted.
364 for (DUIterator_Fast jmax, j = val->fast_outs(jmax); j < jmax; j++) {
365 Node* n = val->fast_out(j);
366 if( n->is_MachProj() ) {
367 get_block_for_node(n)->find_remove(n);
368 block->add_inst(n);
369 map_node_to_block(n, block);
370 }
371 }
372 }
373 }
374 // Hoist the memory candidate up to the end of the test block.
375 Block *old_block = get_block_for_node(best);
376 old_block->find_remove(best);
377 block->add_inst(best);
378 map_node_to_block(best, block);
379
380 // Move the control dependence
381 if (best->in(0) && best->in(0) == old_block->head())
382 best->set_req(0, block->head());
383
384 // Check for flag-killing projections that also need to be hoisted
385 // Should be DU safe because no edge updates.
386 for (DUIterator_Fast jmax, j = best->fast_outs(jmax); j < jmax; j++) {
387 Node* n = best->fast_out(j);
388 if( n->is_MachProj() ) {
389 get_block_for_node(n)->find_remove(n);
390 block->add_inst(n);
391 map_node_to_block(n, block);
392 }
393 }
394
395 // proj==Op_True --> ne test; proj==Op_False --> eq test.
396 // One of two graph shapes got matched:
397 // (IfTrue (If (Bool NE (CmpP ptr NULL))))
398 // (IfFalse (If (Bool EQ (CmpP ptr NULL))))
399 // NULL checks are always branch-if-eq. If we see a IfTrue projection
400 // then we are replacing a 'ne' test with a 'eq' NULL check test.
401 // We need to flip the projections to keep the same semantics.
402 if( proj->Opcode() == Op_IfTrue ) {
403 // Swap order of projections in basic block to swap branch targets
404 Node *tmp1 = block->get_node(block->end_idx()+1);
405 Node *tmp2 = block->get_node(block->end_idx()+2);
406 block->map_node(tmp2, block->end_idx()+1);
407 block->map_node(tmp1, block->end_idx()+2);
408 Node *tmp = new Node(C->top()); // Use not NULL input
409 tmp1->replace_by(tmp);
410 tmp2->replace_by(tmp1);
411 tmp->replace_by(tmp2);
412 tmp->destruct();
413 }
414
415 // Remove the existing null check; use a new implicit null check instead.
416 // Since schedule-local needs precise def-use info, we need to correct
417 // it as well.
418 Node *old_tst = proj->in(0);
419 MachNode *nul_chk = new MachNullCheckNode(old_tst->in(0),best,bidx);
420 block->map_node(nul_chk, block->end_idx());
421 map_node_to_block(nul_chk, block);
422 // Redirect users of old_test to nul_chk
423 for (DUIterator_Last i2min, i2 = old_tst->last_outs(i2min); i2 >= i2min; --i2)
424 old_tst->last_out(i2)->set_req(0, nul_chk);
425 // Clean-up any dead code
426 for (uint i3 = 0; i3 < old_tst->req(); i3++) {
427 Node* in = old_tst->in(i3);
428 old_tst->set_req(i3, NULL);
429 if (in->outcnt() == 0) {
430 // Remove dead input node
431 in->disconnect_inputs(NULL, C);
432 block->find_remove(in);
433 }
434 }
435
436 latency_from_uses(nul_chk);
437 latency_from_uses(best);
438 }
439
440
441 //------------------------------select-----------------------------------------
442 // Select a nice fellow from the worklist to schedule next. If there is only
443 // one choice, then use it. Projections take top priority for correctness
444 // reasons - if I see a projection, then it is next. There are a number of
445 // other special cases, for instructions that consume condition codes, et al.
446 // These are chosen immediately. Some instructions are required to immediately
447 // precede the last instruction in the block, and these are taken last. Of the
448 // remaining cases (most), choose the instruction with the greatest latency
449 // (that is, the most number of pseudo-cycles required to the end of the
450 // routine). If there is a tie, choose the instruction with the most inputs.
451 Node* PhaseCFG::select(
452 Block* block,
453 Node_List &worklist,
454 GrowableArray<int> &ready_cnt,
455 VectorSet &next_call,
456 uint sched_slot,
457 intptr_t* recalc_pressure_nodes) {
458
459 // If only a single entry on the stack, use it
460 uint cnt = worklist.size();
461 if (cnt == 1) {
462 Node *n = worklist[0];
463 worklist.map(0,worklist.pop());
464 return n;
465 }
466
467 uint choice = 0; // Bigger is most important
468 uint latency = 0; // Bigger is scheduled first
469 uint score = 0; // Bigger is better
470 int idx = -1; // Index in worklist
471 int cand_cnt = 0; // Candidate count
472 bool block_size_threshold_ok = (block->number_of_nodes() > 10) ? true : false;
473
474 for( uint i=0; i<cnt; i++ ) { // Inspect entire worklist
475 // Order in worklist is used to break ties.
476 // See caller for how this is used to delay scheduling
477 // of induction variable increments to after the other
478 // uses of the phi are scheduled.
479 Node *n = worklist[i]; // Get Node on worklist
480
481 int iop = n->is_Mach() ? n->as_Mach()->ideal_Opcode() : 0;
482 if( n->is_Proj() || // Projections always win
483 n->Opcode()== Op_Con || // So does constant 'Top'
484 iop == Op_CreateEx || // Create-exception must start block
485 iop == Op_CheckCastPP
486 ) {
487 worklist.map(i,worklist.pop());
488 return n;
489 }
490
491 // Final call in a block must be adjacent to 'catch'
492 Node *e = block->end();
493 if( e->is_Catch() && e->in(0)->in(0) == n )
494 continue;
495
496 // Memory op for an implicit null check has to be at the end of the block
497 if( e->is_MachNullCheck() && e->in(1) == n )
498 continue;
499
500 // Schedule IV increment last.
501 if (e->is_Mach() && e->as_Mach()->ideal_Opcode() == Op_CountedLoopEnd) {
502 // Cmp might be matched into CountedLoopEnd node.
503 Node *cmp = (e->in(1)->ideal_reg() == Op_RegFlags) ? e->in(1) : e;
504 if (cmp->req() > 1 && cmp->in(1) == n && n->is_iteratively_computed()) {
505 continue;
506 }
507 }
508
509 uint n_choice = 2;
510
511 // See if this instruction is consumed by a branch. If so, then (as the
512 // branch is the last instruction in the basic block) force it to the
513 // end of the basic block
514 if ( must_clone[iop] ) {
515 // See if any use is a branch
516 bool found_machif = false;
517
518 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
519 Node* use = n->fast_out(j);
520
521 // The use is a conditional branch, make them adjacent
522 if (use->is_MachIf() && get_block_for_node(use) == block) {
523 found_machif = true;
524 break;
525 }
526
527 // More than this instruction pending for successor to be ready,
528 // don't choose this if other opportunities are ready
529 if (ready_cnt.at(use->_idx) > 1)
530 n_choice = 1;
531 }
532
533 // loop terminated, prefer not to use this instruction
534 if (found_machif)
535 continue;
536 }
537
538 // See if this has a predecessor that is "must_clone", i.e. sets the
539 // condition code. If so, choose this first
540 for (uint j = 0; j < n->req() ; j++) {
541 Node *inn = n->in(j);
542 if (inn) {
543 if (inn->is_Mach() && must_clone[inn->as_Mach()->ideal_Opcode()] ) {
544 n_choice = 3;
545 break;
546 }
547 }
548 }
549
550 // MachTemps should be scheduled last so they are near their uses
551 if (n->is_MachTemp()) {
552 n_choice = 1;
553 }
554
555 uint n_latency = get_latency_for_node(n);
556 uint n_score = n->req(); // Many inputs get high score to break ties
557
558 if (OptoRegScheduling && block_size_threshold_ok) {
559 if (recalc_pressure_nodes[n->_idx] == 0x7fff7fff) {
560 _regalloc->_scratch_int_pressure.init(_regalloc->_sched_int_pressure.high_pressure_limit());
561 _regalloc->_scratch_float_pressure.init(_regalloc->_sched_float_pressure.high_pressure_limit());
562 // simulate the notion that we just picked this node to schedule
563 n->add_flag(Node::Flag_is_scheduled);
564 // now caculate its effect upon the graph if we did
565 adjust_register_pressure(n, block, recalc_pressure_nodes, false);
566 // return its state for finalize in case somebody else wins
567 n->remove_flag(Node::Flag_is_scheduled);
568 // now save the two final pressure components of register pressure, limiting pressure calcs to short size
569 short int_pressure = (short)_regalloc->_scratch_int_pressure.current_pressure();
570 short float_pressure = (short)_regalloc->_scratch_float_pressure.current_pressure();
571 recalc_pressure_nodes[n->_idx] = int_pressure;
572 recalc_pressure_nodes[n->_idx] |= (float_pressure << 16);
573 }
574
575 if (_scheduling_for_pressure) {
576 latency = n_latency;
577 if (n_choice != 3) {
578 // Now evaluate each register pressure component based on threshold in the score.
579 // In general the defining register type will dominate the score, ergo we will not see register pressure grow on both banks
580 // on a single instruction, but we might see it shrink on both banks.
581 // For each use of register that has a register class that is over the high pressure limit, we build n_score up for
582 // live ranges that terminate on this instruction.
583 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
584 short int_pressure = (short)recalc_pressure_nodes[n->_idx];
585 n_score = (int_pressure < 0) ? ((score + n_score) - int_pressure) : (int_pressure > 0) ? 1 : n_score;
586 }
587 if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
588 short float_pressure = (short)(recalc_pressure_nodes[n->_idx] >> 16);
589 n_score = (float_pressure < 0) ? ((score + n_score) - float_pressure) : (float_pressure > 0) ? 1 : n_score;
590 }
591 } else {
592 // make sure we choose these candidates
593 score = 0;
594 }
595 }
596 }
597
598 // Keep best latency found
599 cand_cnt++;
600 if (choice < n_choice ||
601 (choice == n_choice &&
602 ((StressLCM && Compile::randomized_select(cand_cnt)) ||
603 (!StressLCM &&
604 (latency < n_latency ||
605 (latency == n_latency &&
606 (score < n_score))))))) {
607 choice = n_choice;
608 latency = n_latency;
609 score = n_score;
610 idx = i; // Also keep index in worklist
611 }
612 } // End of for all ready nodes in worklist
613
614 assert(idx >= 0, "index should be set");
615 Node *n = worklist[(uint)idx]; // Get the winner
616
617 worklist.map((uint)idx, worklist.pop()); // Compress worklist
618 return n;
619 }
620
621 //-------------------------adjust_register_pressure----------------------------
622 void PhaseCFG::adjust_register_pressure(Node* n, Block* block, intptr_t* recalc_pressure_nodes, bool finalize_mode) {
623 PhaseLive* liveinfo = _regalloc->get_live();
624 IndexSet* liveout = liveinfo->live(block);
625 // first adjust the register pressure for the sources
626 for (uint i = 1; i < n->req(); i++) {
627 bool lrg_ends = false;
628 Node *src_n = n->in(i);
629 if (src_n == NULL) continue;
630 if (!src_n->is_Mach()) continue;
631 uint src = _regalloc->_lrg_map.find(src_n);
632 if (src == 0) continue;
633 LRG& lrg_src = _regalloc->lrgs(src);
634 // detect if the live range ends or not
635 if (liveout->member(src) == false) {
636 lrg_ends = true;
637 for (DUIterator_Fast jmax, j = src_n->fast_outs(jmax); j < jmax; j++) {
638 Node* m = src_n->fast_out(j); // Get user
639 if (m == n) continue;
640 if (!m->is_Mach()) continue;
641 MachNode *mach = m->as_Mach();
642 bool src_matches = false;
643 int iop = mach->ideal_Opcode();
644
645 switch (iop) {
646 case Op_StoreB:
647 case Op_StoreC:
648 case Op_StoreCM:
649 case Op_StoreD:
650 case Op_StoreF:
651 case Op_StoreI:
652 case Op_StoreL:
653 case Op_StoreP:
654 case Op_StoreN:
655 case Op_StoreVector:
656 case Op_StoreNKlass:
657 for (uint k = 1; k < m->req(); k++) {
658 Node *in = m->in(k);
659 if (in == src_n) {
660 src_matches = true;
661 break;
662 }
663 }
664 break;
665
666 default:
667 src_matches = true;
668 break;
669 }
670
671 // If we have a store as our use, ignore the non source operands
672 if (src_matches == false) continue;
673
674 // Mark every unscheduled use which is not n with a recalculation
675 if ((get_block_for_node(m) == block) && (!m->is_scheduled())) {
676 if (finalize_mode && !m->is_Phi()) {
677 recalc_pressure_nodes[m->_idx] = 0x7fff7fff;
678 }
679 lrg_ends = false;
680 }
681 }
682 }
683 // if none, this live range ends and we can adjust register pressure
684 if (lrg_ends) {
685 if (finalize_mode) {
686 _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
687 } else {
688 _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
689 }
690 }
691 }
692
693 // now add the register pressure from the dest and evaluate which heuristic we should use:
694 // 1.) The default, latency scheduling
695 // 2.) Register pressure scheduling based on the high pressure limit threshold for int or float register stacks
696 uint dst = _regalloc->_lrg_map.find(n);
697 if (dst != 0) {
698 LRG& lrg_dst = _regalloc->lrgs(dst);
699 if (finalize_mode) {
700 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
701 // check to see if we fall over the register pressure cliff here
702 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
703 _scheduling_for_pressure = true;
704 } else if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
705 _scheduling_for_pressure = true;
706 } else {
707 // restore latency scheduling mode
708 _scheduling_for_pressure = false;
709 }
710 } else {
711 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
712 }
713 }
714 }
715
716 //------------------------------set_next_call----------------------------------
717 void PhaseCFG::set_next_call(Block* block, Node* n, VectorSet& next_call) {
718 if( next_call.test_set(n->_idx) ) return;
719 for( uint i=0; i<n->len(); i++ ) {
720 Node *m = n->in(i);
721 if( !m ) continue; // must see all nodes in block that precede call
722 if (get_block_for_node(m) == block) {
723 set_next_call(block, m, next_call);
724 }
725 }
726 }
727
728 //------------------------------needed_for_next_call---------------------------
729 // Set the flag 'next_call' for each Node that is needed for the next call to
730 // be scheduled. This flag lets me bias scheduling so Nodes needed for the
731 // next subroutine call get priority - basically it moves things NOT needed
732 // for the next call till after the call. This prevents me from trying to
733 // carry lots of stuff live across a call.
734 void PhaseCFG::needed_for_next_call(Block* block, Node* this_call, VectorSet& next_call) {
735 // Find the next control-defining Node in this block
736 Node* call = NULL;
737 for (DUIterator_Fast imax, i = this_call->fast_outs(imax); i < imax; i++) {
738 Node* m = this_call->fast_out(i);
739 if (get_block_for_node(m) == block && // Local-block user
740 m != this_call && // Not self-start node
741 m->is_MachCall()) {
742 call = m;
743 break;
744 }
745 }
746 if (call == NULL) return; // No next call (e.g., block end is near)
747 // Set next-call for all inputs to this call
748 set_next_call(block, call, next_call);
749 }
750
751 //------------------------------add_call_kills-------------------------------------
752 // helper function that adds caller save registers to MachProjNode
753 static void add_call_kills(MachProjNode *proj, RegMask& regs, const char* save_policy, bool exclude_soe) {
754 // Fill in the kill mask for the call
755 for( OptoReg::Name r = OptoReg::Name(0); r < _last_Mach_Reg; r=OptoReg::add(r,1) ) {
756 if( !regs.Member(r) ) { // Not already defined by the call
757 // Save-on-call register?
758 if ((save_policy[r] == 'C') ||
759 (save_policy[r] == 'A') ||
760 ((save_policy[r] == 'E') && exclude_soe)) {
761 proj->_rout.Insert(r);
762 }
763 }
764 }
765 }
766
767
768 //------------------------------sched_call-------------------------------------
769 uint PhaseCFG::sched_call(Block* block, uint node_cnt, Node_List& worklist, GrowableArray<int>& ready_cnt, MachCallNode* mcall, VectorSet& next_call) {
770 RegMask regs;
771
772 // Schedule all the users of the call right now. All the users are
773 // projection Nodes, so they must be scheduled next to the call.
774 // Collect all the defined registers.
775 for (DUIterator_Fast imax, i = mcall->fast_outs(imax); i < imax; i++) {
776 Node* n = mcall->fast_out(i);
777 assert( n->is_MachProj(), "" );
778 int n_cnt = ready_cnt.at(n->_idx)-1;
779 ready_cnt.at_put(n->_idx, n_cnt);
780 assert( n_cnt == 0, "" );
781 // Schedule next to call
782 block->map_node(n, node_cnt++);
783 // Collect defined registers
784 regs.OR(n->out_RegMask());
785 // Check for scheduling the next control-definer
786 if( n->bottom_type() == Type::CONTROL )
787 // Warm up next pile of heuristic bits
788 needed_for_next_call(block, n, next_call);
789
790 // Children of projections are now all ready
791 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
792 Node* m = n->fast_out(j); // Get user
793 if(get_block_for_node(m) != block) {
794 continue;
795 }
796 if( m->is_Phi() ) continue;
797 int m_cnt = ready_cnt.at(m->_idx) - 1;
798 ready_cnt.at_put(m->_idx, m_cnt);
799 if( m_cnt == 0 )
800 worklist.push(m);
801 }
802
803 }
804
805 // Act as if the call defines the Frame Pointer.
806 // Certainly the FP is alive and well after the call.
807 regs.Insert(_matcher.c_frame_pointer());
808
809 // Set all registers killed and not already defined by the call.
810 uint r_cnt = mcall->tf()->range()->cnt();
811 int op = mcall->ideal_Opcode();
812 MachProjNode *proj = new MachProjNode( mcall, r_cnt+1, RegMask::Empty, MachProjNode::fat_proj );
813 map_node_to_block(proj, block);
814 block->insert_node(proj, node_cnt++);
815
816 // Select the right register save policy.
817 const char *save_policy = NULL;
818 switch (op) {
819 case Op_CallRuntime:
820 case Op_CallLeaf:
821 case Op_CallLeafNoFP:
822 // Calling C code so use C calling convention
823 save_policy = _matcher._c_reg_save_policy;
824 break;
825
826 case Op_CallStaticJava:
827 case Op_CallDynamicJava:
828 // Calling Java code so use Java calling convention
829 save_policy = _matcher._register_save_policy;
830 break;
831
832 default:
833 ShouldNotReachHere();
834 }
835
836 // When using CallRuntime mark SOE registers as killed by the call
837 // so values that could show up in the RegisterMap aren't live in a
838 // callee saved register since the register wouldn't know where to
839 // find them. CallLeaf and CallLeafNoFP are ok because they can't
840 // have debug info on them. Strictly speaking this only needs to be
841 // done for oops since idealreg2debugmask takes care of debug info
842 // references but there no way to handle oops differently than other
843 // pointers as far as the kill mask goes.
844 bool exclude_soe = op == Op_CallRuntime;
845
846 // If the call is a MethodHandle invoke, we need to exclude the
847 // register which is used to save the SP value over MH invokes from
848 // the mask. Otherwise this register could be used for
849 // deoptimization information.
850 if (op == Op_CallStaticJava) {
851 MachCallStaticJavaNode* mcallstaticjava = (MachCallStaticJavaNode*) mcall;
852 if (mcallstaticjava->_method_handle_invoke)
853 proj->_rout.OR(Matcher::method_handle_invoke_SP_save_mask());
854 }
855
856 add_call_kills(proj, regs, save_policy, exclude_soe);
857
858 return node_cnt;
859 }
860
861
862 //------------------------------schedule_local---------------------------------
863 // Topological sort within a block. Someday become a real scheduler.
864 bool PhaseCFG::schedule_local(Block* block, GrowableArray<int>& ready_cnt, VectorSet& next_call, intptr_t *recalc_pressure_nodes) {
865 // Already "sorted" are the block start Node (as the first entry), and
866 // the block-ending Node and any trailing control projections. We leave
867 // these alone. PhiNodes and ParmNodes are made to follow the block start
868 // Node. Everything else gets topo-sorted.
869
870 #ifndef PRODUCT
871 if (trace_opto_pipelining()) {
872 tty->print_cr("# --- schedule_local B%d, before: ---", block->_pre_order);
873 for (uint i = 0;i < block->number_of_nodes(); i++) {
874 tty->print("# ");
875 block->get_node(i)->fast_dump();
876 }
877 tty->print_cr("#");
878 }
879 #endif
880
881 // RootNode is already sorted
882 if (block->number_of_nodes() == 1) {
883 return true;
884 }
885
886 bool block_size_threshold_ok = (block->number_of_nodes() > 10) ? true : false;
887
888 // We track the uses of local definitions as input dependences so that
889 // we know when a given instruction is avialable to be scheduled.
890 uint i;
891 if (OptoRegScheduling && block_size_threshold_ok) {
892 for (i = 1; i < block->number_of_nodes(); i++) { // setup nodes for pressure calc
893 Node *n = block->get_node(i);
894 n->remove_flag(Node::Flag_is_scheduled);
895 if (!n->is_Phi()) {
896 recalc_pressure_nodes[n->_idx] = 0x7fff7fff;
897 }
898 }
899 }
900
901 // Move PhiNodes and ParmNodes from 1 to cnt up to the start
902 uint node_cnt = block->end_idx();
903 uint phi_cnt = 1;
904 for( i = 1; i<node_cnt; i++ ) { // Scan for Phi
905 Node *n = block->get_node(i);
906 if( n->is_Phi() || // Found a PhiNode or ParmNode
907 (n->is_Proj() && n->in(0) == block->head()) ) {
908 // Move guy at 'phi_cnt' to the end; makes a hole at phi_cnt
909 block->map_node(block->get_node(phi_cnt), i);
910 block->map_node(n, phi_cnt++); // swap Phi/Parm up front
911 if (OptoRegScheduling && block_size_threshold_ok) {
912 // mark n as scheduled
913 n->add_flag(Node::Flag_is_scheduled);
914 }
915 } else { // All others
916 // Count block-local inputs to 'n'
917 uint cnt = n->len(); // Input count
918 uint local = 0;
919 for( uint j=0; j<cnt; j++ ) {
920 Node *m = n->in(j);
921 if( m && get_block_for_node(m) == block && !m->is_top() )
922 local++; // One more block-local input
923 }
924 ready_cnt.at_put(n->_idx, local); // Count em up
925
926 #ifdef ASSERT
927 if( UseConcMarkSweepGC || UseG1GC ) {
928 if( n->is_Mach() && n->as_Mach()->ideal_Opcode() == Op_StoreCM ) {
929 // Check the precedence edges
930 for (uint prec = n->req(); prec < n->len(); prec++) {
931 Node* oop_store = n->in(prec);
932 if (oop_store != NULL) {
933 assert(get_block_for_node(oop_store)->_dom_depth <= block->_dom_depth, "oop_store must dominate card-mark");
934 }
935 }
936 }
937 }
938 #endif
939
940 // A few node types require changing a required edge to a precedence edge
941 // before allocation.
942 if( n->is_Mach() && n->req() > TypeFunc::Parms &&
943 (n->as_Mach()->ideal_Opcode() == Op_MemBarAcquire ||
944 n->as_Mach()->ideal_Opcode() == Op_MemBarVolatile) ) {
945 // MemBarAcquire could be created without Precedent edge.
946 // del_req() replaces the specified edge with the last input edge
947 // and then removes the last edge. If the specified edge > number of
948 // edges the last edge will be moved outside of the input edges array
949 // and the edge will be lost. This is why this code should be
950 // executed only when Precedent (== TypeFunc::Parms) edge is present.
951 Node *x = n->in(TypeFunc::Parms);
952 if (x != NULL && get_block_for_node(x) == block && n->find_prec_edge(x) != -1) {
953 // Old edge to node within same block will get removed, but no precedence
954 // edge will get added because it already exists. Update ready count.
955 int cnt = ready_cnt.at(n->_idx);
956 assert(cnt > 1, "MemBar node %d must not get ready here", n->_idx);
957 ready_cnt.at_put(n->_idx, cnt-1);
958 }
959 n->del_req(TypeFunc::Parms);
960 n->add_prec(x);
961 }
962 }
963 }
964 for(uint i2=i; i2< block->number_of_nodes(); i2++ ) // Trailing guys get zapped count
965 ready_cnt.at_put(block->get_node(i2)->_idx, 0);
966
967 // All the prescheduled guys do not hold back internal nodes
968 uint i3;
969 for (i3 = 0; i3 < phi_cnt; i3++) { // For all pre-scheduled
970 Node *n = block->get_node(i3); // Get pre-scheduled
971 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
972 Node* m = n->fast_out(j);
973 if (get_block_for_node(m) == block) { // Local-block user
974 int m_cnt = ready_cnt.at(m->_idx)-1;
975 if (OptoRegScheduling && block_size_threshold_ok) {
976 // mark m as scheduled
977 if (m_cnt < 0) {
978 m->add_flag(Node::Flag_is_scheduled);
979 }
980 }
981 ready_cnt.at_put(m->_idx, m_cnt); // Fix ready count
982 }
983 }
984 }
985
986 Node_List delay;
987 // Make a worklist
988 Node_List worklist;
989 for(uint i4=i3; i4<node_cnt; i4++ ) { // Put ready guys on worklist
990 Node *m = block->get_node(i4);
991 if( !ready_cnt.at(m->_idx) ) { // Zero ready count?
992 if (m->is_iteratively_computed()) {
993 // Push induction variable increments last to allow other uses
994 // of the phi to be scheduled first. The select() method breaks
995 // ties in scheduling by worklist order.
996 delay.push(m);
997 } else if (m->is_Mach() && m->as_Mach()->ideal_Opcode() == Op_CreateEx) {
998 // Force the CreateEx to the top of the list so it's processed
999 // first and ends up at the start of the block.
1000 worklist.insert(0, m);
1001 } else {
1002 worklist.push(m); // Then on to worklist!
1003 }
1004 }
1005 }
1006 while (delay.size()) {
1007 Node* d = delay.pop();
1008 worklist.push(d);
1009 }
1010
1011 if (OptoRegScheduling && block_size_threshold_ok) {
1012 // To stage register pressure calculations we need to examine the live set variables
1013 // breaking them up by register class to compartmentalize the calculations.
1014 uint float_pressure = Matcher::float_pressure(FLOATPRESSURE);
1015 _regalloc->_sched_int_pressure.init(INTPRESSURE);
1016 _regalloc->_sched_float_pressure.init(float_pressure);
1017 _regalloc->_scratch_int_pressure.init(INTPRESSURE);
1018 _regalloc->_scratch_float_pressure.init(float_pressure);
1019
1020 _regalloc->compute_entry_block_pressure(block);
1021 }
1022
1023 // Warm up the 'next_call' heuristic bits
1024 needed_for_next_call(block, block->head(), next_call);
1025
1026 #ifndef PRODUCT
1027 if (trace_opto_pipelining()) {
1028 for (uint j=0; j< block->number_of_nodes(); j++) {
1029 Node *n = block->get_node(j);
1030 int idx = n->_idx;
1031 tty->print("# ready cnt:%3d ", ready_cnt.at(idx));
1032 tty->print("latency:%3d ", get_latency_for_node(n));
1033 tty->print("%4d: %s\n", idx, n->Name());
1034 }
1035 }
1036 #endif
1037
1038 uint max_idx = (uint)ready_cnt.length();
1039 // Pull from worklist and schedule
1040 while( worklist.size() ) { // Worklist is not ready
1041
1042 #ifndef PRODUCT
1043 if (trace_opto_pipelining()) {
1044 tty->print("# ready list:");
1045 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1046 Node *n = worklist[i]; // Get Node on worklist
1047 tty->print(" %d", n->_idx);
1048 }
1049 tty->cr();
1050 }
1051 #endif
1052
1053 // Select and pop a ready guy from worklist
1054 Node* n = select(block, worklist, ready_cnt, next_call, phi_cnt, recalc_pressure_nodes);
1055 block->map_node(n, phi_cnt++); // Schedule him next
1056
1057 if (OptoRegScheduling && block_size_threshold_ok) {
1058 n->add_flag(Node::Flag_is_scheduled);
1059
1060 // Now adjust the resister pressure with the node we selected
1061 if (!n->is_Phi()) {
1062 adjust_register_pressure(n, block, recalc_pressure_nodes, true);
1063 }
1064 }
1065
1066 #ifndef PRODUCT
1067 if (trace_opto_pipelining()) {
1068 tty->print("# select %d: %s", n->_idx, n->Name());
1069 tty->print(", latency:%d", get_latency_for_node(n));
1070 n->dump();
1071 if (Verbose) {
1072 tty->print("# ready list:");
1073 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1074 Node *n = worklist[i]; // Get Node on worklist
1075 tty->print(" %d", n->_idx);
1076 }
1077 tty->cr();
1078 }
1079 }
1080
1081 #endif
1082 if( n->is_MachCall() ) {
1083 MachCallNode *mcall = n->as_MachCall();
1084 phi_cnt = sched_call(block, phi_cnt, worklist, ready_cnt, mcall, next_call);
1085 continue;
1086 }
1087
1088 if (n->is_Mach() && n->as_Mach()->has_call()) {
1089 RegMask regs;
1090 regs.Insert(_matcher.c_frame_pointer());
1091 regs.OR(n->out_RegMask());
1092
1093 MachProjNode *proj = new MachProjNode( n, 1, RegMask::Empty, MachProjNode::fat_proj );
1094 map_node_to_block(proj, block);
1095 block->insert_node(proj, phi_cnt++);
1096
1097 add_call_kills(proj, regs, _matcher._c_reg_save_policy, false);
1098 }
1099
1100 // Children are now all ready
1101 for (DUIterator_Fast i5max, i5 = n->fast_outs(i5max); i5 < i5max; i5++) {
1102 Node* m = n->fast_out(i5); // Get user
1103 if (get_block_for_node(m) != block) {
1104 continue;
1105 }
1106 if( m->is_Phi() ) continue;
1107 if (m->_idx >= max_idx) { // new node, skip it
1108 assert(m->is_MachProj() && n->is_Mach() && n->as_Mach()->has_call(), "unexpected node types");
1109 continue;
1110 }
1111 int m_cnt = ready_cnt.at(m->_idx) - 1;
1112 ready_cnt.at_put(m->_idx, m_cnt);
1113 if( m_cnt == 0 )
1114 worklist.push(m);
1115 }
1116 }
1117
1118 if( phi_cnt != block->end_idx() ) {
1119 // did not schedule all. Retry, Bailout, or Die
1120 if (C->subsume_loads() == true && !C->failing()) {
1121 // Retry with subsume_loads == false
1122 // If this is the first failure, the sentinel string will "stick"
1123 // to the Compile object, and the C2Compiler will see it and retry.
1124 C->record_failure(C2Compiler::retry_no_subsuming_loads());
1125 }
1126 // assert( phi_cnt == end_idx(), "did not schedule all" );
1127 return false;
1128 }
1129
1130 if (OptoRegScheduling && block_size_threshold_ok) {
1131 _regalloc->compute_exit_block_pressure(block);
1132 block->_reg_pressure = _regalloc->_sched_int_pressure.final_pressure();
1133 block->_freg_pressure = _regalloc->_sched_float_pressure.final_pressure();
1134 }
1135
1136 #ifndef PRODUCT
1137 if (trace_opto_pipelining()) {
1138 tty->print_cr("#");
1139 tty->print_cr("# after schedule_local");
1140 for (uint i = 0;i < block->number_of_nodes();i++) {
1141 tty->print("# ");
1142 block->get_node(i)->fast_dump();
1143 }
1144 tty->print_cr("# ");
1145
1146 if (OptoRegScheduling && block_size_threshold_ok) {
1147 tty->print_cr("# pressure info : %d", block->_pre_order);
1148 _regalloc->print_pressure_info(_regalloc->_sched_int_pressure, "int register info");
1149 _regalloc->print_pressure_info(_regalloc->_sched_float_pressure, "float register info");
1150 }
1151 tty->cr();
1152 }
1153 #endif
1154
1155 return true;
1156 }
1157
1158 //--------------------------catch_cleanup_fix_all_inputs-----------------------
1159 static void catch_cleanup_fix_all_inputs(Node *use, Node *old_def, Node *new_def) {
1160 for (uint l = 0; l < use->len(); l++) {
1161 if (use->in(l) == old_def) {
1162 if (l < use->req()) {
1163 use->set_req(l, new_def);
1164 } else {
1165 use->rm_prec(l);
1166 use->add_prec(new_def);
1167 l--;
1168 }
1169 }
1170 }
1171 }
1172
1173 //------------------------------catch_cleanup_find_cloned_def------------------
1174 Node* PhaseCFG::catch_cleanup_find_cloned_def(Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
1175 assert( use_blk != def_blk, "Inter-block cleanup only");
1176
1177 // The use is some block below the Catch. Find and return the clone of the def
1178 // that dominates the use. If there is no clone in a dominating block, then
1179 // create a phi for the def in a dominating block.
1180
1181 // Find which successor block dominates this use. The successor
1182 // blocks must all be single-entry (from the Catch only; I will have
1183 // split blocks to make this so), hence they all dominate.
1184 while( use_blk->_dom_depth > def_blk->_dom_depth+1 )
1185 use_blk = use_blk->_idom;
1186
1187 // Find the successor
1188 Node *fixup = NULL;
1189
1190 uint j;
1191 for( j = 0; j < def_blk->_num_succs; j++ )
1192 if( use_blk == def_blk->_succs[j] )
1193 break;
1194
1195 if( j == def_blk->_num_succs ) {
1196 // Block at same level in dom-tree is not a successor. It needs a
1197 // PhiNode, the PhiNode uses from the def and IT's uses need fixup.
1198 Node_Array inputs = new Node_List(Thread::current()->resource_area());
1199 for(uint k = 1; k < use_blk->num_preds(); k++) {
1200 Block* block = get_block_for_node(use_blk->pred(k));
1201 inputs.map(k, catch_cleanup_find_cloned_def(block, def, def_blk, n_clone_idx));
1202 }
1203
1204 // Check to see if the use_blk already has an identical phi inserted.
1205 // If it exists, it will be at the first position since all uses of a
1206 // def are processed together.
1207 Node *phi = use_blk->get_node(1);
1208 if( phi->is_Phi() ) {
1209 fixup = phi;
1210 for (uint k = 1; k < use_blk->num_preds(); k++) {
1211 if (phi->in(k) != inputs[k]) {
1212 // Not a match
1213 fixup = NULL;
1214 break;
1215 }
1216 }
1217 }
1218
1219 // If an existing PhiNode was not found, make a new one.
1220 if (fixup == NULL) {
1221 Node *new_phi = PhiNode::make(use_blk->head(), def);
1222 use_blk->insert_node(new_phi, 1);
1223 map_node_to_block(new_phi, use_blk);
1224 for (uint k = 1; k < use_blk->num_preds(); k++) {
1225 new_phi->set_req(k, inputs[k]);
1226 }
1227 fixup = new_phi;
1228 }
1229
1230 } else {
1231 // Found the use just below the Catch. Make it use the clone.
1232 fixup = use_blk->get_node(n_clone_idx);
1233 }
1234
1235 return fixup;
1236 }
1237
1238 //--------------------------catch_cleanup_intra_block--------------------------
1239 // Fix all input edges in use that reference "def". The use is in the same
1240 // block as the def and both have been cloned in each successor block.
1241 static void catch_cleanup_intra_block(Node *use, Node *def, Block *blk, int beg, int n_clone_idx) {
1242
1243 // Both the use and def have been cloned. For each successor block,
1244 // get the clone of the use, and make its input the clone of the def
1245 // found in that block.
1246
1247 uint use_idx = blk->find_node(use);
1248 uint offset_idx = use_idx - beg;
1249 for( uint k = 0; k < blk->_num_succs; k++ ) {
1250 // Get clone in each successor block
1251 Block *sb = blk->_succs[k];
1252 Node *clone = sb->get_node(offset_idx+1);
1253 assert( clone->Opcode() == use->Opcode(), "" );
1254
1255 // Make use-clone reference the def-clone
1256 catch_cleanup_fix_all_inputs(clone, def, sb->get_node(n_clone_idx));
1257 }
1258 }
1259
1260 //------------------------------catch_cleanup_inter_block---------------------
1261 // Fix all input edges in use that reference "def". The use is in a different
1262 // block than the def.
1263 void PhaseCFG::catch_cleanup_inter_block(Node *use, Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
1264 if( !use_blk ) return; // Can happen if the use is a precedence edge
1265
1266 Node *new_def = catch_cleanup_find_cloned_def(use_blk, def, def_blk, n_clone_idx);
1267 catch_cleanup_fix_all_inputs(use, def, new_def);
1268 }
1269
1270 //------------------------------call_catch_cleanup-----------------------------
1271 // If we inserted any instructions between a Call and his CatchNode,
1272 // clone the instructions on all paths below the Catch.
1273 void PhaseCFG::call_catch_cleanup(Block* block) {
1274
1275 // End of region to clone
1276 uint end = block->end_idx();
1277 if( !block->get_node(end)->is_Catch() ) return;
1278 // Start of region to clone
1279 uint beg = end;
1280 while(!block->get_node(beg-1)->is_MachProj() ||
1281 !block->get_node(beg-1)->in(0)->is_MachCall() ) {
1282 beg--;
1283 assert(beg > 0,"Catch cleanup walking beyond block boundary");
1284 }
1285 // Range of inserted instructions is [beg, end)
1286 if( beg == end ) return;
1287
1288 // Clone along all Catch output paths. Clone area between the 'beg' and
1289 // 'end' indices.
1290 for( uint i = 0; i < block->_num_succs; i++ ) {
1291 Block *sb = block->_succs[i];
1292 // Clone the entire area; ignoring the edge fixup for now.
1293 for( uint j = end; j > beg; j-- ) {
1294 // It is safe here to clone a node with anti_dependence
1295 // since clones dominate on each path.
1296 Node *clone = block->get_node(j-1)->clone();
1297 sb->insert_node(clone, 1);
1298 map_node_to_block(clone, sb);
1299 }
1300 }
1301
1302
1303 // Fixup edges. Check the def-use info per cloned Node
1304 for(uint i2 = beg; i2 < end; i2++ ) {
1305 uint n_clone_idx = i2-beg+1; // Index of clone of n in each successor block
1306 Node *n = block->get_node(i2); // Node that got cloned
1307 // Need DU safe iterator because of edge manipulation in calls.
1308 Unique_Node_List *out = new Unique_Node_List(Thread::current()->resource_area());
1309 for (DUIterator_Fast j1max, j1 = n->fast_outs(j1max); j1 < j1max; j1++) {
1310 out->push(n->fast_out(j1));
1311 }
1312 uint max = out->size();
1313 for (uint j = 0; j < max; j++) {// For all users
1314 Node *use = out->pop();
1315 Block *buse = get_block_for_node(use);
1316 if( use->is_Phi() ) {
1317 for( uint k = 1; k < use->req(); k++ )
1318 if( use->in(k) == n ) {
1319 Block* b = get_block_for_node(buse->pred(k));
1320 Node *fixup = catch_cleanup_find_cloned_def(b, n, block, n_clone_idx);
1321 use->set_req(k, fixup);
1322 }
1323 } else {
1324 if (block == buse) {
1325 catch_cleanup_intra_block(use, n, block, beg, n_clone_idx);
1326 } else {
1327 catch_cleanup_inter_block(use, buse, n, block, n_clone_idx);
1328 }
1329 }
1330 } // End for all users
1331
1332 } // End of for all Nodes in cloned area
1333
1334 // Remove the now-dead cloned ops
1335 for(uint i3 = beg; i3 < end; i3++ ) {
1336 block->get_node(beg)->disconnect_inputs(NULL, C);
1337 block->remove_node(beg);
1338 }
1339
1340 // If the successor blocks have a CreateEx node, move it back to the top
1341 for(uint i4 = 0; i4 < block->_num_succs; i4++ ) {
1342 Block *sb = block->_succs[i4];
1343 uint new_cnt = end - beg;
1344 // Remove any newly created, but dead, nodes.
1345 for( uint j = new_cnt; j > 0; j-- ) {
1346 Node *n = sb->get_node(j);
1347 if (n->outcnt() == 0 &&
1348 (!n->is_Proj() || n->as_Proj()->in(0)->outcnt() == 1) ){
1349 n->disconnect_inputs(NULL, C);
1350 sb->remove_node(j);
1351 new_cnt--;
1352 }
1353 }
1354 // If any newly created nodes remain, move the CreateEx node to the top
1355 if (new_cnt > 0) {
1356 Node *cex = sb->get_node(1+new_cnt);
1357 if( cex->is_Mach() && cex->as_Mach()->ideal_Opcode() == Op_CreateEx ) {
1358 sb->remove_node(1+new_cnt);
1359 sb->insert_node(cex, 1);
1360 }
1361 }
1362 }
1363 }