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src/hotspot/share/c1/c1_LinearScan.hpp
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rev 54043 : 8220420: Cleanup c1_LinearScan
Reviewed-by: TBD
*** 32,42 ****
#include "c1/c1_LIR.hpp"
#include "c1/c1_LIRGenerator.hpp"
#include "utilities/align.hpp"
#include "utilities/macros.hpp"
- class DebugInfoCache;
class FpuStackAllocator;
class IRScopeDebugInfo;
class Interval;
class IntervalWalker;
class LIRGenerator;
--- 32,41 ----
*** 188,206 ****
// access to interval list
int interval_count() const { return _intervals.length(); }
Interval* interval_at(int reg_num) const { return _intervals.at(reg_num); }
- IntervalList* new_intervals_from_allocation() const { return _new_intervals_from_allocation; }
-
// access to LIR_Ops and Blocks indexed by op_id
int max_lir_op_id() const { assert(_lir_ops.length() > 0, "no operations"); return (_lir_ops.length() - 1) << 1; }
LIR_Op* lir_op_with_id(int op_id) const { assert(op_id >= 0 && op_id <= max_lir_op_id() && op_id % 2 == 0, "op_id out of range or not even"); return _lir_ops.at(op_id >> 1); }
BlockBegin* block_of_op_with_id(int op_id) const { assert(_block_of_op.length() > 0 && op_id >= 0 && op_id <= max_lir_op_id() + 1, "op_id out of range"); return _block_of_op.at(op_id >> 1); }
bool is_block_begin(int op_id) { return op_id == 0 || block_of_op_with_id(op_id) != block_of_op_with_id(op_id - 1); }
- bool covers_block_begin(int op_id_1, int op_id_2) { return block_of_op_with_id(op_id_1) != block_of_op_with_id(op_id_2); }
bool has_call(int op_id) { assert(op_id % 2 == 0, "must be even"); return _has_call.at(op_id >> 1); }
bool has_info(int op_id) { assert(op_id % 2 == 0, "must be even"); return _has_info.at(op_id >> 1); }
--- 187,202 ----
*** 521,531 ****
int _cached_to; // cached value: to of last range (-1: not cached)
LIR_Opr _cached_opr;
VMReg _cached_vm_reg;
Interval* _split_parent; // the original interval where this interval is derived from
! IntervalList _split_children; // list of all intervals that are split off from this interval (only available for split parents)
Interval* _current_split_child; // the current split child that has been active or inactive last (always stored in split parents)
int _canonical_spill_slot; // the stack slot where all split parts of this interval are spilled to (always stored in split parents)
bool _insert_move_when_activated; // true if move is inserted between _current_split_child and this interval when interval gets active the first time
IntervalSpillState _spill_state; // for spill move optimization
--- 517,527 ----
int _cached_to; // cached value: to of last range (-1: not cached)
LIR_Opr _cached_opr;
VMReg _cached_vm_reg;
Interval* _split_parent; // the original interval where this interval is derived from
! IntervalList* _split_children; // list of all intervals that are split off from this interval (only available for split parents)
Interval* _current_split_child; // the current split child that has been active or inactive last (always stored in split parents)
int _canonical_spill_slot; // the stack slot where all split parts of this interval are spilled to (always stored in split parents)
bool _insert_move_when_activated; // true if move is inserted between _current_split_child and this interval when interval gets active the first time
IntervalSpillState _spill_state; // for spill move optimization
*** 547,557 ****
--- 543,556 ----
void set_type(BasicType type) { assert(_reg_num < LIR_OprDesc::vreg_base || _type == T_ILLEGAL || _type == type, "overwriting existing type"); _type = type; }
Range* first() const { return _first; }
int from() const { return _first->from(); }
int to() { if (_cached_to == -1) _cached_to = calc_to(); assert(_cached_to == calc_to(), "invalid cached value"); return _cached_to; }
+
+ #ifndef PRODUCT
int num_use_positions() const { return _use_pos_and_kinds.length() / 2; }
+ #endif
Interval* next() const { return _next; }
Interval** next_addr() { return &_next; }
void set_next(Interval* next) { _next = next; }
*** 570,580 ****
bool is_split_parent() const { return _split_parent == this; }
bool is_split_child() const { return _split_parent != this; }
Interval* split_parent() const { assert(_split_parent->is_split_parent(), "must be"); return _split_parent; }
Interval* split_child_at_op_id(int op_id, LIR_OpVisitState::OprMode mode);
Interval* split_child_before_op_id(int op_id);
- bool split_child_covers(int op_id, LIR_OpVisitState::OprMode mode);
DEBUG_ONLY(void check_split_children();)
// information stored in split parent, but available for all children
int canonical_spill_slot() const { return split_parent()->_canonical_spill_slot; }
void set_canonical_spill_slot(int slot) { assert(split_parent()->_canonical_spill_slot == -1, "overwriting existing value"); split_parent()->_canonical_spill_slot = slot; }
--- 569,578 ----
*** 656,666 ****
Interval** unhandled_first_addr(IntervalKind kind) { check_bounds(kind); return &_unhandled_first[kind]; }
Interval** active_first_addr(IntervalKind kind) { check_bounds(kind); return &_active_first[kind]; }
Interval** inactive_first_addr(IntervalKind kind) { check_bounds(kind); return &_inactive_first[kind]; }
- void append_unsorted(Interval** first, Interval* interval);
void append_sorted(Interval** first, Interval* interval);
void append_to_unhandled(Interval** list, Interval* interval);
bool remove_from_list(Interval** list, Interval* i);
void remove_from_list(Interval* i);
--- 654,663 ----
*** 731,743 ****
void free_exclude_active_fixed();
void free_exclude_active_any();
void free_collect_inactive_fixed(Interval* cur);
void free_collect_inactive_any(Interval* cur);
- void free_collect_unhandled(IntervalKind kind, Interval* cur);
void spill_exclude_active_fixed();
- void spill_block_unhandled_fixed(Interval* cur);
void spill_block_inactive_fixed(Interval* cur);
void spill_collect_active_any();
void spill_collect_inactive_any(Interval* cur);
void insert_move(int op_id, Interval* src_it, Interval* dst_it);
--- 728,738 ----
*** 751,767 ****
int find_free_reg(int reg_needed_until, int interval_to, int hint_reg, int ignore_reg, bool* need_split);
int find_free_double_reg(int reg_needed_until, int interval_to, int hint_reg, bool* need_split);
bool alloc_free_reg(Interval* cur);
! int find_locked_reg(int reg_needed_until, int interval_to, int hint_reg, int ignore_reg, bool* need_split);
! int find_locked_double_reg(int reg_needed_until, int interval_to, int hint_reg, bool* need_split);
void split_and_spill_intersecting_intervals(int reg, int regHi);
void alloc_locked_reg(Interval* cur);
bool no_allocation_possible(Interval* cur);
- void update_phys_reg_range(bool requires_cpu_register);
void init_vars_for_alloc(Interval* cur);
bool pd_init_regs_for_alloc(Interval* cur);
void combine_spilled_intervals(Interval* cur);
bool is_move(LIR_Op* op, Interval* from, Interval* to);
--- 746,761 ----
int find_free_reg(int reg_needed_until, int interval_to, int hint_reg, int ignore_reg, bool* need_split);
int find_free_double_reg(int reg_needed_until, int interval_to, int hint_reg, bool* need_split);
bool alloc_free_reg(Interval* cur);
! int find_locked_reg(int reg_needed_until, int interval_to, int ignore_reg, bool* need_split);
! int find_locked_double_reg(int reg_needed_until, int interval_to, bool* need_split);
void split_and_spill_intersecting_intervals(int reg, int regHi);
void alloc_locked_reg(Interval* cur);
bool no_allocation_possible(Interval* cur);
void init_vars_for_alloc(Interval* cur);
bool pd_init_regs_for_alloc(Interval* cur);
void combine_spilled_intervals(Interval* cur);
bool is_move(LIR_Op* op, Interval* from, Interval* to);
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