79 // dispatch table to use
80 AddressLiteral tbl(Interpreter::dispatch_table(state));
81 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
82 set(tbl, G3_scratch); // compute addr of table
83 ld_ptr(G3_scratch, Lbyte_code, IdispatchAddress); // get entry addr
84 }
85
86
87 // Dispatch code executed in the epilog of a bytecode which does not do it's
88 // own dispatch. The dispatch address in IdispatchAddress is used for the
89 // dispatch.
90 void InterpreterMacroAssembler::dispatch_epilog(TosState state, int bcp_incr) {
91 assert_not_delayed();
92 verify_FPU(1, state);
93 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
94 jmp( IdispatchAddress, 0 );
95 if (bcp_incr != 0) delayed()->inc(Lbcp, bcp_incr);
96 else delayed()->nop();
97 }
98
99
100 void InterpreterMacroAssembler::dispatch_next(TosState state, int bcp_incr) {
101 // %%%% consider branching to a single shared dispatch stub (for each bcp_incr)
102 assert_not_delayed();
103 ldub( Lbcp, bcp_incr, Lbyte_code); // load next bytecode
104 dispatch_Lbyte_code(state, Interpreter::dispatch_table(state), bcp_incr);
105 }
106
107
108 void InterpreterMacroAssembler::dispatch_next_noverify_oop(TosState state, int bcp_incr) {
109 // %%%% consider branching to a single shared dispatch stub (for each bcp_incr)
110 assert_not_delayed();
111 ldub( Lbcp, bcp_incr, Lbyte_code); // load next bytecode
112 dispatch_Lbyte_code(state, Interpreter::dispatch_table(state), bcp_incr, false);
113 }
114
115
116 void InterpreterMacroAssembler::dispatch_via(TosState state, address* table) {
117 // load current bytecode
118 assert_not_delayed();
119 ldub( Lbcp, 0, Lbyte_code); // load next bytecode
120 dispatch_base(state, table);
121 }
122
123
124 void InterpreterMacroAssembler::call_VM_leaf_base(
245
246 void InterpreterMacroAssembler::dispatch_base(TosState state, address* table) {
247 assert_not_delayed();
248 dispatch_Lbyte_code(state, table);
249 }
250
251
252 void InterpreterMacroAssembler::dispatch_normal(TosState state) {
253 dispatch_base(state, Interpreter::normal_table(state));
254 }
255
256
257 void InterpreterMacroAssembler::dispatch_only(TosState state) {
258 dispatch_base(state, Interpreter::dispatch_table(state));
259 }
260
261
262 // common code to dispatch and dispatch_only
263 // dispatch value in Lbyte_code and increment Lbcp
264
265 void InterpreterMacroAssembler::dispatch_Lbyte_code(TosState state, address* table, int bcp_incr, bool verify) {
266 verify_FPU(1, state);
267 // %%%%% maybe implement +VerifyActivationFrameSize here
268 //verify_thread(); //too slow; we will just verify on method entry & exit
269 if (verify) interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
270 // dispatch table to use
271 AddressLiteral tbl(table);
272 Label dispatch;
273
274 if (SafepointMechanism::uses_thread_local_poll()) {
275 AddressLiteral sfpt_tbl(Interpreter::safept_table(state));
276 Label no_safepoint;
277
278 if (tbl.value() != sfpt_tbl.value()) {
279 ldx(Address(G2_thread, Thread::polling_page_offset()), G3_scratch, 0);
280 // Armed page has poll_bit set, if poll bit is cleared just continue.
281 and3(G3_scratch, SafepointMechanism::poll_bit(), G3_scratch);
282
283 br_null_short(G3_scratch, Assembler::pt, no_safepoint);
284 set(sfpt_tbl, G3_scratch);
285 ba_short(dispatch);
286 }
287 bind(no_safepoint);
288 }
289
290 set(tbl, G3_scratch); // compute addr of table
291 bind(dispatch);
292 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
293 ld_ptr(G3_scratch, Lbyte_code, G3_scratch); // get entry addr
294 jmp( G3_scratch, 0 );
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79 // dispatch table to use
80 AddressLiteral tbl(Interpreter::dispatch_table(state));
81 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
82 set(tbl, G3_scratch); // compute addr of table
83 ld_ptr(G3_scratch, Lbyte_code, IdispatchAddress); // get entry addr
84 }
85
86
87 // Dispatch code executed in the epilog of a bytecode which does not do it's
88 // own dispatch. The dispatch address in IdispatchAddress is used for the
89 // dispatch.
90 void InterpreterMacroAssembler::dispatch_epilog(TosState state, int bcp_incr) {
91 assert_not_delayed();
92 verify_FPU(1, state);
93 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
94 jmp( IdispatchAddress, 0 );
95 if (bcp_incr != 0) delayed()->inc(Lbcp, bcp_incr);
96 else delayed()->nop();
97 }
98
99 void InterpreterMacroAssembler::dispatch_next(TosState state, int bcp_incr, bool generate_poll) {
100 // %%%% consider branching to a single shared dispatch stub (for each bcp_incr)
101 assert_not_delayed();
102 ldub( Lbcp, bcp_incr, Lbyte_code); // load next bytecode
103 dispatch_Lbyte_code(state, Interpreter::dispatch_table(state), bcp_incr, true, generate_poll);
104 }
105
106
107 void InterpreterMacroAssembler::dispatch_next_noverify_oop(TosState state, int bcp_incr) {
108 // %%%% consider branching to a single shared dispatch stub (for each bcp_incr)
109 assert_not_delayed();
110 ldub( Lbcp, bcp_incr, Lbyte_code); // load next bytecode
111 dispatch_Lbyte_code(state, Interpreter::dispatch_table(state), bcp_incr, false);
112 }
113
114
115 void InterpreterMacroAssembler::dispatch_via(TosState state, address* table) {
116 // load current bytecode
117 assert_not_delayed();
118 ldub( Lbcp, 0, Lbyte_code); // load next bytecode
119 dispatch_base(state, table);
120 }
121
122
123 void InterpreterMacroAssembler::call_VM_leaf_base(
244
245 void InterpreterMacroAssembler::dispatch_base(TosState state, address* table) {
246 assert_not_delayed();
247 dispatch_Lbyte_code(state, table);
248 }
249
250
251 void InterpreterMacroAssembler::dispatch_normal(TosState state) {
252 dispatch_base(state, Interpreter::normal_table(state));
253 }
254
255
256 void InterpreterMacroAssembler::dispatch_only(TosState state) {
257 dispatch_base(state, Interpreter::dispatch_table(state));
258 }
259
260
261 // common code to dispatch and dispatch_only
262 // dispatch value in Lbyte_code and increment Lbcp
263
264 void InterpreterMacroAssembler::dispatch_Lbyte_code(TosState state, address* table, int bcp_incr, bool verify, bool generate_poll) {
265 verify_FPU(1, state);
266 // %%%%% maybe implement +VerifyActivationFrameSize here
267 //verify_thread(); //too slow; we will just verify on method entry & exit
268 if (verify) interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
269 // dispatch table to use
270 AddressLiteral tbl(table);
271 Label dispatch;
272
273 if (SafepointMechanism::uses_thread_local_poll() && generate_poll) {
274 AddressLiteral sfpt_tbl(Interpreter::safept_table(state));
275 Label no_safepoint;
276
277 if (tbl.value() != sfpt_tbl.value()) {
278 ldx(Address(G2_thread, Thread::polling_page_offset()), G3_scratch, 0);
279 // Armed page has poll_bit set, if poll bit is cleared just continue.
280 and3(G3_scratch, SafepointMechanism::poll_bit(), G3_scratch);
281
282 br_null_short(G3_scratch, Assembler::pt, no_safepoint);
283 set(sfpt_tbl, G3_scratch);
284 ba_short(dispatch);
285 }
286 bind(no_safepoint);
287 }
288
289 set(tbl, G3_scratch); // compute addr of table
290 bind(dispatch);
291 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
292 ld_ptr(G3_scratch, Lbyte_code, G3_scratch); // get entry addr
293 jmp( G3_scratch, 0 );
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