19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "interp_masm_sparc.hpp"
27 #include "interpreter/interpreter.hpp"
28 #include "interpreter/interpreterRuntime.hpp"
29 #include "logging/log.hpp"
30 #include "oops/arrayOop.hpp"
31 #include "oops/markOop.hpp"
32 #include "oops/methodData.hpp"
33 #include "oops/method.hpp"
34 #include "oops/methodCounters.hpp"
35 #include "prims/jvmtiExport.hpp"
36 #include "prims/jvmtiThreadState.hpp"
37 #include "runtime/basicLock.hpp"
38 #include "runtime/biasedLocking.hpp"
39 #include "runtime/sharedRuntime.hpp"
40 #include "runtime/thread.inline.hpp"
41 #include "utilities/align.hpp"
42
43 // Implementation of InterpreterMacroAssembler
44
45 // This file specializes the assember with interpreter-specific macros
46
47 const Address InterpreterMacroAssembler::l_tmp(FP, (frame::interpreter_frame_l_scratch_fp_offset * wordSize) + STACK_BIAS);
48 const Address InterpreterMacroAssembler::d_tmp(FP, (frame::interpreter_frame_d_scratch_fp_offset * wordSize) + STACK_BIAS);
49
50 void InterpreterMacroAssembler::jump_to_entry(address entry) {
51 assert(entry, "Entry must have been generated by now");
52 AddressLiteral al(entry);
53 jump_to(al, G3_scratch);
54 delayed()->nop();
55 }
56
57 void InterpreterMacroAssembler::compute_extra_locals_size_in_bytes(Register args_size, Register locals_size, Register delta) {
58 // Note: this algorithm is also used by C1's OSR entry sequence.
78 // dispatch table to use
79 AddressLiteral tbl(Interpreter::dispatch_table(state));
80 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
81 set(tbl, G3_scratch); // compute addr of table
82 ld_ptr(G3_scratch, Lbyte_code, IdispatchAddress); // get entry addr
83 }
84
85
86 // Dispatch code executed in the epilog of a bytecode which does not do it's
87 // own dispatch. The dispatch address in IdispatchAddress is used for the
88 // dispatch.
89 void InterpreterMacroAssembler::dispatch_epilog(TosState state, int bcp_incr) {
90 assert_not_delayed();
91 verify_FPU(1, state);
92 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
93 jmp( IdispatchAddress, 0 );
94 if (bcp_incr != 0) delayed()->inc(Lbcp, bcp_incr);
95 else delayed()->nop();
96 }
97
98
99 void InterpreterMacroAssembler::dispatch_next(TosState state, int bcp_incr) {
100 // %%%% consider branching to a single shared dispatch stub (for each bcp_incr)
101 assert_not_delayed();
102 ldub( Lbcp, bcp_incr, Lbyte_code); // load next bytecode
103 dispatch_Lbyte_code(state, Interpreter::dispatch_table(state), bcp_incr);
104 }
105
106
107 void InterpreterMacroAssembler::dispatch_next_noverify_oop(TosState state, int bcp_incr) {
108 // %%%% consider branching to a single shared dispatch stub (for each bcp_incr)
109 assert_not_delayed();
110 ldub( Lbcp, bcp_incr, Lbyte_code); // load next bytecode
111 dispatch_Lbyte_code(state, Interpreter::dispatch_table(state), bcp_incr, false);
112 }
113
114
115 void InterpreterMacroAssembler::dispatch_via(TosState state, address* table) {
116 // load current bytecode
117 assert_not_delayed();
118 ldub( Lbcp, 0, Lbyte_code); // load next bytecode
119 dispatch_base(state, table);
120 }
121
122
123 void InterpreterMacroAssembler::call_VM_leaf_base(
244
245 void InterpreterMacroAssembler::dispatch_base(TosState state, address* table) {
246 assert_not_delayed();
247 dispatch_Lbyte_code(state, table);
248 }
249
250
251 void InterpreterMacroAssembler::dispatch_normal(TosState state) {
252 dispatch_base(state, Interpreter::normal_table(state));
253 }
254
255
256 void InterpreterMacroAssembler::dispatch_only(TosState state) {
257 dispatch_base(state, Interpreter::dispatch_table(state));
258 }
259
260
261 // common code to dispatch and dispatch_only
262 // dispatch value in Lbyte_code and increment Lbcp
263
264 void InterpreterMacroAssembler::dispatch_Lbyte_code(TosState state, address* table, int bcp_incr, bool verify) {
265 verify_FPU(1, state);
266 // %%%%% maybe implement +VerifyActivationFrameSize here
267 //verify_thread(); //too slow; we will just verify on method entry & exit
268 if (verify) interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
269 // dispatch table to use
270 AddressLiteral tbl(table);
271 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
272 set(tbl, G3_scratch); // compute addr of table
273 ld_ptr(G3_scratch, Lbyte_code, G3_scratch); // get entry addr
274 jmp( G3_scratch, 0 );
275 if (bcp_incr != 0) delayed()->inc(Lbcp, bcp_incr);
276 else delayed()->nop();
277 }
278
279
280 // Helpers for expression stack
281
282 // Longs and doubles are Category 2 computational types in the
283 // JVM specification (section 3.11.1) and take 2 expression stack or
284 // local slots.
285 // Aligning them on 32 bit with tagged stacks is hard because the code generated
286 // for the dup* bytecodes depends on what types are already on the stack.
287 // If the types are split into the two stack/local slots, that is much easier
288 // (and we can use 0 for non-reference tags).
289
290 // Known good alignment in _LP64 but unknown otherwise
291 void InterpreterMacroAssembler::load_unaligned_double(Register r1, int offset, FloatRegister d) {
292 assert_not_delayed();
|
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "interp_masm_sparc.hpp"
27 #include "interpreter/interpreter.hpp"
28 #include "interpreter/interpreterRuntime.hpp"
29 #include "logging/log.hpp"
30 #include "oops/arrayOop.hpp"
31 #include "oops/markOop.hpp"
32 #include "oops/methodData.hpp"
33 #include "oops/method.hpp"
34 #include "oops/methodCounters.hpp"
35 #include "prims/jvmtiExport.hpp"
36 #include "prims/jvmtiThreadState.hpp"
37 #include "runtime/basicLock.hpp"
38 #include "runtime/biasedLocking.hpp"
39 #include "runtime/safepointMechanism.hpp"
40 #include "runtime/sharedRuntime.hpp"
41 #include "runtime/thread.inline.hpp"
42 #include "utilities/align.hpp"
43
44 // Implementation of InterpreterMacroAssembler
45
46 // This file specializes the assember with interpreter-specific macros
47
48 const Address InterpreterMacroAssembler::l_tmp(FP, (frame::interpreter_frame_l_scratch_fp_offset * wordSize) + STACK_BIAS);
49 const Address InterpreterMacroAssembler::d_tmp(FP, (frame::interpreter_frame_d_scratch_fp_offset * wordSize) + STACK_BIAS);
50
51 void InterpreterMacroAssembler::jump_to_entry(address entry) {
52 assert(entry, "Entry must have been generated by now");
53 AddressLiteral al(entry);
54 jump_to(al, G3_scratch);
55 delayed()->nop();
56 }
57
58 void InterpreterMacroAssembler::compute_extra_locals_size_in_bytes(Register args_size, Register locals_size, Register delta) {
59 // Note: this algorithm is also used by C1's OSR entry sequence.
79 // dispatch table to use
80 AddressLiteral tbl(Interpreter::dispatch_table(state));
81 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
82 set(tbl, G3_scratch); // compute addr of table
83 ld_ptr(G3_scratch, Lbyte_code, IdispatchAddress); // get entry addr
84 }
85
86
87 // Dispatch code executed in the epilog of a bytecode which does not do it's
88 // own dispatch. The dispatch address in IdispatchAddress is used for the
89 // dispatch.
90 void InterpreterMacroAssembler::dispatch_epilog(TosState state, int bcp_incr) {
91 assert_not_delayed();
92 verify_FPU(1, state);
93 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
94 jmp( IdispatchAddress, 0 );
95 if (bcp_incr != 0) delayed()->inc(Lbcp, bcp_incr);
96 else delayed()->nop();
97 }
98
99 void InterpreterMacroAssembler::dispatch_next(TosState state, int bcp_incr, bool generate_poll) {
100 // %%%% consider branching to a single shared dispatch stub (for each bcp_incr)
101 assert_not_delayed();
102 ldub( Lbcp, bcp_incr, Lbyte_code); // load next bytecode
103 dispatch_Lbyte_code(state, Interpreter::dispatch_table(state), bcp_incr, true, generate_poll);
104 }
105
106
107 void InterpreterMacroAssembler::dispatch_next_noverify_oop(TosState state, int bcp_incr) {
108 // %%%% consider branching to a single shared dispatch stub (for each bcp_incr)
109 assert_not_delayed();
110 ldub( Lbcp, bcp_incr, Lbyte_code); // load next bytecode
111 dispatch_Lbyte_code(state, Interpreter::dispatch_table(state), bcp_incr, false);
112 }
113
114
115 void InterpreterMacroAssembler::dispatch_via(TosState state, address* table) {
116 // load current bytecode
117 assert_not_delayed();
118 ldub( Lbcp, 0, Lbyte_code); // load next bytecode
119 dispatch_base(state, table);
120 }
121
122
123 void InterpreterMacroAssembler::call_VM_leaf_base(
244
245 void InterpreterMacroAssembler::dispatch_base(TosState state, address* table) {
246 assert_not_delayed();
247 dispatch_Lbyte_code(state, table);
248 }
249
250
251 void InterpreterMacroAssembler::dispatch_normal(TosState state) {
252 dispatch_base(state, Interpreter::normal_table(state));
253 }
254
255
256 void InterpreterMacroAssembler::dispatch_only(TosState state) {
257 dispatch_base(state, Interpreter::dispatch_table(state));
258 }
259
260
261 // common code to dispatch and dispatch_only
262 // dispatch value in Lbyte_code and increment Lbcp
263
264 void InterpreterMacroAssembler::dispatch_Lbyte_code(TosState state, address* table, int bcp_incr, bool verify, bool generate_poll) {
265 verify_FPU(1, state);
266 // %%%%% maybe implement +VerifyActivationFrameSize here
267 //verify_thread(); //too slow; we will just verify on method entry & exit
268 if (verify) interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
269 // dispatch table to use
270 AddressLiteral tbl(table);
271 Label dispatch;
272
273 if (SafepointMechanism::uses_thread_local_poll() && generate_poll) {
274 AddressLiteral sfpt_tbl(Interpreter::safept_table(state));
275 Label no_safepoint;
276
277 if (tbl.value() != sfpt_tbl.value()) {
278 ldx(Address(G2_thread, Thread::polling_page_offset()), G3_scratch, 0);
279 // Armed page has poll_bit set, if poll bit is cleared just continue.
280 and3(G3_scratch, SafepointMechanism::poll_bit(), G3_scratch);
281
282 br_null_short(G3_scratch, Assembler::pt, no_safepoint);
283 set(sfpt_tbl, G3_scratch);
284 ba_short(dispatch);
285 }
286 bind(no_safepoint);
287 }
288
289 set(tbl, G3_scratch); // compute addr of table
290 bind(dispatch);
291 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
292 ld_ptr(G3_scratch, Lbyte_code, G3_scratch); // get entry addr
293 jmp( G3_scratch, 0 );
294 if (bcp_incr != 0) delayed()->inc(Lbcp, bcp_incr);
295 else delayed()->nop();
296 }
297
298
299 // Helpers for expression stack
300
301 // Longs and doubles are Category 2 computational types in the
302 // JVM specification (section 3.11.1) and take 2 expression stack or
303 // local slots.
304 // Aligning them on 32 bit with tagged stacks is hard because the code generated
305 // for the dup* bytecodes depends on what types are already on the stack.
306 // If the types are split into the two stack/local slots, that is much easier
307 // (and we can use 0 for non-reference tags).
308
309 // Known good alignment in _LP64 but unknown otherwise
310 void InterpreterMacroAssembler::load_unaligned_double(Register r1, int offset, FloatRegister d) {
311 assert_not_delayed();
|