1 /*
   2  * Copyright (c) 1999, 2016, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #ifndef CPU_X86_VM_GLOBALDEFINITIONS_X86_HPP
  26 #define CPU_X86_VM_GLOBALDEFINITIONS_X86_HPP
  27 
  28 const int StackAlignmentInBytes  = 16;
  29 
  30 // Indicates whether the C calling conventions require that
  31 // 32-bit integer argument values are extended to 64 bits.
  32 const bool CCallingConventionRequiresIntsAsLongs = false;
  33 
  34 #define SUPPORTS_NATIVE_CX8
  35 
  36 // The expected size in bytes of a cache line, used to pad data structures.
  37 #if defined(TIERED)
  38   #ifdef _LP64
  39     // tiered, 64-bit, large machine
  40     #define DEFAULT_CACHE_LINE_SIZE 128
  41   #else
  42     // tiered, 32-bit, medium machine
  43     #define DEFAULT_CACHE_LINE_SIZE 64
  44   #endif
  45 #elif defined(COMPILER1)
  46   // pure C1, 32-bit, small machine
  47   // i486 was the last Intel chip with 16-byte cache line size
  48   #define DEFAULT_CACHE_LINE_SIZE 32
  49 #elif defined(COMPILER2)
  50   #ifdef _LP64
  51     // pure C2, 64-bit, large machine
  52     #define DEFAULT_CACHE_LINE_SIZE 128
  53   #else
  54     // pure C2, 32-bit, medium machine
  55     #define DEFAULT_CACHE_LINE_SIZE 64
  56   #endif
  57 #endif
  58 
  59 #if defined(COMPILER2)
  60 // Include Restricted Transactional Memory lock eliding optimization
  61 #define INCLUDE_RTM_OPT 1
  62 #endif
  63 
  64 #if defined(LINUX) || defined(SOLARIS) || defined(__APPLE__)
  65 #define SUPPORT_RESERVED_STACK_AREA
  66 #endif
  67 
  68 #endif // CPU_X86_VM_GLOBALDEFINITIONS_X86_HPP