# HG changeset patch
# Parent  46753a74df39ee2da3c5b80c9fb5d4f130488bb8
[backport] 8229709: x86_32 build and test failures after JDK-8228369 (Shenandoah: Refactor LRB C1 stubs)

diff -r 46753a74df39 src/cpu/x86/vm/c1_Runtime1_x86.cpp
--- a/src/cpu/x86/vm/c1_Runtime1_x86.cpp	Mon Nov 23 14:34:13 2020 +0100
+++ b/src/cpu/x86/vm/c1_Runtime1_x86.cpp	Mon Nov 23 16:12:37 2020 +0100
@@ -1785,8 +1785,8 @@
         // arg0 : object to be resolved
         
         save_live_registers(sasm, 1);
-        f.load_argument(0, c_rarg0);
-        __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier), c_rarg0);
+        f.load_argument(0, LP64_ONLY(c_rarg0) NOT_LP64(rax));
+        __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier), LP64_ONLY(c_rarg0) NOT_LP64(rax));
         restore_live_registers_except_rax(sasm, true);
 
       }
diff -r 46753a74df39 src/cpu/x86/vm/shenandoahBarrierSetAssembler_x86.cpp
--- a/src/cpu/x86/vm/shenandoahBarrierSetAssembler_x86.cpp	Mon Nov 23 14:34:13 2020 +0100
+++ b/src/cpu/x86/vm/shenandoahBarrierSetAssembler_x86.cpp	Mon Nov 23 16:12:37 2020 +0100
@@ -431,8 +431,15 @@
   __ mov(tmp1, res);
   __ shrptr(tmp1, ShenandoahHeapRegion::region_size_bytes_shift_jint());
   __ movptr(tmp2, (intptr_t) ShenandoahHeap::in_cset_fast_test_addr());
+#ifdef _LP64
   __ movbool(tmp2, Address(tmp2, tmp1, Address::times_1));
   __ testbool(tmp2);
+#else
+  // On x86_32, C1 register allocator can give us the register without 8-bit support.
+  // Do the full-register access and test to avoid compilation failures.
+  __ movptr(tmp2, Address(tmp2, tmp1, Address::times_1));
+  __ testptr(tmp2, 0xFF);
+#endif
   __ jcc(Assembler::zero, *stub->continuation());
 
   // Test if object is resolved.
@@ -440,7 +447,14 @@
   // Test if both lowest bits are set. We trick it by negating the bits
   // then test for both bits clear.
   __ notptr(tmp1);
+#ifdef _LP64
   __ testb(tmp1, markOopDesc::marked_value);
+#else
+  // On x86_32, C1 register allocator can give us the register without 8-bit support.
+  // Do the full-register access and test to avoid compilation failures.
+  __ testptr(tmp1, markOopDesc::marked_value);
+#endif
+
   __ jccb(Assembler::notZero, slow_path);
   // Clear both lower bits. It's still inverted, so set them, and then invert back.
   __ orptr(tmp1, markOopDesc::marked_value);