562 // Note that we take the exception at the NEXT floating point instruction.
563 if (pc[0] == 0xDB) {
564 assert(pc[0] == 0xDB, "not a FIST opcode");
565 assert(pc[1] == 0x14, "not a FIST opcode");
566 assert(pc[2] == 0x24, "not a FIST opcode");
567 return true;
568 } else {
569 assert(pc[-3] == 0xDB, "not an flt invalid opcode");
570 assert(pc[-2] == 0x14, "not an flt invalid opcode");
571 assert(pc[-1] == 0x24, "not an flt invalid opcode");
572 }
573 }
574 else if (sig == SIGFPE ) {
575 tty->print_cr("caught SIGFPE, info 0x%x.", info->si_code);
576 }
577 #endif // !AMD64
578
579 // QQQ It doesn't seem that we need to do this on x86 because we should be able
580 // to return properly from the handler without this extra stuff on the back side.
581
582 else if (sig == SIGSEGV && info->si_code > 0 && !MacroAssembler::needs_explicit_null_check((intptr_t)info->si_addr)) {
583 // Determination of interpreter/vtable stub/compiled code null exception
584 stub = SharedRuntime::continuation_for_implicit_exception(thread, pc, SharedRuntime::IMPLICIT_NULL);
585 }
586 }
587
588 // jni_fast_Get<Primitive>Field can trap at certain pc's if a GC kicks in
589 // and the heap gets shrunk before the field access.
590 if ((sig == SIGSEGV) || (sig == SIGBUS)) {
591 address addr = JNI_FastGetField::find_slowcase_pc(pc);
592 if (addr != (address)-1) {
593 stub = addr;
594 }
595 }
596
597 // Check to see if we caught the safepoint code in the
598 // process of write protecting the memory serialization page.
599 // It write enables the page immediately after protecting it
600 // so we can just return to retry the write.
601 if ((sig == SIGSEGV) &&
602 os::is_memory_serialize_page(thread, (address)info->si_addr)) {
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562 // Note that we take the exception at the NEXT floating point instruction.
563 if (pc[0] == 0xDB) {
564 assert(pc[0] == 0xDB, "not a FIST opcode");
565 assert(pc[1] == 0x14, "not a FIST opcode");
566 assert(pc[2] == 0x24, "not a FIST opcode");
567 return true;
568 } else {
569 assert(pc[-3] == 0xDB, "not an flt invalid opcode");
570 assert(pc[-2] == 0x14, "not an flt invalid opcode");
571 assert(pc[-1] == 0x24, "not an flt invalid opcode");
572 }
573 }
574 else if (sig == SIGFPE ) {
575 tty->print_cr("caught SIGFPE, info 0x%x.", info->si_code);
576 }
577 #endif // !AMD64
578
579 // QQQ It doesn't seem that we need to do this on x86 because we should be able
580 // to return properly from the handler without this extra stuff on the back side.
581
582 else if (sig == SIGSEGV && info->si_code > 0 &&
583 MacroAssembler::uses_implicit_null_check(info->si_addr)) {
584 // Determination of interpreter/vtable stub/compiled code null exception
585 stub = SharedRuntime::continuation_for_implicit_exception(thread, pc, SharedRuntime::IMPLICIT_NULL);
586 }
587 }
588
589 // jni_fast_Get<Primitive>Field can trap at certain pc's if a GC kicks in
590 // and the heap gets shrunk before the field access.
591 if ((sig == SIGSEGV) || (sig == SIGBUS)) {
592 address addr = JNI_FastGetField::find_slowcase_pc(pc);
593 if (addr != (address)-1) {
594 stub = addr;
595 }
596 }
597
598 // Check to see if we caught the safepoint code in the
599 // process of write protecting the memory serialization page.
600 // It write enables the page immediately after protecting it
601 // so we can just return to retry the write.
602 if ((sig == SIGSEGV) &&
603 os::is_memory_serialize_page(thread, (address)info->si_addr)) {
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