558  public:
 559   MacroAssembler(CodeBuffer* code) : Assembler(code) {}
 560 
 561   // This routine should emit JVMTI PopFrame and ForceEarlyReturn handling code.
 562   // The implementation is only non-empty for the InterpreterMacroAssembler,
 563   // as only the interpreter handles and ForceEarlyReturn PopFrame requests.
 564   virtual void check_and_handle_popframe(Register scratch_reg);
 565   virtual void check_and_handle_earlyret(Register scratch_reg);
 566 
 567   // Support for NULL-checks
 568   //
 569   // Generates code that causes a NULL OS exception if the content of reg is NULL.
 570   // If the accessed location is M[reg + offset] and the offset is known, provide the
 571   // offset.  No explicit code generation is needed if the offset is within a certain
 572   // range (0 <= offset <= page_size).
 573   //
 574   // FIXME: Currently not done for SPARC
 575 
 576   void null_check(Register reg, int offset = -1);
 577   static bool needs_explicit_null_check(intptr_t offset);

 578 
 579   // support for delayed instructions
 580   MacroAssembler* delayed() { Assembler::delayed();  return this; }
 581 
 582   // branches that use right instruction for v8 vs. v9
 583   inline void br( Condition c, bool a, Predict p, address d, relocInfo::relocType rt = relocInfo::none );
 584   inline void br( Condition c, bool a, Predict p, Label& L );
 585 
 586   inline void fb( Condition c, bool a, Predict p, address d, relocInfo::relocType rt = relocInfo::none );
 587   inline void fb( Condition c, bool a, Predict p, Label& L );
 588 
 589   // compares register with zero (32 bit) and branches (V9 and V8 instructions)
 590   void cmp_zero_and_br( Condition c, Register s1, Label& L, bool a = false, Predict p = pn );
 591   // Compares a pointer register with zero and branches on (not)null.
 592   // Does a test & branch on 32-bit systems and a register-branch on 64-bit.
 593   void br_null   ( Register s1, bool a, Predict p, Label& L );
 594   void br_notnull( Register s1, bool a, Predict p, Label& L );
 595 
 596   //
 597   // Compare registers and branch with nop in delay slot or cbcond without delay slot.

 558  public:
 559   MacroAssembler(CodeBuffer* code) : Assembler(code) {}
 560 
 561   // This routine should emit JVMTI PopFrame and ForceEarlyReturn handling code.
 562   // The implementation is only non-empty for the InterpreterMacroAssembler,
 563   // as only the interpreter handles and ForceEarlyReturn PopFrame requests.
 564   virtual void check_and_handle_popframe(Register scratch_reg);
 565   virtual void check_and_handle_earlyret(Register scratch_reg);
 566 
 567   // Support for NULL-checks
 568   //
 569   // Generates code that causes a NULL OS exception if the content of reg is NULL.
 570   // If the accessed location is M[reg + offset] and the offset is known, provide the
 571   // offset.  No explicit code generation is needed if the offset is within a certain
 572   // range (0 <= offset <= page_size).
 573   //
 574   // FIXME: Currently not done for SPARC
 575 
 576   void null_check(Register reg, int offset = -1);
 577   static bool needs_explicit_null_check(intptr_t offset);
 578   static bool uses_implicit_null_check(void* address);
 579 
 580   // support for delayed instructions
 581   MacroAssembler* delayed() { Assembler::delayed();  return this; }
 582 
 583   // branches that use right instruction for v8 vs. v9
 584   inline void br( Condition c, bool a, Predict p, address d, relocInfo::relocType rt = relocInfo::none );
 585   inline void br( Condition c, bool a, Predict p, Label& L );
 586 
 587   inline void fb( Condition c, bool a, Predict p, address d, relocInfo::relocType rt = relocInfo::none );
 588   inline void fb( Condition c, bool a, Predict p, Label& L );
 589 
 590   // compares register with zero (32 bit) and branches (V9 and V8 instructions)
 591   void cmp_zero_and_br( Condition c, Register s1, Label& L, bool a = false, Predict p = pn );
 592   // Compares a pointer register with zero and branches on (not)null.
 593   // Does a test & branch on 32-bit systems and a register-branch on 64-bit.
 594   void br_null   ( Register s1, bool a, Predict p, Label& L );
 595   void br_notnull( Register s1, bool a, Predict p, Label& L );
 596 
 597   //
 598   // Compare registers and branch with nop in delay slot or cbcond without delay slot.