--- old/src/hotspot/cpu/x86/x86_64.ad	2018-11-12 22:57:28.809456592 +0100
+++ new/src/hotspot/cpu/x86/x86_64.ad	2018-11-12 22:57:28.576457824 +0100
@@ -12046,9 +12046,9 @@
   ins_pipe(ialu_cr_reg_mem);
 %}
 
-instruct testB_mem_imm(rFlagsReg cr, memory mem, immI8 imm, immI0 zero)
+instruct testUB_mem_imm(rFlagsReg cr, memory mem, immU8 imm, immI0 zero)
 %{
-  match(Set cr (CmpI (AndI (LoadB mem) imm) zero));
+  match(Set cr (CmpI (AndI (LoadUB mem) imm) zero));
 
   ins_cost(125);
   format %{ "testb   $mem, $imm" %}
--- old/src/hotspot/share/opto/mulnode.cpp	2018-11-12 22:57:29.908450779 +0100
+++ new/src/hotspot/share/opto/mulnode.cpp	2018-11-12 22:57:29.677452001 +0100
@@ -31,10 +31,6 @@
 #include "opto/mulnode.hpp"
 #include "opto/phaseX.hpp"
 #include "opto/subnode.hpp"
-#include "utilities/macros.hpp"
-#if INCLUDE_SHENANDOAHGC
-#include "gc/shenandoah/c2/shenandoahBarrierSetC2.hpp"
-#endif
 
 // Portions of code courtesy of Clifford Click
 
@@ -478,15 +474,6 @@
   Node *load = in(1);
   uint lop = load->Opcode();
 
-#if INCLUDE_SHENANDOAHGC
-  if (UseShenandoahGC && ShenandoahWriteBarrierNode::is_gc_state_load(load)) {
-    // Do not touch the load+mask, we would match the whole sequence exactly.
-    // Converting the load to LoadUB/LoadUS would mismatch and waste a register
-    // on the barrier fastpath.
-    return NULL;
-  }
-#endif
-
   // Masking bits off of a Character?  Hi bits are already zero.
   if( lop == Op_LoadUS &&
       (mask & 0xFFFF0000) )     // Can we make a smaller mask?