1 /*
   2  * Copyright (c) 1997, 2017, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "memory/allocation.inline.hpp"
  27 #include "opto/addnode.hpp"
  28 #include "opto/connode.hpp"
  29 #include "opto/convertnode.hpp"
  30 #include "opto/memnode.hpp"
  31 #include "opto/mulnode.hpp"
  32 #include "opto/phaseX.hpp"
  33 #include "opto/subnode.hpp"
  34 
  35 // Portions of code courtesy of Clifford Click
  36 
  37 
  38 //=============================================================================
  39 //------------------------------hash-------------------------------------------
  40 // Hash function over MulNodes.  Needs to be commutative; i.e., I swap
  41 // (commute) inputs to MulNodes willy-nilly so the hash function must return
  42 // the same value in the presence of edge swapping.
  43 uint MulNode::hash() const {
  44   return (uintptr_t)in(1) + (uintptr_t)in(2) + Opcode();
  45 }
  46 
  47 //------------------------------Identity---------------------------------------
  48 // Multiplying a one preserves the other argument
  49 Node* MulNode::Identity(PhaseGVN* phase) {
  50   const Type *one = mul_id();  // The multiplicative identity
  51   if( phase->type( in(1) )->higher_equal( one ) ) return in(2);
  52   if( phase->type( in(2) )->higher_equal( one ) ) return in(1);
  53 
  54   return this;
  55 }
  56 
  57 //------------------------------Ideal------------------------------------------
  58 // We also canonicalize the Node, moving constants to the right input,
  59 // and flatten expressions (so that 1+x+2 becomes x+3).
  60 Node *MulNode::Ideal(PhaseGVN *phase, bool can_reshape) {
  61   const Type *t1 = phase->type( in(1) );
  62   const Type *t2 = phase->type( in(2) );
  63   Node *progress = NULL;        // Progress flag
  64   // We are OK if right is a constant, or right is a load and
  65   // left is a non-constant.
  66   if( !(t2->singleton() ||
  67         (in(2)->is_Load() && !(t1->singleton() || in(1)->is_Load())) ) ) {
  68     if( t1->singleton() ||       // Left input is a constant?
  69         // Otherwise, sort inputs (commutativity) to help value numbering.
  70         (in(1)->_idx > in(2)->_idx) ) {
  71       swap_edges(1, 2);
  72       const Type *t = t1;
  73       t1 = t2;
  74       t2 = t;
  75       progress = this;            // Made progress
  76     }
  77   }
  78 
  79   // If the right input is a constant, and the left input is a product of a
  80   // constant, flatten the expression tree.
  81   uint op = Opcode();
  82   if( t2->singleton() &&        // Right input is a constant?
  83       op != Op_MulF &&          // Float & double cannot reassociate
  84       op != Op_MulD ) {
  85     if( t2 == Type::TOP ) return NULL;
  86     Node *mul1 = in(1);
  87 #ifdef ASSERT
  88     // Check for dead loop
  89     int   op1 = mul1->Opcode();
  90     if( phase->eqv( mul1, this ) || phase->eqv( in(2), this ) ||
  91         ( ( op1 == mul_opcode() || op1 == add_opcode() ) &&
  92           ( phase->eqv( mul1->in(1), this ) || phase->eqv( mul1->in(2), this ) ||
  93             phase->eqv( mul1->in(1), mul1 ) || phase->eqv( mul1->in(2), mul1 ) ) ) )
  94       assert(false, "dead loop in MulNode::Ideal");
  95 #endif
  96 
  97     if( mul1->Opcode() == mul_opcode() ) {  // Left input is a multiply?
  98       // Mul of a constant?
  99       const Type *t12 = phase->type( mul1->in(2) );
 100       if( t12->singleton() && t12 != Type::TOP) { // Left input is an add of a constant?
 101         // Compute new constant; check for overflow
 102         const Type *tcon01 = ((MulNode*)mul1)->mul_ring(t2,t12);
 103         if( tcon01->singleton() ) {
 104           // The Mul of the flattened expression
 105           set_req(1, mul1->in(1));
 106           set_req(2, phase->makecon( tcon01 ));
 107           t2 = tcon01;
 108           progress = this;      // Made progress
 109         }
 110       }
 111     }
 112     // If the right input is a constant, and the left input is an add of a
 113     // constant, flatten the tree: (X+con1)*con0 ==> X*con0 + con1*con0
 114     const Node *add1 = in(1);
 115     if( add1->Opcode() == add_opcode() ) {      // Left input is an add?
 116       // Add of a constant?
 117       const Type *t12 = phase->type( add1->in(2) );
 118       if( t12->singleton() && t12 != Type::TOP ) { // Left input is an add of a constant?
 119         assert( add1->in(1) != add1, "dead loop in MulNode::Ideal" );
 120         // Compute new constant; check for overflow
 121         const Type *tcon01 = mul_ring(t2,t12);
 122         if( tcon01->singleton() ) {
 123 
 124         // Convert (X+con1)*con0 into X*con0
 125           Node *mul = clone();    // mul = ()*con0
 126           mul->set_req(1,add1->in(1));  // mul = X*con0
 127           mul = phase->transform(mul);
 128 
 129           Node *add2 = add1->clone();
 130           add2->set_req(1, mul);        // X*con0 + con0*con1
 131           add2->set_req(2, phase->makecon(tcon01) );
 132           progress = add2;
 133         }
 134       }
 135     } // End of is left input an add
 136   } // End of is right input a Mul
 137 
 138   return progress;
 139 }
 140 
 141 //------------------------------Value-----------------------------------------
 142 const Type* MulNode::Value(PhaseGVN* phase) const {
 143   const Type *t1 = phase->type( in(1) );
 144   const Type *t2 = phase->type( in(2) );
 145   // Either input is TOP ==> the result is TOP
 146   if( t1 == Type::TOP ) return Type::TOP;
 147   if( t2 == Type::TOP ) return Type::TOP;
 148 
 149   // Either input is ZERO ==> the result is ZERO.
 150   // Not valid for floats or doubles since +0.0 * -0.0 --> +0.0
 151   int op = Opcode();
 152   if( op == Op_MulI || op == Op_AndI || op == Op_MulL || op == Op_AndL ) {
 153     const Type *zero = add_id();        // The multiplicative zero
 154     if( t1->higher_equal( zero ) ) return zero;
 155     if( t2->higher_equal( zero ) ) return zero;
 156   }
 157 
 158   // Either input is BOTTOM ==> the result is the local BOTTOM
 159   if( t1 == Type::BOTTOM || t2 == Type::BOTTOM )
 160     return bottom_type();
 161 
 162 #if defined(IA32)
 163   // Can't trust native compilers to properly fold strict double
 164   // multiplication with round-to-zero on this platform.
 165   if (op == Op_MulD && phase->C->method()->is_strict()) {
 166     return TypeD::DOUBLE;
 167   }
 168 #endif
 169 
 170   return mul_ring(t1,t2);            // Local flavor of type multiplication
 171 }
 172 
 173 
 174 //=============================================================================
 175 //------------------------------Ideal------------------------------------------
 176 // Check for power-of-2 multiply, then try the regular MulNode::Ideal
 177 Node *MulINode::Ideal(PhaseGVN *phase, bool can_reshape) {
 178   // Swap constant to right
 179   jint con;
 180   if ((con = in(1)->find_int_con(0)) != 0) {
 181     swap_edges(1, 2);
 182     // Finish rest of method to use info in 'con'
 183   } else if ((con = in(2)->find_int_con(0)) == 0) {
 184     return MulNode::Ideal(phase, can_reshape);
 185   }
 186 
 187   // Now we have a constant Node on the right and the constant in con
 188   if( con == 0 ) return NULL;   // By zero is handled by Value call
 189   if( con == 1 ) return NULL;   // By one  is handled by Identity call
 190 
 191   // Check for negative constant; if so negate the final result
 192   bool sign_flip = false;
 193   if( con < 0 ) {
 194     con = -con;
 195     sign_flip = true;
 196   }
 197 
 198   // Get low bit; check for being the only bit
 199   Node *res = NULL;
 200   jint bit1 = con & -con;       // Extract low bit
 201   if( bit1 == con ) {           // Found a power of 2?
 202     res = new LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) );
 203   } else {
 204 
 205     // Check for constant with 2 bits set
 206     jint bit2 = con-bit1;
 207     bit2 = bit2 & -bit2;          // Extract 2nd bit
 208     if( bit2 + bit1 == con ) {    // Found all bits in con?
 209       Node *n1 = phase->transform( new LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) ) );
 210       Node *n2 = phase->transform( new LShiftINode( in(1), phase->intcon(log2_intptr(bit2)) ) );
 211       res = new AddINode( n2, n1 );
 212 
 213     } else if (is_power_of_2(con+1)) {
 214       // Sleezy: power-of-2 -1.  Next time be generic.
 215       jint temp = (jint) (con + 1);
 216       Node *n1 = phase->transform( new LShiftINode( in(1), phase->intcon(log2_intptr(temp)) ) );
 217       res = new SubINode( n1, in(1) );
 218     } else {
 219       return MulNode::Ideal(phase, can_reshape);
 220     }
 221   }
 222 
 223   if( sign_flip ) {             // Need to negate result?
 224     res = phase->transform(res);// Transform, before making the zero con
 225     res = new SubINode(phase->intcon(0),res);
 226   }
 227 
 228   return res;                   // Return final result
 229 }
 230 
 231 //------------------------------mul_ring---------------------------------------
 232 // Compute the product type of two integer ranges into this node.
 233 const Type *MulINode::mul_ring(const Type *t0, const Type *t1) const {
 234   const TypeInt *r0 = t0->is_int(); // Handy access
 235   const TypeInt *r1 = t1->is_int();
 236 
 237   // Fetch endpoints of all ranges
 238   jint lo0 = r0->_lo;
 239   double a = (double)lo0;
 240   jint hi0 = r0->_hi;
 241   double b = (double)hi0;
 242   jint lo1 = r1->_lo;
 243   double c = (double)lo1;
 244   jint hi1 = r1->_hi;
 245   double d = (double)hi1;
 246 
 247   // Compute all endpoints & check for overflow
 248   int32_t A = java_multiply(lo0, lo1);
 249   if( (double)A != a*c ) return TypeInt::INT; // Overflow?
 250   int32_t B = java_multiply(lo0, hi1);
 251   if( (double)B != a*d ) return TypeInt::INT; // Overflow?
 252   int32_t C = java_multiply(hi0, lo1);
 253   if( (double)C != b*c ) return TypeInt::INT; // Overflow?
 254   int32_t D = java_multiply(hi0, hi1);
 255   if( (double)D != b*d ) return TypeInt::INT; // Overflow?
 256 
 257   if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints
 258   else { lo0 = B; hi0 = A; }
 259   if( C < D ) {
 260     if( C < lo0 ) lo0 = C;
 261     if( D > hi0 ) hi0 = D;
 262   } else {
 263     if( D < lo0 ) lo0 = D;
 264     if( C > hi0 ) hi0 = C;
 265   }
 266   return TypeInt::make(lo0, hi0, MAX2(r0->_widen,r1->_widen));
 267 }
 268 
 269 
 270 //=============================================================================
 271 //------------------------------Ideal------------------------------------------
 272 // Check for power-of-2 multiply, then try the regular MulNode::Ideal
 273 Node *MulLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
 274   // Swap constant to right
 275   jlong con;
 276   if ((con = in(1)->find_long_con(0)) != 0) {
 277     swap_edges(1, 2);
 278     // Finish rest of method to use info in 'con'
 279   } else if ((con = in(2)->find_long_con(0)) == 0) {
 280     return MulNode::Ideal(phase, can_reshape);
 281   }
 282 
 283   // Now we have a constant Node on the right and the constant in con
 284   if( con == CONST64(0) ) return NULL;  // By zero is handled by Value call
 285   if( con == CONST64(1) ) return NULL;  // By one  is handled by Identity call
 286 
 287   // Check for negative constant; if so negate the final result
 288   bool sign_flip = false;
 289   if( con < 0 ) {
 290     con = -con;
 291     sign_flip = true;
 292   }
 293 
 294   // Get low bit; check for being the only bit
 295   Node *res = NULL;
 296   jlong bit1 = con & -con;      // Extract low bit
 297   if( bit1 == con ) {           // Found a power of 2?
 298     res = new LShiftLNode( in(1), phase->intcon(log2_long(bit1)) );
 299   } else {
 300 
 301     // Check for constant with 2 bits set
 302     jlong bit2 = con-bit1;
 303     bit2 = bit2 & -bit2;          // Extract 2nd bit
 304     if( bit2 + bit1 == con ) {    // Found all bits in con?
 305       Node *n1 = phase->transform( new LShiftLNode( in(1), phase->intcon(log2_long(bit1)) ) );
 306       Node *n2 = phase->transform( new LShiftLNode( in(1), phase->intcon(log2_long(bit2)) ) );
 307       res = new AddLNode( n2, n1 );
 308 
 309     } else if (is_power_of_2_long(con+1)) {
 310       // Sleezy: power-of-2 -1.  Next time be generic.
 311       jlong temp = (jlong) (con + 1);
 312       Node *n1 = phase->transform( new LShiftLNode( in(1), phase->intcon(log2_long(temp)) ) );
 313       res = new SubLNode( n1, in(1) );
 314     } else {
 315       return MulNode::Ideal(phase, can_reshape);
 316     }
 317   }
 318 
 319   if( sign_flip ) {             // Need to negate result?
 320     res = phase->transform(res);// Transform, before making the zero con
 321     res = new SubLNode(phase->longcon(0),res);
 322   }
 323 
 324   return res;                   // Return final result
 325 }
 326 
 327 //------------------------------mul_ring---------------------------------------
 328 // Compute the product type of two integer ranges into this node.
 329 const Type *MulLNode::mul_ring(const Type *t0, const Type *t1) const {
 330   const TypeLong *r0 = t0->is_long(); // Handy access
 331   const TypeLong *r1 = t1->is_long();
 332 
 333   // Fetch endpoints of all ranges
 334   jlong lo0 = r0->_lo;
 335   double a = (double)lo0;
 336   jlong hi0 = r0->_hi;
 337   double b = (double)hi0;
 338   jlong lo1 = r1->_lo;
 339   double c = (double)lo1;
 340   jlong hi1 = r1->_hi;
 341   double d = (double)hi1;
 342 
 343   // Compute all endpoints & check for overflow
 344   jlong A = java_multiply(lo0, lo1);
 345   if( (double)A != a*c ) return TypeLong::LONG; // Overflow?
 346   jlong B = java_multiply(lo0, hi1);
 347   if( (double)B != a*d ) return TypeLong::LONG; // Overflow?
 348   jlong C = java_multiply(hi0, lo1);
 349   if( (double)C != b*c ) return TypeLong::LONG; // Overflow?
 350   jlong D = java_multiply(hi0, hi1);
 351   if( (double)D != b*d ) return TypeLong::LONG; // Overflow?
 352 
 353   if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints
 354   else { lo0 = B; hi0 = A; }
 355   if( C < D ) {
 356     if( C < lo0 ) lo0 = C;
 357     if( D > hi0 ) hi0 = D;
 358   } else {
 359     if( D < lo0 ) lo0 = D;
 360     if( C > hi0 ) hi0 = C;
 361   }
 362   return TypeLong::make(lo0, hi0, MAX2(r0->_widen,r1->_widen));
 363 }
 364 
 365 //=============================================================================
 366 //------------------------------mul_ring---------------------------------------
 367 // Compute the product type of two double ranges into this node.
 368 const Type *MulFNode::mul_ring(const Type *t0, const Type *t1) const {
 369   if( t0 == Type::FLOAT || t1 == Type::FLOAT ) return Type::FLOAT;
 370   return TypeF::make( t0->getf() * t1->getf() );
 371 }
 372 
 373 //=============================================================================
 374 //------------------------------mul_ring---------------------------------------
 375 // Compute the product type of two double ranges into this node.
 376 const Type *MulDNode::mul_ring(const Type *t0, const Type *t1) const {
 377   if( t0 == Type::DOUBLE || t1 == Type::DOUBLE ) return Type::DOUBLE;
 378   // We must be multiplying 2 double constants.
 379   return TypeD::make( t0->getd() * t1->getd() );
 380 }
 381 
 382 //=============================================================================
 383 //------------------------------Value------------------------------------------
 384 const Type* MulHiLNode::Value(PhaseGVN* phase) const {
 385   // Either input is TOP ==> the result is TOP
 386   const Type *t1 = phase->type( in(1) );
 387   const Type *t2 = phase->type( in(2) );
 388   if( t1 == Type::TOP ) return Type::TOP;
 389   if( t2 == Type::TOP ) return Type::TOP;
 390 
 391   // Either input is BOTTOM ==> the result is the local BOTTOM
 392   const Type *bot = bottom_type();
 393   if( (t1 == bot) || (t2 == bot) ||
 394       (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
 395     return bot;
 396 
 397   // It is not worth trying to constant fold this stuff!
 398   return TypeLong::LONG;
 399 }
 400 
 401 //=============================================================================
 402 //------------------------------mul_ring---------------------------------------
 403 // Supplied function returns the product of the inputs IN THE CURRENT RING.
 404 // For the logical operations the ring's MUL is really a logical AND function.
 405 // This also type-checks the inputs for sanity.  Guaranteed never to
 406 // be passed a TOP or BOTTOM type, these are filtered out by pre-check.
 407 const Type *AndINode::mul_ring( const Type *t0, const Type *t1 ) const {
 408   const TypeInt *r0 = t0->is_int(); // Handy access
 409   const TypeInt *r1 = t1->is_int();
 410   int widen = MAX2(r0->_widen,r1->_widen);
 411 
 412   // If either input is a constant, might be able to trim cases
 413   if( !r0->is_con() && !r1->is_con() )
 414     return TypeInt::INT;        // No constants to be had
 415 
 416   // Both constants?  Return bits
 417   if( r0->is_con() && r1->is_con() )
 418     return TypeInt::make( r0->get_con() & r1->get_con() );
 419 
 420   if( r0->is_con() && r0->get_con() > 0 )
 421     return TypeInt::make(0, r0->get_con(), widen);
 422 
 423   if( r1->is_con() && r1->get_con() > 0 )
 424     return TypeInt::make(0, r1->get_con(), widen);
 425 
 426   if( r0 == TypeInt::BOOL || r1 == TypeInt::BOOL ) {
 427     return TypeInt::BOOL;
 428   }
 429 
 430   return TypeInt::INT;          // No constants to be had
 431 }
 432 
 433 //------------------------------Identity---------------------------------------
 434 // Masking off the high bits of an unsigned load is not required
 435 Node* AndINode::Identity(PhaseGVN* phase) {
 436 
 437   // x & x => x
 438   if (phase->eqv(in(1), in(2))) return in(1);
 439 
 440   Node* in1 = in(1);
 441   uint op = in1->Opcode();
 442   const TypeInt* t2 = phase->type(in(2))->isa_int();
 443   if (t2 && t2->is_con()) {
 444     int con = t2->get_con();
 445     // Masking off high bits which are always zero is useless.
 446     const TypeInt* t1 = phase->type( in(1) )->isa_int();
 447     if (t1 != NULL && t1->_lo >= 0) {
 448       jint t1_support = right_n_bits(1 + log2_intptr(t1->_hi));
 449       if ((t1_support & con) == t1_support)
 450         return in1;
 451     }
 452     // Masking off the high bits of a unsigned-shift-right is not
 453     // needed either.
 454     if (op == Op_URShiftI) {
 455       const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
 456       if (t12 && t12->is_con()) {  // Shift is by a constant
 457         int shift = t12->get_con();
 458         shift &= BitsPerJavaInteger - 1;  // semantics of Java shifts
 459         int mask = max_juint >> shift;
 460         if ((mask & con) == mask)  // If AND is useless, skip it
 461           return in1;
 462       }
 463     }
 464   }
 465   return MulNode::Identity(phase);
 466 }
 467 
 468 //------------------------------Ideal------------------------------------------
 469 Node *AndINode::Ideal(PhaseGVN *phase, bool can_reshape) {
 470   // Special case constant AND mask
 471   const TypeInt *t2 = phase->type( in(2) )->isa_int();
 472   if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
 473   const int mask = t2->get_con();
 474   Node *load = in(1);
 475   uint lop = load->Opcode();
 476 
 477   // Masking bits off of a Character?  Hi bits are already zero.
 478   if( lop == Op_LoadUS &&
 479       (mask & 0xFFFF0000) )     // Can we make a smaller mask?
 480     return new AndINode(load,phase->intcon(mask&0xFFFF));
 481 
 482   // Masking bits off of a Short?  Loading a Character does some masking
 483   if (can_reshape &&
 484       load->outcnt() == 1 && load->unique_out() == this) {
 485     if (lop == Op_LoadS && (mask & 0xFFFF0000) == 0 ) {
 486       Node* ldus = load->as_Load()->convert_to_unsigned_load(*phase);
 487       ldus = phase->transform(ldus);
 488       return new AndINode(ldus, phase->intcon(mask & 0xFFFF));
 489     }
 490 
 491     // Masking sign bits off of a Byte?  Do an unsigned byte load plus
 492     // an and.
 493     // Prevent transform if it feeds to CmpI. We have special matcher
 494     // for LoadB+AndI+CmpI that generates a single instruction.
 495     bool feeds_to_cmpi = outcnt() == 1 && unique_out()->Opcode() == Op_CmpI;
 496     if (lop == Op_LoadB && (mask & 0xFFFFFF00) == 0 && !feeds_to_cmpi) {
 497       Node* ldub = load->as_Load()->convert_to_unsigned_load(*phase);
 498       ldub = phase->transform(ldub);
 499       return new AndINode(ldub, phase->intcon(mask));
 500     }
 501   }
 502 
 503   // Masking off sign bits?  Dont make them!
 504   if( lop == Op_RShiftI ) {
 505     const TypeInt *t12 = phase->type(load->in(2))->isa_int();
 506     if( t12 && t12->is_con() ) { // Shift is by a constant
 507       int shift = t12->get_con();
 508       shift &= BitsPerJavaInteger-1;  // semantics of Java shifts
 509       const int sign_bits_mask = ~right_n_bits(BitsPerJavaInteger - shift);
 510       // If the AND'ing of the 2 masks has no bits, then only original shifted
 511       // bits survive.  NO sign-extension bits survive the maskings.
 512       if( (sign_bits_mask & mask) == 0 ) {
 513         // Use zero-fill shift instead
 514         Node *zshift = phase->transform(new URShiftINode(load->in(1),load->in(2)));
 515         return new AndINode( zshift, in(2) );
 516       }
 517     }
 518   }
 519 
 520   // Check for 'negate/and-1', a pattern emitted when someone asks for
 521   // 'mod 2'.  Negate leaves the low order bit unchanged (think: complement
 522   // plus 1) and the mask is of the low order bit.  Skip the negate.
 523   if( lop == Op_SubI && mask == 1 && load->in(1) &&
 524       phase->type(load->in(1)) == TypeInt::ZERO )
 525     return new AndINode( load->in(2), in(2) );
 526 
 527   return MulNode::Ideal(phase, can_reshape);
 528 }
 529 
 530 //=============================================================================
 531 //------------------------------mul_ring---------------------------------------
 532 // Supplied function returns the product of the inputs IN THE CURRENT RING.
 533 // For the logical operations the ring's MUL is really a logical AND function.
 534 // This also type-checks the inputs for sanity.  Guaranteed never to
 535 // be passed a TOP or BOTTOM type, these are filtered out by pre-check.
 536 const Type *AndLNode::mul_ring( const Type *t0, const Type *t1 ) const {
 537   const TypeLong *r0 = t0->is_long(); // Handy access
 538   const TypeLong *r1 = t1->is_long();
 539   int widen = MAX2(r0->_widen,r1->_widen);
 540 
 541   // If either input is a constant, might be able to trim cases
 542   if( !r0->is_con() && !r1->is_con() )
 543     return TypeLong::LONG;      // No constants to be had
 544 
 545   // Both constants?  Return bits
 546   if( r0->is_con() && r1->is_con() )
 547     return TypeLong::make( r0->get_con() & r1->get_con() );
 548 
 549   if( r0->is_con() && r0->get_con() > 0 )
 550     return TypeLong::make(CONST64(0), r0->get_con(), widen);
 551 
 552   if( r1->is_con() && r1->get_con() > 0 )
 553     return TypeLong::make(CONST64(0), r1->get_con(), widen);
 554 
 555   return TypeLong::LONG;        // No constants to be had
 556 }
 557 
 558 //------------------------------Identity---------------------------------------
 559 // Masking off the high bits of an unsigned load is not required
 560 Node* AndLNode::Identity(PhaseGVN* phase) {
 561 
 562   // x & x => x
 563   if (phase->eqv(in(1), in(2))) return in(1);
 564 
 565   Node *usr = in(1);
 566   const TypeLong *t2 = phase->type( in(2) )->isa_long();
 567   if( t2 && t2->is_con() ) {
 568     jlong con = t2->get_con();
 569     // Masking off high bits which are always zero is useless.
 570     const TypeLong* t1 = phase->type( in(1) )->isa_long();
 571     if (t1 != NULL && t1->_lo >= 0) {
 572       int bit_count = log2_long(t1->_hi) + 1;
 573       jlong t1_support = jlong(max_julong >> (BitsPerJavaLong - bit_count));
 574       if ((t1_support & con) == t1_support)
 575         return usr;
 576     }
 577     uint lop = usr->Opcode();
 578     // Masking off the high bits of a unsigned-shift-right is not
 579     // needed either.
 580     if( lop == Op_URShiftL ) {
 581       const TypeInt *t12 = phase->type( usr->in(2) )->isa_int();
 582       if( t12 && t12->is_con() ) {  // Shift is by a constant
 583         int shift = t12->get_con();
 584         shift &= BitsPerJavaLong - 1;  // semantics of Java shifts
 585         jlong mask = max_julong >> shift;
 586         if( (mask&con) == mask )  // If AND is useless, skip it
 587           return usr;
 588       }
 589     }
 590   }
 591   return MulNode::Identity(phase);
 592 }
 593 
 594 //------------------------------Ideal------------------------------------------
 595 Node *AndLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
 596   // Special case constant AND mask
 597   const TypeLong *t2 = phase->type( in(2) )->isa_long();
 598   if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
 599   const jlong mask = t2->get_con();
 600 
 601   Node* in1 = in(1);
 602   uint op = in1->Opcode();
 603 
 604   // Are we masking a long that was converted from an int with a mask
 605   // that fits in 32-bits?  Commute them and use an AndINode.  Don't
 606   // convert masks which would cause a sign extension of the integer
 607   // value.  This check includes UI2L masks (0x00000000FFFFFFFF) which
 608   // would be optimized away later in Identity.
 609   if (op == Op_ConvI2L && (mask & UCONST64(0xFFFFFFFF80000000)) == 0) {
 610     Node* andi = new AndINode(in1->in(1), phase->intcon(mask));
 611     andi = phase->transform(andi);
 612     return new ConvI2LNode(andi);
 613   }
 614 
 615   // Masking off sign bits?  Dont make them!
 616   if (op == Op_RShiftL) {
 617     const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
 618     if( t12 && t12->is_con() ) { // Shift is by a constant
 619       int shift = t12->get_con();
 620       shift &= BitsPerJavaLong - 1;  // semantics of Java shifts
 621       const jlong sign_bits_mask = ~(((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - shift)) -1);
 622       // If the AND'ing of the 2 masks has no bits, then only original shifted
 623       // bits survive.  NO sign-extension bits survive the maskings.
 624       if( (sign_bits_mask & mask) == 0 ) {
 625         // Use zero-fill shift instead
 626         Node *zshift = phase->transform(new URShiftLNode(in1->in(1), in1->in(2)));
 627         return new AndLNode(zshift, in(2));
 628       }
 629     }
 630   }
 631 
 632   return MulNode::Ideal(phase, can_reshape);
 633 }
 634 
 635 //=============================================================================
 636 
 637 static int getShiftCon(PhaseGVN *phase, Node *shiftNode, int retVal) {
 638   const Type *t = phase->type(shiftNode->in(2));
 639   if (t == Type::TOP) return retVal;       // Right input is dead.
 640   const TypeInt *t2 = t->isa_int();
 641   if (!t2 || !t2->is_con()) return retVal; // Right input is a constant.
 642 
 643   return t2->get_con();
 644 }
 645 
 646 static int maskShiftAmount(PhaseGVN *phase, Node *shiftNode, int nBits) {
 647   int       shift = getShiftCon(phase, shiftNode, 0);
 648   int maskedShift = shift & (nBits - 1);
 649 
 650   if (maskedShift == 0) return 0;         // Let Identity() handle 0 shift count.
 651 
 652   if (shift != maskedShift) {
 653     shiftNode->set_req(2, phase->intcon(maskedShift)); // Replace shift count with masked value.
 654     phase->igvn_rehash_node_delayed(shiftNode);
 655   }
 656 
 657   return maskedShift;
 658 }
 659 
 660 //------------------------------Identity---------------------------------------
 661 Node* LShiftINode::Identity(PhaseGVN* phase) {
 662   return ((getShiftCon(phase, this, -1) & (BitsPerJavaInteger - 1)) == 0) ? in(1) : this;
 663 }
 664 
 665 //------------------------------Ideal------------------------------------------
 666 // If the right input is a constant, and the left input is an add of a
 667 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
 668 Node *LShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
 669   int con = maskShiftAmount(phase, this, BitsPerJavaInteger);
 670   if (con == 0) {
 671     return NULL;
 672   }
 673 
 674   // Left input is an add of a constant?
 675   Node *add1 = in(1);
 676   int add1_op = add1->Opcode();
 677   if( add1_op == Op_AddI ) {    // Left input is an add?
 678     assert( add1 != add1->in(1), "dead loop in LShiftINode::Ideal" );
 679     const TypeInt *t12 = phase->type(add1->in(2))->isa_int();
 680     if( t12 && t12->is_con() ){ // Left input is an add of a con?
 681       // Transform is legal, but check for profit.  Avoid breaking 'i2s'
 682       // and 'i2b' patterns which typically fold into 'StoreC/StoreB'.
 683       if( con < 16 ) {
 684         // Compute X << con0
 685         Node *lsh = phase->transform( new LShiftINode( add1->in(1), in(2) ) );
 686         // Compute X<<con0 + (con1<<con0)
 687         return new AddINode( lsh, phase->intcon(t12->get_con() << con));
 688       }
 689     }
 690   }
 691 
 692   // Check for "(x>>c0)<<c0" which just masks off low bits
 693   if( (add1_op == Op_RShiftI || add1_op == Op_URShiftI ) &&
 694       add1->in(2) == in(2) )
 695     // Convert to "(x & -(1<<c0))"
 696     return new AndINode(add1->in(1),phase->intcon( -(1<<con)));
 697 
 698   // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
 699   if( add1_op == Op_AndI ) {
 700     Node *add2 = add1->in(1);
 701     int add2_op = add2->Opcode();
 702     if( (add2_op == Op_RShiftI || add2_op == Op_URShiftI ) &&
 703         add2->in(2) == in(2) ) {
 704       // Convert to "(x & (Y<<c0))"
 705       Node *y_sh = phase->transform( new LShiftINode( add1->in(2), in(2) ) );
 706       return new AndINode( add2->in(1), y_sh );
 707     }
 708   }
 709 
 710   // Check for ((x & ((1<<(32-c0))-1)) << c0) which ANDs off high bits
 711   // before shifting them away.
 712   const jint bits_mask = right_n_bits(BitsPerJavaInteger-con);
 713   if( add1_op == Op_AndI &&
 714       phase->type(add1->in(2)) == TypeInt::make( bits_mask ) )
 715     return new LShiftINode( add1->in(1), in(2) );
 716 
 717   return NULL;
 718 }
 719 
 720 //------------------------------Value------------------------------------------
 721 // A LShiftINode shifts its input2 left by input1 amount.
 722 const Type* LShiftINode::Value(PhaseGVN* phase) const {
 723   const Type *t1 = phase->type( in(1) );
 724   const Type *t2 = phase->type( in(2) );
 725   // Either input is TOP ==> the result is TOP
 726   if( t1 == Type::TOP ) return Type::TOP;
 727   if( t2 == Type::TOP ) return Type::TOP;
 728 
 729   // Left input is ZERO ==> the result is ZERO.
 730   if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
 731   // Shift by zero does nothing
 732   if( t2 == TypeInt::ZERO ) return t1;
 733 
 734   // Either input is BOTTOM ==> the result is BOTTOM
 735   if( (t1 == TypeInt::INT) || (t2 == TypeInt::INT) ||
 736       (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
 737     return TypeInt::INT;
 738 
 739   const TypeInt *r1 = t1->is_int(); // Handy access
 740   const TypeInt *r2 = t2->is_int(); // Handy access
 741 
 742   if (!r2->is_con())
 743     return TypeInt::INT;
 744 
 745   uint shift = r2->get_con();
 746   shift &= BitsPerJavaInteger-1;  // semantics of Java shifts
 747   // Shift by a multiple of 32 does nothing:
 748   if (shift == 0)  return t1;
 749 
 750   // If the shift is a constant, shift the bounds of the type,
 751   // unless this could lead to an overflow.
 752   if (!r1->is_con()) {
 753     jint lo = r1->_lo, hi = r1->_hi;
 754     if (((lo << shift) >> shift) == lo &&
 755         ((hi << shift) >> shift) == hi) {
 756       // No overflow.  The range shifts up cleanly.
 757       return TypeInt::make((jint)lo << (jint)shift,
 758                            (jint)hi << (jint)shift,
 759                            MAX2(r1->_widen,r2->_widen));
 760     }
 761     return TypeInt::INT;
 762   }
 763 
 764   return TypeInt::make( (jint)r1->get_con() << (jint)shift );
 765 }
 766 
 767 //=============================================================================
 768 //------------------------------Identity---------------------------------------
 769 Node* LShiftLNode::Identity(PhaseGVN* phase) {
 770   return ((getShiftCon(phase, this, -1) & (BitsPerJavaLong - 1)) == 0) ? in(1) : this;
 771 }
 772 
 773 //------------------------------Ideal------------------------------------------
 774 // If the right input is a constant, and the left input is an add of a
 775 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
 776 Node *LShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
 777   int con = maskShiftAmount(phase, this, BitsPerJavaLong);
 778   if (con == 0) {
 779     return NULL;
 780   }
 781 
 782   // Left input is an add of a constant?
 783   Node *add1 = in(1);
 784   int add1_op = add1->Opcode();
 785   if( add1_op == Op_AddL ) {    // Left input is an add?
 786     // Avoid dead data cycles from dead loops
 787     assert( add1 != add1->in(1), "dead loop in LShiftLNode::Ideal" );
 788     const TypeLong *t12 = phase->type(add1->in(2))->isa_long();
 789     if( t12 && t12->is_con() ){ // Left input is an add of a con?
 790       // Compute X << con0
 791       Node *lsh = phase->transform( new LShiftLNode( add1->in(1), in(2) ) );
 792       // Compute X<<con0 + (con1<<con0)
 793       return new AddLNode( lsh, phase->longcon(t12->get_con() << con));
 794     }
 795   }
 796 
 797   // Check for "(x>>c0)<<c0" which just masks off low bits
 798   if( (add1_op == Op_RShiftL || add1_op == Op_URShiftL ) &&
 799       add1->in(2) == in(2) )
 800     // Convert to "(x & -(1<<c0))"
 801     return new AndLNode(add1->in(1),phase->longcon( -(CONST64(1)<<con)));
 802 
 803   // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
 804   if( add1_op == Op_AndL ) {
 805     Node *add2 = add1->in(1);
 806     int add2_op = add2->Opcode();
 807     if( (add2_op == Op_RShiftL || add2_op == Op_URShiftL ) &&
 808         add2->in(2) == in(2) ) {
 809       // Convert to "(x & (Y<<c0))"
 810       Node *y_sh = phase->transform( new LShiftLNode( add1->in(2), in(2) ) );
 811       return new AndLNode( add2->in(1), y_sh );
 812     }
 813   }
 814 
 815   // Check for ((x & ((CONST64(1)<<(64-c0))-1)) << c0) which ANDs off high bits
 816   // before shifting them away.
 817   const jlong bits_mask = jlong(max_julong >> con);
 818   if( add1_op == Op_AndL &&
 819       phase->type(add1->in(2)) == TypeLong::make( bits_mask ) )
 820     return new LShiftLNode( add1->in(1), in(2) );
 821 
 822   return NULL;
 823 }
 824 
 825 //------------------------------Value------------------------------------------
 826 // A LShiftLNode shifts its input2 left by input1 amount.
 827 const Type* LShiftLNode::Value(PhaseGVN* phase) const {
 828   const Type *t1 = phase->type( in(1) );
 829   const Type *t2 = phase->type( in(2) );
 830   // Either input is TOP ==> the result is TOP
 831   if( t1 == Type::TOP ) return Type::TOP;
 832   if( t2 == Type::TOP ) return Type::TOP;
 833 
 834   // Left input is ZERO ==> the result is ZERO.
 835   if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
 836   // Shift by zero does nothing
 837   if( t2 == TypeInt::ZERO ) return t1;
 838 
 839   // Either input is BOTTOM ==> the result is BOTTOM
 840   if( (t1 == TypeLong::LONG) || (t2 == TypeInt::INT) ||
 841       (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
 842     return TypeLong::LONG;
 843 
 844   const TypeLong *r1 = t1->is_long(); // Handy access
 845   const TypeInt  *r2 = t2->is_int();  // Handy access
 846 
 847   if (!r2->is_con())
 848     return TypeLong::LONG;
 849 
 850   uint shift = r2->get_con();
 851   shift &= BitsPerJavaLong - 1;  // semantics of Java shifts
 852   // Shift by a multiple of 64 does nothing:
 853   if (shift == 0)  return t1;
 854 
 855   // If the shift is a constant, shift the bounds of the type,
 856   // unless this could lead to an overflow.
 857   if (!r1->is_con()) {
 858     jlong lo = r1->_lo, hi = r1->_hi;
 859     if (((lo << shift) >> shift) == lo &&
 860         ((hi << shift) >> shift) == hi) {
 861       // No overflow.  The range shifts up cleanly.
 862       return TypeLong::make((jlong)lo << (jint)shift,
 863                             (jlong)hi << (jint)shift,
 864                             MAX2(r1->_widen,r2->_widen));
 865     }
 866     return TypeLong::LONG;
 867   }
 868 
 869   return TypeLong::make( (jlong)r1->get_con() << (jint)shift );
 870 }
 871 
 872 //=============================================================================
 873 //------------------------------Identity---------------------------------------
 874 Node* RShiftINode::Identity(PhaseGVN* phase) {
 875   int shift = getShiftCon(phase, this, -1);
 876   if (shift == -1) return this;
 877   if ((shift & (BitsPerJavaInteger - 1)) == 0) return in(1);
 878 
 879   // Check for useless sign-masking
 880   if (in(1)->Opcode() == Op_LShiftI &&
 881       in(1)->req() == 3 &&
 882       in(1)->in(2) == in(2)) {
 883     shift &= BitsPerJavaInteger-1; // semantics of Java shifts
 884     // Compute masks for which this shifting doesn't change
 885     int lo = (-1 << (BitsPerJavaInteger - ((uint)shift)-1)); // FFFF8000
 886     int hi = ~lo;               // 00007FFF
 887     const TypeInt *t11 = phase->type(in(1)->in(1))->isa_int();
 888     if (!t11) return this;
 889     // Does actual value fit inside of mask?
 890     if (lo <= t11->_lo && t11->_hi <= hi) {
 891       return in(1)->in(1);      // Then shifting is a nop
 892     }
 893   }
 894 
 895   return this;
 896 }
 897 
 898 //------------------------------Ideal------------------------------------------
 899 Node *RShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
 900   // Inputs may be TOP if they are dead.
 901   const TypeInt *t1 = phase->type(in(1))->isa_int();
 902   if (!t1) return NULL;        // Left input is an integer
 903   const TypeInt *t3;  // type of in(1).in(2)
 904   int shift = maskShiftAmount(phase, this, BitsPerJavaInteger);
 905   if (shift == 0) {
 906     return NULL;
 907   }
 908 
 909   // Check for (x & 0xFF000000) >> 24, whose mask can be made smaller.
 910   // Such expressions arise normally from shift chains like (byte)(x >> 24).
 911   const Node *mask = in(1);
 912   if( mask->Opcode() == Op_AndI &&
 913       (t3 = phase->type(mask->in(2))->isa_int()) &&
 914       t3->is_con() ) {
 915     Node *x = mask->in(1);
 916     jint maskbits = t3->get_con();
 917     // Convert to "(x >> shift) & (mask >> shift)"
 918     Node *shr_nomask = phase->transform( new RShiftINode(mask->in(1), in(2)) );
 919     return new AndINode(shr_nomask, phase->intcon( maskbits >> shift));
 920   }
 921 
 922   // Check for "(short[i] <<16)>>16" which simply sign-extends
 923   const Node *shl = in(1);
 924   if( shl->Opcode() != Op_LShiftI ) return NULL;
 925 
 926   if( shift == 16 &&
 927       (t3 = phase->type(shl->in(2))->isa_int()) &&
 928       t3->is_con(16) ) {
 929     Node *ld = shl->in(1);
 930     if( ld->Opcode() == Op_LoadS ) {
 931       // Sign extension is just useless here.  Return a RShiftI of zero instead
 932       // returning 'ld' directly.  We cannot return an old Node directly as
 933       // that is the job of 'Identity' calls and Identity calls only work on
 934       // direct inputs ('ld' is an extra Node removed from 'this').  The
 935       // combined optimization requires Identity only return direct inputs.
 936       set_req(1, ld);
 937       set_req(2, phase->intcon(0));
 938       return this;
 939     }
 940     else if( can_reshape &&
 941              ld->Opcode() == Op_LoadUS &&
 942              ld->outcnt() == 1 && ld->unique_out() == shl)
 943       // Replace zero-extension-load with sign-extension-load
 944       return ld->as_Load()->convert_to_signed_load(*phase);
 945   }
 946 
 947   // Check for "(byte[i] <<24)>>24" which simply sign-extends
 948   if( shift == 24 &&
 949       (t3 = phase->type(shl->in(2))->isa_int()) &&
 950       t3->is_con(24) ) {
 951     Node *ld = shl->in(1);
 952     if( ld->Opcode() == Op_LoadB ) {
 953       // Sign extension is just useless here
 954       set_req(1, ld);
 955       set_req(2, phase->intcon(0));
 956       return this;
 957     }
 958   }
 959 
 960   return NULL;
 961 }
 962 
 963 //------------------------------Value------------------------------------------
 964 // A RShiftINode shifts its input2 right by input1 amount.
 965 const Type* RShiftINode::Value(PhaseGVN* phase) const {
 966   const Type *t1 = phase->type( in(1) );
 967   const Type *t2 = phase->type( in(2) );
 968   // Either input is TOP ==> the result is TOP
 969   if( t1 == Type::TOP ) return Type::TOP;
 970   if( t2 == Type::TOP ) return Type::TOP;
 971 
 972   // Left input is ZERO ==> the result is ZERO.
 973   if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
 974   // Shift by zero does nothing
 975   if( t2 == TypeInt::ZERO ) return t1;
 976 
 977   // Either input is BOTTOM ==> the result is BOTTOM
 978   if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
 979     return TypeInt::INT;
 980 
 981   if (t2 == TypeInt::INT)
 982     return TypeInt::INT;
 983 
 984   const TypeInt *r1 = t1->is_int(); // Handy access
 985   const TypeInt *r2 = t2->is_int(); // Handy access
 986 
 987   // If the shift is a constant, just shift the bounds of the type.
 988   // For example, if the shift is 31, we just propagate sign bits.
 989   if (r2->is_con()) {
 990     uint shift = r2->get_con();
 991     shift &= BitsPerJavaInteger-1;  // semantics of Java shifts
 992     // Shift by a multiple of 32 does nothing:
 993     if (shift == 0)  return t1;
 994     // Calculate reasonably aggressive bounds for the result.
 995     // This is necessary if we are to correctly type things
 996     // like (x<<24>>24) == ((byte)x).
 997     jint lo = (jint)r1->_lo >> (jint)shift;
 998     jint hi = (jint)r1->_hi >> (jint)shift;
 999     assert(lo <= hi, "must have valid bounds");
1000     const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1001 #ifdef ASSERT
1002     // Make sure we get the sign-capture idiom correct.
1003     if (shift == BitsPerJavaInteger-1) {
1004       if (r1->_lo >= 0) assert(ti == TypeInt::ZERO,    ">>31 of + is  0");
1005       if (r1->_hi <  0) assert(ti == TypeInt::MINUS_1, ">>31 of - is -1");
1006     }
1007 #endif
1008     return ti;
1009   }
1010 
1011   if( !r1->is_con() || !r2->is_con() )
1012     return TypeInt::INT;
1013 
1014   // Signed shift right
1015   return TypeInt::make( r1->get_con() >> (r2->get_con()&31) );
1016 }
1017 
1018 //=============================================================================
1019 //------------------------------Identity---------------------------------------
1020 Node* RShiftLNode::Identity(PhaseGVN* phase) {
1021   const TypeInt *ti = phase->type(in(2))->isa_int(); // Shift count is an int.
1022   return (ti && ti->is_con() && (ti->get_con() & (BitsPerJavaLong - 1)) == 0) ? in(1) : this;
1023 }
1024 
1025 //------------------------------Value------------------------------------------
1026 // A RShiftLNode shifts its input2 right by input1 amount.
1027 const Type* RShiftLNode::Value(PhaseGVN* phase) const {
1028   const Type *t1 = phase->type( in(1) );
1029   const Type *t2 = phase->type( in(2) );
1030   // Either input is TOP ==> the result is TOP
1031   if( t1 == Type::TOP ) return Type::TOP;
1032   if( t2 == Type::TOP ) return Type::TOP;
1033 
1034   // Left input is ZERO ==> the result is ZERO.
1035   if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1036   // Shift by zero does nothing
1037   if( t2 == TypeInt::ZERO ) return t1;
1038 
1039   // Either input is BOTTOM ==> the result is BOTTOM
1040   if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1041     return TypeLong::LONG;
1042 
1043   if (t2 == TypeInt::INT)
1044     return TypeLong::LONG;
1045 
1046   const TypeLong *r1 = t1->is_long(); // Handy access
1047   const TypeInt  *r2 = t2->is_int (); // Handy access
1048 
1049   // If the shift is a constant, just shift the bounds of the type.
1050   // For example, if the shift is 63, we just propagate sign bits.
1051   if (r2->is_con()) {
1052     uint shift = r2->get_con();
1053     shift &= (2*BitsPerJavaInteger)-1;  // semantics of Java shifts
1054     // Shift by a multiple of 64 does nothing:
1055     if (shift == 0)  return t1;
1056     // Calculate reasonably aggressive bounds for the result.
1057     // This is necessary if we are to correctly type things
1058     // like (x<<24>>24) == ((byte)x).
1059     jlong lo = (jlong)r1->_lo >> (jlong)shift;
1060     jlong hi = (jlong)r1->_hi >> (jlong)shift;
1061     assert(lo <= hi, "must have valid bounds");
1062     const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1063     #ifdef ASSERT
1064     // Make sure we get the sign-capture idiom correct.
1065     if (shift == (2*BitsPerJavaInteger)-1) {
1066       if (r1->_lo >= 0) assert(tl == TypeLong::ZERO,    ">>63 of + is 0");
1067       if (r1->_hi < 0)  assert(tl == TypeLong::MINUS_1, ">>63 of - is -1");
1068     }
1069     #endif
1070     return tl;
1071   }
1072 
1073   return TypeLong::LONG;                // Give up
1074 }
1075 
1076 //=============================================================================
1077 //------------------------------Identity---------------------------------------
1078 Node* URShiftINode::Identity(PhaseGVN* phase) {
1079   int shift = getShiftCon(phase, this, -1);
1080   if ((shift & (BitsPerJavaInteger - 1)) == 0) return in(1);
1081 
1082   // Check for "((x << LogBytesPerWord) + (wordSize-1)) >> LogBytesPerWord" which is just "x".
1083   // Happens during new-array length computation.
1084   // Safe if 'x' is in the range [0..(max_int>>LogBytesPerWord)]
1085   Node *add = in(1);
1086   if (add->Opcode() == Op_AddI) {
1087     const TypeInt *t2 = phase->type(add->in(2))->isa_int();
1088     if (t2 && t2->is_con(wordSize - 1) &&
1089         add->in(1)->Opcode() == Op_LShiftI) {
1090       // Check that shift_counts are LogBytesPerWord.
1091       Node          *lshift_count   = add->in(1)->in(2);
1092       const TypeInt *t_lshift_count = phase->type(lshift_count)->isa_int();
1093       if (t_lshift_count && t_lshift_count->is_con(LogBytesPerWord) &&
1094           t_lshift_count == phase->type(in(2))) {
1095         Node          *x   = add->in(1)->in(1);
1096         const TypeInt *t_x = phase->type(x)->isa_int();
1097         if (t_x != NULL && 0 <= t_x->_lo && t_x->_hi <= (max_jint>>LogBytesPerWord)) {
1098           return x;
1099         }
1100       }
1101     }
1102   }
1103 
1104   return (phase->type(in(2))->higher_equal(TypeInt::ZERO)) ? in(1) : this;
1105 }
1106 
1107 //------------------------------Ideal------------------------------------------
1108 Node *URShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
1109   int con = maskShiftAmount(phase, this, BitsPerJavaInteger);
1110   if (con == 0) {
1111     return NULL;
1112   }
1113 
1114   // We'll be wanting the right-shift amount as a mask of that many bits
1115   const int mask = right_n_bits(BitsPerJavaInteger - con);
1116 
1117   int in1_op = in(1)->Opcode();
1118 
1119   // Check for ((x>>>a)>>>b) and replace with (x>>>(a+b)) when a+b < 32
1120   if( in1_op == Op_URShiftI ) {
1121     const TypeInt *t12 = phase->type( in(1)->in(2) )->isa_int();
1122     if( t12 && t12->is_con() ) { // Right input is a constant
1123       assert( in(1) != in(1)->in(1), "dead loop in URShiftINode::Ideal" );
1124       const int con2 = t12->get_con() & 31; // Shift count is always masked
1125       const int con3 = con+con2;
1126       if( con3 < 32 )           // Only merge shifts if total is < 32
1127         return new URShiftINode( in(1)->in(1), phase->intcon(con3) );
1128     }
1129   }
1130 
1131   // Check for ((x << z) + Y) >>> z.  Replace with x + con>>>z
1132   // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1133   // If Q is "X << z" the rounding is useless.  Look for patterns like
1134   // ((X<<Z) + Y) >>> Z  and replace with (X + Y>>>Z) & Z-mask.
1135   Node *add = in(1);
1136   const TypeInt *t2 = phase->type(in(2))->isa_int();
1137   if (in1_op == Op_AddI) {
1138     Node *lshl = add->in(1);
1139     if( lshl->Opcode() == Op_LShiftI &&
1140         phase->type(lshl->in(2)) == t2 ) {
1141       Node *y_z = phase->transform( new URShiftINode(add->in(2),in(2)) );
1142       Node *sum = phase->transform( new AddINode( lshl->in(1), y_z ) );
1143       return new AndINode( sum, phase->intcon(mask) );
1144     }
1145   }
1146 
1147   // Check for (x & mask) >>> z.  Replace with (x >>> z) & (mask >>> z)
1148   // This shortens the mask.  Also, if we are extracting a high byte and
1149   // storing it to a buffer, the mask will be removed completely.
1150   Node *andi = in(1);
1151   if( in1_op == Op_AndI ) {
1152     const TypeInt *t3 = phase->type( andi->in(2) )->isa_int();
1153     if( t3 && t3->is_con() ) { // Right input is a constant
1154       jint mask2 = t3->get_con();
1155       mask2 >>= con;  // *signed* shift downward (high-order zeroes do not help)
1156       Node *newshr = phase->transform( new URShiftINode(andi->in(1), in(2)) );
1157       return new AndINode(newshr, phase->intcon(mask2));
1158       // The negative values are easier to materialize than positive ones.
1159       // A typical case from address arithmetic is ((x & ~15) >> 4).
1160       // It's better to change that to ((x >> 4) & ~0) versus
1161       // ((x >> 4) & 0x0FFFFFFF).  The difference is greatest in LP64.
1162     }
1163   }
1164 
1165   // Check for "(X << z ) >>> z" which simply zero-extends
1166   Node *shl = in(1);
1167   if( in1_op == Op_LShiftI &&
1168       phase->type(shl->in(2)) == t2 )
1169     return new AndINode( shl->in(1), phase->intcon(mask) );
1170 
1171   return NULL;
1172 }
1173 
1174 //------------------------------Value------------------------------------------
1175 // A URShiftINode shifts its input2 right by input1 amount.
1176 const Type* URShiftINode::Value(PhaseGVN* phase) const {
1177   // (This is a near clone of RShiftINode::Value.)
1178   const Type *t1 = phase->type( in(1) );
1179   const Type *t2 = phase->type( in(2) );
1180   // Either input is TOP ==> the result is TOP
1181   if( t1 == Type::TOP ) return Type::TOP;
1182   if( t2 == Type::TOP ) return Type::TOP;
1183 
1184   // Left input is ZERO ==> the result is ZERO.
1185   if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
1186   // Shift by zero does nothing
1187   if( t2 == TypeInt::ZERO ) return t1;
1188 
1189   // Either input is BOTTOM ==> the result is BOTTOM
1190   if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1191     return TypeInt::INT;
1192 
1193   if (t2 == TypeInt::INT)
1194     return TypeInt::INT;
1195 
1196   const TypeInt *r1 = t1->is_int();     // Handy access
1197   const TypeInt *r2 = t2->is_int();     // Handy access
1198 
1199   if (r2->is_con()) {
1200     uint shift = r2->get_con();
1201     shift &= BitsPerJavaInteger-1;  // semantics of Java shifts
1202     // Shift by a multiple of 32 does nothing:
1203     if (shift == 0)  return t1;
1204     // Calculate reasonably aggressive bounds for the result.
1205     jint lo = (juint)r1->_lo >> (juint)shift;
1206     jint hi = (juint)r1->_hi >> (juint)shift;
1207     if (r1->_hi >= 0 && r1->_lo < 0) {
1208       // If the type has both negative and positive values,
1209       // there are two separate sub-domains to worry about:
1210       // The positive half and the negative half.
1211       jint neg_lo = lo;
1212       jint neg_hi = (juint)-1 >> (juint)shift;
1213       jint pos_lo = (juint) 0 >> (juint)shift;
1214       jint pos_hi = hi;
1215       lo = MIN2(neg_lo, pos_lo);  // == 0
1216       hi = MAX2(neg_hi, pos_hi);  // == -1 >>> shift;
1217     }
1218     assert(lo <= hi, "must have valid bounds");
1219     const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1220     #ifdef ASSERT
1221     // Make sure we get the sign-capture idiom correct.
1222     if (shift == BitsPerJavaInteger-1) {
1223       if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>>31 of + is 0");
1224       if (r1->_hi < 0)  assert(ti == TypeInt::ONE,  ">>>31 of - is +1");
1225     }
1226     #endif
1227     return ti;
1228   }
1229 
1230   //
1231   // Do not support shifted oops in info for GC
1232   //
1233   // else if( t1->base() == Type::InstPtr ) {
1234   //
1235   //   const TypeInstPtr *o = t1->is_instptr();
1236   //   if( t1->singleton() )
1237   //     return TypeInt::make( ((uint32_t)o->const_oop() + o->_offset) >> shift );
1238   // }
1239   // else if( t1->base() == Type::KlassPtr ) {
1240   //   const TypeKlassPtr *o = t1->is_klassptr();
1241   //   if( t1->singleton() )
1242   //     return TypeInt::make( ((uint32_t)o->const_oop() + o->_offset) >> shift );
1243   // }
1244 
1245   return TypeInt::INT;
1246 }
1247 
1248 //=============================================================================
1249 //------------------------------Identity---------------------------------------
1250 Node* URShiftLNode::Identity(PhaseGVN* phase) {
1251   return ((getShiftCon(phase, this, -1) & (BitsPerJavaLong - 1)) == 0) ? in(1) : this;
1252 }
1253 
1254 //------------------------------Ideal------------------------------------------
1255 Node *URShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
1256   int con = maskShiftAmount(phase, this, BitsPerJavaLong);
1257   if (con == 0) {
1258     return NULL;
1259   }
1260 
1261   // We'll be wanting the right-shift amount as a mask of that many bits
1262   const jlong mask = jlong(max_julong >> con);
1263 
1264   // Check for ((x << z) + Y) >>> z.  Replace with x + con>>>z
1265   // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1266   // If Q is "X << z" the rounding is useless.  Look for patterns like
1267   // ((X<<Z) + Y) >>> Z  and replace with (X + Y>>>Z) & Z-mask.
1268   Node *add = in(1);
1269   const TypeInt *t2 = phase->type(in(2))->isa_int();
1270   if (add->Opcode() == Op_AddL) {
1271     Node *lshl = add->in(1);
1272     if( lshl->Opcode() == Op_LShiftL &&
1273         phase->type(lshl->in(2)) == t2 ) {
1274       Node *y_z = phase->transform( new URShiftLNode(add->in(2),in(2)) );
1275       Node *sum = phase->transform( new AddLNode( lshl->in(1), y_z ) );
1276       return new AndLNode( sum, phase->longcon(mask) );
1277     }
1278   }
1279 
1280   // Check for (x & mask) >>> z.  Replace with (x >>> z) & (mask >>> z)
1281   // This shortens the mask.  Also, if we are extracting a high byte and
1282   // storing it to a buffer, the mask will be removed completely.
1283   Node *andi = in(1);
1284   if( andi->Opcode() == Op_AndL ) {
1285     const TypeLong *t3 = phase->type( andi->in(2) )->isa_long();
1286     if( t3 && t3->is_con() ) { // Right input is a constant
1287       jlong mask2 = t3->get_con();
1288       mask2 >>= con;  // *signed* shift downward (high-order zeroes do not help)
1289       Node *newshr = phase->transform( new URShiftLNode(andi->in(1), in(2)) );
1290       return new AndLNode(newshr, phase->longcon(mask2));
1291     }
1292   }
1293 
1294   // Check for "(X << z ) >>> z" which simply zero-extends
1295   Node *shl = in(1);
1296   if( shl->Opcode() == Op_LShiftL &&
1297       phase->type(shl->in(2)) == t2 )
1298     return new AndLNode( shl->in(1), phase->longcon(mask) );
1299 
1300   return NULL;
1301 }
1302 
1303 //------------------------------Value------------------------------------------
1304 // A URShiftINode shifts its input2 right by input1 amount.
1305 const Type* URShiftLNode::Value(PhaseGVN* phase) const {
1306   // (This is a near clone of RShiftLNode::Value.)
1307   const Type *t1 = phase->type( in(1) );
1308   const Type *t2 = phase->type( in(2) );
1309   // Either input is TOP ==> the result is TOP
1310   if( t1 == Type::TOP ) return Type::TOP;
1311   if( t2 == Type::TOP ) return Type::TOP;
1312 
1313   // Left input is ZERO ==> the result is ZERO.
1314   if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1315   // Shift by zero does nothing
1316   if( t2 == TypeInt::ZERO ) return t1;
1317 
1318   // Either input is BOTTOM ==> the result is BOTTOM
1319   if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1320     return TypeLong::LONG;
1321 
1322   if (t2 == TypeInt::INT)
1323     return TypeLong::LONG;
1324 
1325   const TypeLong *r1 = t1->is_long(); // Handy access
1326   const TypeInt  *r2 = t2->is_int (); // Handy access
1327 
1328   if (r2->is_con()) {
1329     uint shift = r2->get_con();
1330     shift &= BitsPerJavaLong - 1;  // semantics of Java shifts
1331     // Shift by a multiple of 64 does nothing:
1332     if (shift == 0)  return t1;
1333     // Calculate reasonably aggressive bounds for the result.
1334     jlong lo = (julong)r1->_lo >> (juint)shift;
1335     jlong hi = (julong)r1->_hi >> (juint)shift;
1336     if (r1->_hi >= 0 && r1->_lo < 0) {
1337       // If the type has both negative and positive values,
1338       // there are two separate sub-domains to worry about:
1339       // The positive half and the negative half.
1340       jlong neg_lo = lo;
1341       jlong neg_hi = (julong)-1 >> (juint)shift;
1342       jlong pos_lo = (julong) 0 >> (juint)shift;
1343       jlong pos_hi = hi;
1344       //lo = MIN2(neg_lo, pos_lo);  // == 0
1345       lo = neg_lo < pos_lo ? neg_lo : pos_lo;
1346       //hi = MAX2(neg_hi, pos_hi);  // == -1 >>> shift;
1347       hi = neg_hi > pos_hi ? neg_hi : pos_hi;
1348     }
1349     assert(lo <= hi, "must have valid bounds");
1350     const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1351     #ifdef ASSERT
1352     // Make sure we get the sign-capture idiom correct.
1353     if (shift == BitsPerJavaLong - 1) {
1354       if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>>63 of + is 0");
1355       if (r1->_hi < 0)  assert(tl == TypeLong::ONE,  ">>>63 of - is +1");
1356     }
1357     #endif
1358     return tl;
1359   }
1360 
1361   return TypeLong::LONG;                // Give up
1362 }
1363 
1364 //=============================================================================
1365 //------------------------------Value------------------------------------------
1366 const Type* FmaDNode::Value(PhaseGVN* phase) const {
1367   const Type *t1 = phase->type(in(1));
1368   if (t1 == Type::TOP) return Type::TOP;
1369   if (t1->base() != Type::DoubleCon) return Type::DOUBLE;
1370   const Type *t2 = phase->type(in(2));
1371   if (t2 == Type::TOP) return Type::TOP;
1372   if (t2->base() != Type::DoubleCon) return Type::DOUBLE;
1373   const Type *t3 = phase->type(in(3));
1374   if (t3 == Type::TOP) return Type::TOP;
1375   if (t3->base() != Type::DoubleCon) return Type::DOUBLE;
1376 #ifndef __STDC_IEC_559__
1377   return Type::DOUBLE;
1378 #else
1379   double d1 = t1->getd();
1380   double d2 = t2->getd();
1381   double d3 = t3->getd();
1382   return TypeD::make(fma(d1, d2, d3));
1383 #endif
1384 }
1385 
1386 //=============================================================================
1387 //------------------------------Value------------------------------------------
1388 const Type* FmaFNode::Value(PhaseGVN* phase) const {
1389   const Type *t1 = phase->type(in(1));
1390   if (t1 == Type::TOP) return Type::TOP;
1391   if (t1->base() != Type::FloatCon) return Type::FLOAT;
1392   const Type *t2 = phase->type(in(2));
1393   if (t2 == Type::TOP) return Type::TOP;
1394   if (t2->base() != Type::FloatCon) return Type::FLOAT;
1395   const Type *t3 = phase->type(in(3));
1396   if (t3 == Type::TOP) return Type::TOP;
1397   if (t3->base() != Type::FloatCon) return Type::FLOAT;
1398 #ifndef __STDC_IEC_559__
1399   return Type::FLOAT;
1400 #else
1401   float f1 = t1->getf();
1402   float f2 = t2->getf();
1403   float f3 = t3->getf();
1404   return TypeF::make(fma(f1, f2, f3));
1405 #endif
1406 }