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src/hotspot/share/opto/mulnode.cpp

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rev 52430 : 8213473: Prevent transformation of LoadB->AndI->CmpI pattern to facilitate testb instruction matching


 473   const int mask = t2->get_con();
 474   Node *load = in(1);
 475   uint lop = load->Opcode();
 476 
 477   // Masking bits off of a Character?  Hi bits are already zero.
 478   if( lop == Op_LoadUS &&
 479       (mask & 0xFFFF0000) )     // Can we make a smaller mask?
 480     return new AndINode(load,phase->intcon(mask&0xFFFF));
 481 
 482   // Masking bits off of a Short?  Loading a Character does some masking
 483   if (can_reshape &&
 484       load->outcnt() == 1 && load->unique_out() == this) {
 485     if (lop == Op_LoadS && (mask & 0xFFFF0000) == 0 ) {
 486       Node* ldus = load->as_Load()->convert_to_unsigned_load(*phase);
 487       ldus = phase->transform(ldus);
 488       return new AndINode(ldus, phase->intcon(mask & 0xFFFF));
 489     }
 490 
 491     // Masking sign bits off of a Byte?  Do an unsigned byte load plus
 492     // an and.
 493     if (lop == Op_LoadB && (mask & 0xFFFFFF00) == 0) {



 494       Node* ldub = load->as_Load()->convert_to_unsigned_load(*phase);
 495       ldub = phase->transform(ldub);
 496       return new AndINode(ldub, phase->intcon(mask));
 497     }
 498   }
 499 
 500   // Masking off sign bits?  Dont make them!
 501   if( lop == Op_RShiftI ) {
 502     const TypeInt *t12 = phase->type(load->in(2))->isa_int();
 503     if( t12 && t12->is_con() ) { // Shift is by a constant
 504       int shift = t12->get_con();
 505       shift &= BitsPerJavaInteger-1;  // semantics of Java shifts
 506       const int sign_bits_mask = ~right_n_bits(BitsPerJavaInteger - shift);
 507       // If the AND'ing of the 2 masks has no bits, then only original shifted
 508       // bits survive.  NO sign-extension bits survive the maskings.
 509       if( (sign_bits_mask & mask) == 0 ) {
 510         // Use zero-fill shift instead
 511         Node *zshift = phase->transform(new URShiftINode(load->in(1),load->in(2)));
 512         return new AndINode( zshift, in(2) );
 513       }




 473   const int mask = t2->get_con();
 474   Node *load = in(1);
 475   uint lop = load->Opcode();
 476 
 477   // Masking bits off of a Character?  Hi bits are already zero.
 478   if( lop == Op_LoadUS &&
 479       (mask & 0xFFFF0000) )     // Can we make a smaller mask?
 480     return new AndINode(load,phase->intcon(mask&0xFFFF));
 481 
 482   // Masking bits off of a Short?  Loading a Character does some masking
 483   if (can_reshape &&
 484       load->outcnt() == 1 && load->unique_out() == this) {
 485     if (lop == Op_LoadS && (mask & 0xFFFF0000) == 0 ) {
 486       Node* ldus = load->as_Load()->convert_to_unsigned_load(*phase);
 487       ldus = phase->transform(ldus);
 488       return new AndINode(ldus, phase->intcon(mask & 0xFFFF));
 489     }
 490 
 491     // Masking sign bits off of a Byte?  Do an unsigned byte load plus
 492     // an and.
 493     // Prevent transform if it feeds to CmpI. We have special matcher
 494     // for LoadB+AndI+CmpI that generates a single instruction.
 495     bool feeds_to_cmpi = outcnt() == 1 && unique_out()->Opcode() == Op_CmpI;
 496     if (lop == Op_LoadB && (mask & 0xFFFFFF00) == 0 && !feeds_to_cmpi) {
 497       Node* ldub = load->as_Load()->convert_to_unsigned_load(*phase);
 498       ldub = phase->transform(ldub);
 499       return new AndINode(ldub, phase->intcon(mask));
 500     }
 501   }
 502 
 503   // Masking off sign bits?  Dont make them!
 504   if( lop == Op_RShiftI ) {
 505     const TypeInt *t12 = phase->type(load->in(2))->isa_int();
 506     if( t12 && t12->is_con() ) { // Shift is by a constant
 507       int shift = t12->get_con();
 508       shift &= BitsPerJavaInteger-1;  // semantics of Java shifts
 509       const int sign_bits_mask = ~right_n_bits(BitsPerJavaInteger - shift);
 510       // If the AND'ing of the 2 masks has no bits, then only original shifted
 511       // bits survive.  NO sign-extension bits survive the maskings.
 512       if( (sign_bits_mask & mask) == 0 ) {
 513         // Use zero-fill shift instead
 514         Node *zshift = phase->transform(new URShiftINode(load->in(1),load->in(2)));
 515         return new AndINode( zshift, in(2) );
 516       }


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