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src/hotspot/cpu/aarch64/gc/shenandoah/shenandoahBarrierSetAssembler_aarch64.hpp

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rev 53513 : 8217016: Shenandoah: Streamline generation of CAS barriers

*** 58,75 **** void read_barrier_impl(MacroAssembler* masm, Register dst); void read_barrier_not_null(MacroAssembler* masm, Register dst); void read_barrier_not_null_impl(MacroAssembler* masm, Register dst); void write_barrier(MacroAssembler* masm, Register dst); void write_barrier_impl(MacroAssembler* masm, Register dst); - void storeval_barrier(MacroAssembler* masm, Register dst, Register tmp); void asm_acmp_barrier(MacroAssembler* masm, Register op1, Register op2); address generate_shenandoah_wb(StubCodeGenerator* cgen); public: static address shenandoah_wb(); #ifdef COMPILER1 void gen_pre_barrier_stub(LIR_Assembler* ce, ShenandoahPreBarrierStub* stub); void gen_write_barrier_stub(LIR_Assembler* ce, ShenandoahWriteBarrierStub* stub); void generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm); #endif --- 58,76 ---- void read_barrier_impl(MacroAssembler* masm, Register dst); void read_barrier_not_null(MacroAssembler* masm, Register dst); void read_barrier_not_null_impl(MacroAssembler* masm, Register dst); void write_barrier(MacroAssembler* masm, Register dst); void write_barrier_impl(MacroAssembler* masm, Register dst); void asm_acmp_barrier(MacroAssembler* masm, Register op1, Register op2); address generate_shenandoah_wb(StubCodeGenerator* cgen); public: static address shenandoah_wb(); + void storeval_barrier(MacroAssembler* masm, Register dst, Register tmp); + #ifdef COMPILER1 void gen_pre_barrier_stub(LIR_Assembler* ce, ShenandoahPreBarrierStub* stub); void gen_write_barrier_stub(LIR_Assembler* ce, ShenandoahWriteBarrierStub* stub); void generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm); #endif
*** 90,102 **** Register t1, Register t2, Label& slow_case); void cmpxchg_oop(MacroAssembler* masm, Register addr, Register expected, Register new_val, ! bool acquire, bool release, bool weak, bool encode, ! Register tmp1, Register tmp2, Register tmp3 = rscratch2, ! Register result = noreg); virtual void barrier_stubs_init(); }; #endif // CPU_AARCH64_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_AARCH64_HPP --- 91,101 ---- Register t1, Register t2, Label& slow_case); void cmpxchg_oop(MacroAssembler* masm, Register addr, Register expected, Register new_val, ! bool acquire, bool release, bool weak, bool is_cae, Register result); virtual void barrier_stubs_init(); }; #endif // CPU_AARCH64_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_AARCH64_HPP
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