82 return BarrierSetC1::atomic_cmpxchg_at_resolved(access, cmp_value, new_value);
83 }
84
85 LIR_Opr ShenandoahBarrierSetC1::atomic_xchg_at_resolved(LIRAccess& access, LIRItem& value) {
86 LIRGenerator* gen = access.gen();
87 BasicType type = access.type();
88
89 LIR_Opr result = gen->new_register(type);
90 value.load_item();
91 LIR_Opr value_opr = value.result();
92
93 if (access.is_oop()) {
94 value_opr = storeval_barrier(access.gen(), value_opr, access.access_emit_info(), access.decorators());
95 }
96
97 assert(type == T_INT || type == T_OBJECT || type == T_ARRAY LP64_ONLY( || type == T_LONG ), "unexpected type");
98 LIR_Opr tmp = gen->new_register(T_INT);
99 __ xchg(access.resolved_addr(), value_opr, result, tmp);
100
101 if (access.is_oop()) {
102 if (ShenandoahSATBBarrier) {
103 pre_barrier(access.gen(), access.access_emit_info(), access.decorators(), LIR_OprFact::illegalOpr,
104 result /* pre_val */);
105 }
106 }
107
108 return result;
109 }
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82 return BarrierSetC1::atomic_cmpxchg_at_resolved(access, cmp_value, new_value);
83 }
84
85 LIR_Opr ShenandoahBarrierSetC1::atomic_xchg_at_resolved(LIRAccess& access, LIRItem& value) {
86 LIRGenerator* gen = access.gen();
87 BasicType type = access.type();
88
89 LIR_Opr result = gen->new_register(type);
90 value.load_item();
91 LIR_Opr value_opr = value.result();
92
93 if (access.is_oop()) {
94 value_opr = storeval_barrier(access.gen(), value_opr, access.access_emit_info(), access.decorators());
95 }
96
97 assert(type == T_INT || type == T_OBJECT || type == T_ARRAY LP64_ONLY( || type == T_LONG ), "unexpected type");
98 LIR_Opr tmp = gen->new_register(T_INT);
99 __ xchg(access.resolved_addr(), value_opr, result, tmp);
100
101 if (access.is_oop()) {
102 result = load_reference_barrier(access.gen(), result, access.access_emit_info(), true);
103 if (ShenandoahSATBBarrier) {
104 pre_barrier(access.gen(), access.access_emit_info(), access.decorators(), LIR_OprFact::illegalOpr,
105 result /* pre_val */);
106 }
107 }
108
109 return result;
110 }
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