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src/hotspot/share/opto/loopnode.cpp

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rev 54386 : 8221766: Load-reference barriers for Shenandoah


3954     compute_lca_of_uses(n, early, true);
3955   }
3956 #endif
3957 
3958   // if this is a load, check for anti-dependent stores
3959   // We use a conservative algorithm to identify potential interfering
3960   // instructions and for rescheduling the load.  The users of the memory
3961   // input of this load are examined.  Any use which is not a load and is
3962   // dominated by early is considered a potentially interfering store.
3963   // This can produce false positives.
3964   if (n->is_Load() && LCA != early) {
3965     Node_List worklist;
3966 
3967     Node *mem = n->in(MemNode::Memory);
3968     for (DUIterator_Fast imax, i = mem->fast_outs(imax); i < imax; i++) {
3969       Node* s = mem->fast_out(i);
3970       worklist.push(s);
3971     }
3972     while(worklist.size() != 0 && LCA != early) {
3973       Node* s = worklist.pop();
3974       if (s->is_Load() || s->is_ShenandoahBarrier() || s->Opcode() == Op_SafePoint ||
3975           (s->is_CallStaticJava() && s->as_CallStaticJava()->uncommon_trap_request() != 0)) {
3976         continue;
3977       } else if (s->is_MergeMem()) {
3978         for (DUIterator_Fast imax, i = s->fast_outs(imax); i < imax; i++) {
3979           Node* s1 = s->fast_out(i);
3980           worklist.push(s1);
3981         }
3982       } else {
3983         Node *sctrl = has_ctrl(s) ? get_ctrl(s) : s->in(0);
3984         assert(sctrl != NULL || s->outcnt() == 0, "must have control");
3985         if (sctrl != NULL && !sctrl->is_top() && is_dominator(early, sctrl)) {
3986           LCA = dom_lca_for_get_late_ctrl(LCA, sctrl, n);
3987         }
3988       }
3989     }
3990   }
3991 
3992   assert(LCA == find_non_split_ctrl(LCA), "unexpected late control");
3993   return LCA;
3994 }
3995 




3954     compute_lca_of_uses(n, early, true);
3955   }
3956 #endif
3957 
3958   // if this is a load, check for anti-dependent stores
3959   // We use a conservative algorithm to identify potential interfering
3960   // instructions and for rescheduling the load.  The users of the memory
3961   // input of this load are examined.  Any use which is not a load and is
3962   // dominated by early is considered a potentially interfering store.
3963   // This can produce false positives.
3964   if (n->is_Load() && LCA != early) {
3965     Node_List worklist;
3966 
3967     Node *mem = n->in(MemNode::Memory);
3968     for (DUIterator_Fast imax, i = mem->fast_outs(imax); i < imax; i++) {
3969       Node* s = mem->fast_out(i);
3970       worklist.push(s);
3971     }
3972     while(worklist.size() != 0 && LCA != early) {
3973       Node* s = worklist.pop();
3974       if (s->is_Load() || s->Opcode() == Op_SafePoint ||
3975           (s->is_CallStaticJava() && s->as_CallStaticJava()->uncommon_trap_request() != 0) || s->is_Phi()) {
3976         continue;
3977       } else if (s->is_MergeMem()) {
3978         for (DUIterator_Fast imax, i = s->fast_outs(imax); i < imax; i++) {
3979           Node* s1 = s->fast_out(i);
3980           worklist.push(s1);
3981         }
3982       } else {
3983         Node *sctrl = has_ctrl(s) ? get_ctrl(s) : s->in(0);
3984         assert(sctrl != NULL || s->outcnt() == 0, "must have control");
3985         if (sctrl != NULL && !sctrl->is_top() && is_dominator(early, sctrl)) {
3986           LCA = dom_lca_for_get_late_ctrl(LCA, sctrl, n);
3987         }
3988       }
3989     }
3990   }
3991 
3992   assert(LCA == find_non_split_ctrl(LCA), "unexpected late control");
3993   return LCA;
3994 }
3995 


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