src/cpu/x86/vm/c1_LIRGenerator_x86.cpp

rev 11560 : [backport] 8222766: Shenandoah: streamline post-LRB CAS barrier (x86)
Reviewed-by: rkennke

*** 790,801 ****
    }
  
    LIR_Opr ill = LIR_OprFact::illegalOpr;  // for convenience
    if (type == objectType) {
  #if INCLUDE_ALL_GCS
!     if (UseShenandoahGC) {
!       __ cas_obj(addr, cmp.result(), val.result(), new_register(T_OBJECT), new_register(T_OBJECT));
      } else
  #endif
      {
      __ cas_obj(addr, cmp.result(), val.result(), ill, ill);
      }
--- 790,803 ----
    }
  
    LIR_Opr ill = LIR_OprFact::illegalOpr;  // for convenience
    if (type == objectType) {
  #if INCLUDE_ALL_GCS
!     if (UseShenandoahGC && ShenandoahCASBarrier) {
!       LIR_Opr result = rlock_result(x);
!       __ cas_obj(addr, cmp.result(), val.result(), new_register(T_OBJECT), new_register(T_OBJECT), result);
!       return;
      } else
  #endif
      {
      __ cas_obj(addr, cmp.result(), val.result(), ill, ill);
      }