1 /* 2 * Copyright (c) 2018, 2019, Red Hat, Inc. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "precompiled.hpp" 26 #include "c1/c1_LIRAssembler.hpp" 27 #include "c1/c1_MacroAssembler.hpp" 28 #include "gc/shenandoah/shenandoahBarrierSet.hpp" 29 #include "gc/shenandoah/shenandoahBarrierSetAssembler.hpp" 30 #include "gc/shenandoah/c1/shenandoahBarrierSetC1.hpp" 31 32 #define __ masm->masm()-> 33 34 void LIR_OpShenandoahCompareAndSwap::emit_code(LIR_Assembler* masm) { 35 Register addr = _addr->as_register_lo(); 36 Register newval = _new_value->as_register(); 37 Register cmpval = _cmp_value->as_register(); 38 Register tmp1 = _tmp1->as_register(); 39 Register tmp2 = _tmp2->as_register(); 40 Register result = result_opr()->as_register(); 41 42 ShenandoahBarrierSet::assembler()->storeval_barrier(masm->masm(), newval, rscratch2); 43 44 if (UseCompressedOops) { 45 __ encode_heap_oop(tmp1, cmpval); 46 cmpval = tmp1; 47 __ encode_heap_oop(tmp2, newval); 48 newval = tmp2; 49 } 50 51 ShenandoahBarrierSet::assembler()->cmpxchg_oop(masm->masm(), addr, cmpval, newval, /*acquire*/ false, /*release*/ true, /*weak*/ false, /*is_cae*/ false, result); 52 } 53 54 #undef __ 55 56 #ifdef ASSERT 57 #define __ gen->lir(__FILE__, __LINE__)-> 58 #else 59 #define __ gen->lir()-> 60 #endif 61 62 LIR_Opr ShenandoahBarrierSetC1::atomic_cmpxchg_at_resolved(LIRAccess& access, LIRItem& cmp_value, LIRItem& new_value) { 63 BasicType bt = access.type(); 64 if (access.is_oop()) { 65 LIRGenerator *gen = access.gen(); 66 if (ShenandoahSATBBarrier) { 67 pre_barrier(gen, access.access_emit_info(), access.decorators(), access.resolved_addr(), 68 LIR_OprFact::illegalOpr /* pre_val */); 69 } 70 if (ShenandoahCASBarrier) { 71 cmp_value.load_item(); 72 new_value.load_item(); 73 74 LIR_Opr t1 = gen->new_register(T_OBJECT); 75 LIR_Opr t2 = gen->new_register(T_OBJECT); 76 LIR_Opr addr = access.resolved_addr()->as_address_ptr()->base(); 77 LIR_Opr result = gen->new_register(T_INT); 78 79 __ append(new LIR_OpShenandoahCompareAndSwap(addr, cmp_value.result(), new_value.result(), t1, t2, result)); 80 return result; 81 } 82 } 83 return BarrierSetC1::atomic_cmpxchg_at_resolved(access, cmp_value, new_value); 84 } 85 86 LIR_Opr ShenandoahBarrierSetC1::atomic_xchg_at_resolved(LIRAccess& access, LIRItem& value) { 87 LIRGenerator* gen = access.gen(); 88 BasicType type = access.type(); 89 90 LIR_Opr result = gen->new_register(type); 91 value.load_item(); 92 LIR_Opr value_opr = value.result(); 93 94 if (access.is_oop()) { 95 value_opr = storeval_barrier(access.gen(), value_opr, access.access_emit_info(), access.decorators()); 96 } 97 98 assert(type == T_INT || is_reference_type(type) LP64_ONLY( || type == T_LONG ), "unexpected type"); 99 LIR_Opr tmp = gen->new_register(T_INT); 100 __ xchg(access.resolved_addr(), value_opr, result, tmp); 101 102 if (access.is_oop()) { 103 result = load_reference_barrier(access.gen(), result, LIR_OprFact::addressConst(0), false); 104 LIR_Opr tmp = gen->new_register(type); 105 __ move(result, tmp); 106 result = tmp; 107 if (ShenandoahSATBBarrier) { 108 pre_barrier(access.gen(), access.access_emit_info(), access.decorators(), LIR_OprFact::illegalOpr, 109 result /* pre_val */); 110 } 111 } 112 113 return result; 114 }