src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp

rev 12203 : [mq]: casfixes.patch

*** 1615,1625 ****
          cmpval = t1;
          assert(op->tmp2()->is_valid(), "must be");
          Register t2 = op->tmp2()->as_register();
          __ encode_heap_oop(t2, newval);
          newval = t2;
!         __ cmpxchg_oop_shenandoah(addr, cmpval, newval, Assembler::word, true, true, false);
          __ csetw(res, Assembler::EQ);
        } else {
          __ encode_heap_oop(t1, cmpval);
          cmpval = t1;
          __ encode_heap_oop(rscratch2, newval);
--- 1615,1625 ----
          cmpval = t1;
          assert(op->tmp2()->is_valid(), "must be");
          Register t2 = op->tmp2()->as_register();
          __ encode_heap_oop(t2, newval);
          newval = t2;
!         __ cmpxchg_oop_shenandoah(addr, cmpval, newval, Assembler::word, /*acquire*/ false, /*release*/ true, /*weak*/ false);
          __ csetw(res, Assembler::EQ);
        } else {
          __ encode_heap_oop(t1, cmpval);
          cmpval = t1;
          __ encode_heap_oop(rscratch2, newval);
*** 1627,1637 ****
          casw(addr, newval, cmpval);
          __ eorw (res, r8, 1);
        }
      } else {
        if (UseShenandoahGC) {
!         __ cmpxchg_oop_shenandoah(addr, cmpval, newval, Assembler::xword, true, true, false);
          __ csetw(res, Assembler::EQ);
        } else {
          casl(addr, newval, cmpval);
          __ eorw (res, r8, 1);
        }
--- 1627,1637 ----
          casw(addr, newval, cmpval);
          __ eorw (res, r8, 1);
        }
      } else {
        if (UseShenandoahGC) {
!         __ cmpxchg_oop_shenandoah(addr, cmpval, newval, Assembler::xword, /*acquire*/ false, /*release*/ true, /*weak*/ false);
          __ csetw(res, Assembler::EQ);
        } else {
          casl(addr, newval, cmpval);
          __ eorw (res, r8, 1);
        }